/openbmc/qemu/hw/hppa/ |
H A D | hppa_hardware.h | 7 #define FIRMWARE_START 0xf0000000 8 #define FIRMWARE_END 0xf0800000 10 #define DEVICE_HPA_LEN 0x00100000 12 #define GSC_HPA 0xffc00000 13 #define DINO_HPA 0xfff80000 14 #define DINO_UART_HPA 0xfff83000 15 #define DINO_UART_BASE 0xfff83800 16 #define DINO_SCSI_HPA 0xfff8c000 17 #define LASI_HPA 0xffd00000 18 #define LASI_UART_HPA 0xffd05000 [all …]
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/openbmc/linux/arch/arm64/boot/dts/intel/ |
H A D | socfpga_agilex_n6000.dts | 26 reg = <0 0x80000000 0 0>; 32 reg = <0x80000000 0x60000000>, 33 <0xf9000000 0x00100000>; 37 ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>; 39 dma-controller@0 { 41 reg = <0x00000000 0x00000000 0x00001000>;
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/openbmc/linux/Documentation/devicetree/bindings/soc/intel/ |
H A D | intel,hps-copy-engine.yaml | 39 reg = <0x80000000 0x60000000>, 40 <0xf9000000 0x00100000>; 44 ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>; 46 dma-controller@0 { 48 reg = <0x00000000 0x00000000 0x00001000>;
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/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | pci-armada8k.txt | 32 reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>; 40 bus-range = <0 0xff>; 41 ranges = <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 /* downstream I/O */ 42 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; /* non-prefetchable memory */ 43 interrupt-map-mask = <0 0 0 0>; 44 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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/openbmc/u-boot/doc/device-tree-bindings/pci/ |
H A D | armada8k-pcie.txt | 27 reg = <0 0xf2600000 0 0x10000>, 28 <0 0xf6f00000 0 0x80000>; 36 bus-range = <0 0xff>; 39 <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 41 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; 42 interrupt-map-mask = <0 0 0 0>; 43 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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/openbmc/linux/arch/arm/mach-footbridge/include/mach/ |
H A D | memory.h | 22 #define FLUSH_BASE 0xf9000000 24 #define FLUSH_BASE_PHYS 0x50000000
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H A D | hardware.h | 13 * 0xff800000 0x40000000 1MB X-Bus 14 * 0xff000000 0x7c000000 1MB PCI I/O space 15 * 0xfe000000 0x42000000 1MB CSR 16 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported) 17 * 0xfc000000 0x79000000 1MB PCI IACK/special space 18 * 0xfb000000 0x7a000000 16MB PCI Config type 1 19 * 0xfa000000 0x7b000000 16MB PCI Config type 0 20 * 0xf9000000 0x50000000 1MB Cache flush 21 * 0xf0000000 0x80000000 16MB ISA memory 24 #define XBUS_SIZE 0x00100000 [all …]
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/openbmc/u-boot/doc/mvebu/ |
H A D | armada-8k-memory.txt | 13 0x00000000 0xEFFFFFFF DRAM 15 0xF0000000 0xF0FFFFFF AP Internal registers space 17 0xF1000000 0xF1FFFFFF Reserved. 19 0xF2000000 0xF3FFFFFF CP-0 Internal (configuration) registers 22 0xF4000000 0xF5FFFFFF CP-1 Internal (configuration) registers 25 0xF6000000 0xF6FFFFFF CP-0 / PCIe#0 Memory space. 27 0xF7000000 0xF7FFFFFF CP-0 / PCIe#1 Memory space. 29 0xF8000000 0xF8FFFFFF CP-0 / PCIe#2 Memory space. 31 0xF9000000 0xF900FFFF CP-0 / PCIe#0 IO space. 33 0xF9010000 0xF901FFFF CP-0 / PCIe#1 IO space. [all …]
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/openbmc/linux/arch/arc/boot/dts/ |
H A D | nsimosci.dts | 18 /* bootargs = "console=tty0 consoleblank=0"; */ 20 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso… 36 #clock-cells = <0>; 49 reg = <0xf0000000 0x2000>; 59 #clock-cells = <0>; 66 reg = <0xf9000000 0x400>; 73 reg = <0xf9000400 0x14>; 80 reg = <0xf0003000 0x44>;
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H A D | nsimosci_hs.dts | 18 /* bootargs = "console=tty0 consoleblank=0"; */ 20 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso… 36 #clock-cells = <0>; 49 reg = <0xf0000000 0x2000>; 59 #clock-cells = <0>; 66 reg = <0xf9000000 0x400>; 73 reg = <0xf9000400 0x14>; 80 reg = <0xf0003000 0x44>;
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H A D | nsimosci_hs_idu.dts | 18 …bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 conso… 34 #clock-cells = <0>; 54 reg = <0xf0000000 0x2000>; 56 interrupts = <0>; 65 #clock-cells = <0>; 72 reg = <0xf9000000 0x400>; 79 reg = <0xf9000400 0x14>; 87 reg = <0xf0003000 0x44>;
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/openbmc/u-boot/include/configs/ |
H A D | xilinx_versal.h | 18 #define GICD_BASE 0xF9000000 19 #define GICR_BASE 0xF9080000 21 #define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 23 #define CONFIG_SYS_MEMTEST_START 0 48 #define CONFIG_SYS_LOAD_ADDR 0x8000000 70 "fdt_high=10000000\0" \ 71 "initrd_high=10000000\0" \ 72 "fdt_addr_r=0x40000000\0" \ 73 "pxefile_addr_r=0x10000000\0" \ 74 "kernel_addr_r=0x18000000\0" \ [all …]
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H A D | spear-common.h | 30 #define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0" 35 #define CONFIG_SYS_I2C_BASE 0xD0200000 37 #define CONFIG_SYS_I2C_BASE 0xD0180000 39 #define CONFIG_SYS_I2C_BASE 0xD0180000 41 #define CONFIG_SYS_I2C_BASE 0xD0180000 44 #define CONFIG_SYS_I2C_SLAVE 0x02 46 #define CONFIG_I2C_CHIPADDRESS 0x50 60 #define CONFIG_SYS_FLASH_BASE 0xF8000000 61 #define CONFIG_SYS_CS1_FLASH_BASE 0xF9000000 62 #define CONFIG_SYS_FLASH_BANK_SIZE 0x01000000 [all …]
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H A D | MPC8349ITX.h | 11 0x0000_0000-0x0FFF_FFFF DDR SDRAM (256 MB) 12 0x8000_0000-0x9FFF_FFFF PCI1 memory space (512 MB) 13 0xA000_0000-0xBFFF_FFFF PCI2 memory space (512 MB) 14 0xE000_0000-0xEFFF_FFFF IMMR (1 MB) 15 0xE200_0000-0xE2FF_FFFF PCI1 I/O space (16 MB) 16 0xE300_0000-0xE3FF_FFFF PCI2 I/O space (16 MB) 17 0xF000_0000-0xF000_FFFF Compact Flash (MPC8349E-mITX only) 18 0xF001_0000-0xF001_FFFF Local bus expansion slot 19 0xF800_0000-0xF801_FFFF Vitesse 7385 Parallel Interface (MPC8349E-mITX only) 20 0xFE00_0000-0xFE7F_FFFF First 8MB bank of Flash memory [all …]
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/openbmc/linux/arch/arm/mach-spear/ |
H A D | spear.h | 18 #define SPEAR_ICM1_2_BASE UL(0xD0000000) 19 #define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000) 20 #define SPEAR_ICM1_UART_BASE UL(0xD0000000) 22 #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) 25 #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) 26 #define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000) 29 #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) 30 #define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000) 31 #define SPEAR_ICM3_DMA_BASE UL(0xFC400000) 32 #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) [all …]
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H A D | spear13xx.c | 39 writel_relaxed(0x06, VA_L2CC_BASE + L310_PREFETCH_CTRL); in spear13xx_l2x0_init() 45 writel_relaxed(0x221, VA_L2CC_BASE + L310_TAG_LATENCY_CTRL); in spear13xx_l2x0_init() 46 writel_relaxed(0x441, VA_L2CC_BASE + L310_DATA_LATENCY_CTRL); in spear13xx_l2x0_init() 47 l2x0_init(VA_L2CC_BASE, 0x30a00001, 0xfe0fffff); in spear13xx_l2x0_init() 53 * 0xB3000000 0xF9000000 54 * 0xE0000000 0xFD000000 55 * 0xEC000000 0xFC000000 56 * 0xED000000 0xFB000000
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/openbmc/u-boot/arch/arm/dts/ |
H A D | armada-cp110-master.dtsi | 62 ranges = <0x0 0x0 0xf2000000 0x2000000>; 64 cpm_ethernet: ethernet@0 { 66 reg = <0x0 0x100000>, <0x129000 0xb000>; 74 port-id = <0>; 75 gop-port-id = <0>; 96 #size-cells = <0>; 98 reg = <0x12a200 0x10>; 104 reg = <0x440000 0x1000>; 126 reg = <0x440000 0x20>; 128 max-func = <0xf>; [all …]
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/openbmc/linux/drivers/staging/rtl8723bs/hal/ |
H A D | HalPhyRf_8723B.c | 12 /* MACRO definition for pRFCalibrateInfo->TxIQC_8723B[0] */ 14 #define IDX_0xC94 0 16 #define IDX_0xC14 0 18 #define KEY 0 22 #define PATH_S1 0 /* RF_PATH_A */ 31 0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 35 0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 52 s32 ele_A = 0, ele_D, ele_C = 0, value32; in setIqkMatrix_8723B() 57 ele_D = (OFDMSwingTable_New[OFDM_index] & 0xFFC00000)>>22; in setIqkMatrix_8723B() 60 if (IqkResult_X != 0) { in setIqkMatrix_8723B() [all …]
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/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723be/ |
H A D | phy.c | 91 rtl_write_byte(rtlpriv, 0x04CA, 0x0B); in rtl8723be_phy_mac_config() 106 regval | BIT(13) | BIT(0) | BIT(1)); in rtl8723be_phy_bb_config() 112 tmp = rtl_read_dword(rtlpriv, 0x4c); in rtl8723be_phy_bb_config() 113 rtl_write_dword(rtlpriv, 0x4c, tmp | BIT(23)); in rtl8723be_phy_bb_config() 115 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80); in rtl8723be_phy_bb_config() 120 crystalcap = crystalcap & 0x3F; in rtl8723be_phy_bb_config() 121 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000, in rtl8723be_phy_bb_config() 140 u32 intf = (rtlhal->interface == INTF_USB ? BIT(1) : BIT(0)); in _rtl8723be_check_positive() 142 u8 board_type = ((rtlhal->board_type & BIT(4)) >> 4) << 0 | /* _GLNA */ in _rtl8723be_check_positive() 150 0 << 20 | /* interface 2/2 */ in _rtl8723be_check_positive() [all …]
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/openbmc/linux/arch/powerpc/boot/dts/ |
H A D | mpc8349emitx.dts | 27 #size-cells = <0>; 29 PowerPC,8349@0 { 31 reg = <0x0>; 36 timebase-frequency = <0>; // from bootloader 37 bus-frequency = <0>; // from bootloader 38 clock-frequency = <0>; // from bootloader 44 reg = <0x00000000 0x10000000>; 52 ranges = <0x0 0xe0000000 0x00100000>; 53 reg = <0xe0000000 0x00000200>; 54 bus-frequency = <0>; // from bootloader [all …]
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/openbmc/linux/drivers/net/wireless/realtek/rtl8xxxu/ |
H A D | rtl8xxxu_8188f.c | 34 {0x024, 0xDF}, {0x025, 0x07}, {0x02B, 0x1C}, {0x283, 0x20}, 35 {0x421, 0x0F}, {0x428, 0x0A}, {0x429, 0x10}, {0x430, 0x00}, 36 {0x431, 0x00}, {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, 37 {0x435, 0x05}, {0x436, 0x07}, {0x437, 0x08}, {0x43C, 0x04}, 38 {0x43D, 0x05}, {0x43E, 0x07}, {0x43F, 0x08}, {0x440, 0x5D}, 39 {0x441, 0x01}, {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, 40 {0x446, 0x00}, {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xF0}, 41 {0x44A, 0x0F}, {0x44B, 0x3E}, {0x44C, 0x10}, {0x44D, 0x00}, 42 {0x44E, 0x00}, {0x44F, 0x00}, {0x450, 0x00}, {0x451, 0xF0}, 43 {0x452, 0x0F}, {0x453, 0x00}, {0x456, 0x5E}, {0x460, 0x44}, [all …]
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H A D | rtl8xxxu_8723b.c | 36 {0x02f, 0x30}, {0x035, 0x00}, {0x039, 0x08}, {0x04e, 0xe0}, 37 {0x064, 0x00}, {0x067, 0x20}, {0x428, 0x0a}, {0x429, 0x10}, 38 {0x430, 0x00}, {0x431, 0x00}, 39 {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05}, 40 {0x436, 0x07}, {0x437, 0x08}, {0x43c, 0x04}, {0x43d, 0x05}, 41 {0x43e, 0x07}, {0x43f, 0x08}, {0x440, 0x5d}, {0x441, 0x01}, 42 {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, {0x446, 0x00}, 43 {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xf0}, {0x44a, 0x0f}, 44 {0x44b, 0x3e}, {0x44c, 0x10}, {0x44d, 0x00}, {0x44e, 0x00}, 45 {0x44f, 0x00}, {0x450, 0x00}, {0x451, 0xf0}, {0x452, 0x0f}, [all …]
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H A D | rtl8xxxu_8192e.c | 36 {0x011, 0xeb}, {0x012, 0x07}, {0x014, 0x75}, {0x303, 0xa7}, 37 {0x428, 0x0a}, {0x429, 0x10}, {0x430, 0x00}, {0x431, 0x00}, 38 {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05}, 39 {0x436, 0x07}, {0x437, 0x08}, {0x43c, 0x04}, {0x43d, 0x05}, 40 {0x43e, 0x07}, {0x43f, 0x08}, {0x440, 0x5d}, {0x441, 0x01}, 41 {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, {0x446, 0x00}, 42 {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xf0}, {0x44a, 0x0f}, 43 {0x44b, 0x3e}, {0x44c, 0x10}, {0x44d, 0x00}, {0x44e, 0x00}, 44 {0x44f, 0x00}, {0x450, 0x00}, {0x451, 0xf0}, {0x452, 0x0f}, 45 {0x453, 0x00}, {0x456, 0x5e}, {0x460, 0x66}, {0x461, 0x66}, [all …]
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H A D | rtl8xxxu_8188e.c | 36 {0x026, 0x41}, {0x027, 0x35}, {0x040, 0x00}, {0x421, 0x0f}, 37 {0x428, 0x0a}, {0x429, 0x10}, {0x430, 0x00}, {0x431, 0x01}, 38 {0x432, 0x02}, {0x433, 0x04}, {0x434, 0x05}, {0x435, 0x06}, 39 {0x436, 0x07}, {0x437, 0x08}, {0x438, 0x00}, {0x439, 0x00}, 40 {0x43a, 0x01}, {0x43b, 0x02}, {0x43c, 0x04}, {0x43d, 0x05}, 41 {0x43e, 0x06}, {0x43f, 0x07}, {0x440, 0x5d}, {0x441, 0x01}, 42 {0x442, 0x00}, {0x444, 0x15}, {0x445, 0xf0}, {0x446, 0x0f}, 43 {0x447, 0x00}, {0x458, 0x41}, {0x459, 0xa8}, {0x45a, 0x72}, 44 {0x45b, 0xb9}, {0x460, 0x66}, {0x461, 0x66}, {0x480, 0x08}, 45 {0x4c8, 0xff}, {0x4c9, 0x08}, {0x4cc, 0xff}, {0x4cd, 0xff}, [all …]
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/openbmc/linux/drivers/video/fbdev/ |
H A D | valkyriefb.c | 136 out_8(&valkyrie_regs->status.r, 0); in valkyriefb_set_par() 141 out_8(&valkyrie_regs->mode.r, init->mode | 0x80); in valkyriefb_set_par() 149 return 0; in valkyriefb_set_par() 167 return 0; in valkyriefb_check_var() 171 * Blank the screen if blank_mode != 0, else unblank. If blank_mode == NULL 173 * black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due 203 out_8(&p->valkyrie_regs->mode.r, init->mode | 0x40); in valkyriefb_blank() 206 out_8(&p->valkyrie_regs->mode.r, 0x66); in valkyriefb_blank() 209 return 0; in valkyriefb_blank() 238 return 0; in valkyriefb_setcolreg() [all …]
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