122511e66SMatthew Gerlach// SPDX-License-Identifier: GPL-2.0 222511e66SMatthew Gerlach/* 322511e66SMatthew Gerlach * Copyright (C) 2021-2022, Intel Corporation 422511e66SMatthew Gerlach */ 522511e66SMatthew Gerlach#include "socfpga_agilex.dtsi" 622511e66SMatthew Gerlach 722511e66SMatthew Gerlach/ { 822511e66SMatthew Gerlach model = "SoCFPGA Agilex n6000"; 922511e66SMatthew Gerlach compatible = "intel,socfpga-agilex-n6000", "intel,socfpga-agilex"; 1022511e66SMatthew Gerlach 1122511e66SMatthew Gerlach aliases { 1222511e66SMatthew Gerlach serial0 = &uart1; 1322511e66SMatthew Gerlach serial1 = &uart0; 1422511e66SMatthew Gerlach ethernet0 = &gmac0; 1522511e66SMatthew Gerlach ethernet1 = &gmac1; 1622511e66SMatthew Gerlach ethernet2 = &gmac2; 1722511e66SMatthew Gerlach }; 1822511e66SMatthew Gerlach 1922511e66SMatthew Gerlach chosen { 2022511e66SMatthew Gerlach stdout-path = "serial0:115200n8"; 2122511e66SMatthew Gerlach }; 2222511e66SMatthew Gerlach 23*b2c62c39SDinh Nguyen memory@80000000 { 2422511e66SMatthew Gerlach device_type = "memory"; 2522511e66SMatthew Gerlach /* We expect the bootloader to fill in the reg */ 26*b2c62c39SDinh Nguyen reg = <0 0x80000000 0 0>; 2722511e66SMatthew Gerlach }; 2822511e66SMatthew Gerlach 2922511e66SMatthew Gerlach soc { 3022511e66SMatthew Gerlach bus@80000000 { 3122511e66SMatthew Gerlach compatible = "simple-bus"; 3222511e66SMatthew Gerlach reg = <0x80000000 0x60000000>, 3322511e66SMatthew Gerlach <0xf9000000 0x00100000>; 3422511e66SMatthew Gerlach reg-names = "axi_h2f", "axi_h2f_lw"; 3522511e66SMatthew Gerlach #address-cells = <2>; 3622511e66SMatthew Gerlach #size-cells = <1>; 3722511e66SMatthew Gerlach ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>; 3822511e66SMatthew Gerlach 3922511e66SMatthew Gerlach dma-controller@0 { 4022511e66SMatthew Gerlach compatible = "intel,hps-copy-engine"; 4122511e66SMatthew Gerlach reg = <0x00000000 0x00000000 0x00001000>; 4222511e66SMatthew Gerlach #dma-cells = <1>; 4322511e66SMatthew Gerlach }; 4422511e66SMatthew Gerlach }; 4522511e66SMatthew Gerlach }; 4622511e66SMatthew Gerlach}; 4722511e66SMatthew Gerlach 4822511e66SMatthew Gerlach&osc1 { 4922511e66SMatthew Gerlach clock-frequency = <25000000>; 5022511e66SMatthew Gerlach}; 5122511e66SMatthew Gerlach 5222511e66SMatthew Gerlach&uart0 { 5322511e66SMatthew Gerlach status = "okay"; 5422511e66SMatthew Gerlach}; 5522511e66SMatthew Gerlach 5622511e66SMatthew Gerlach&uart1 { 5722511e66SMatthew Gerlach status = "okay"; 5822511e66SMatthew Gerlach}; 5922511e66SMatthew Gerlach 6022511e66SMatthew Gerlach&watchdog0 { 6122511e66SMatthew Gerlach status = "okay"; 6222511e66SMatthew Gerlach}; 6322511e66SMatthew Gerlach 6422511e66SMatthew Gerlach&fpga_mgr { 6522511e66SMatthew Gerlach status = "disabled"; 6622511e66SMatthew Gerlach}; 67