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/openbmc/linux/arch/arm64/boot/dts/arm/
H A Dfoundation-v8-gicv3.dtsi13 ranges = <0x0 0x0 0x2f000000 0x100000>;
15 reg = <0x0 0x2f000000 0x0 0x10000>,
16 <0x0 0x2f100000 0x0 0x200000>,
17 <0x0 0x2c000000 0x0 0x2000>,
18 <0x0 0x2c010000 0x0 0x2000>,
19 <0x0 0x2c02f000 0x0 0x2000>;
26 reg = <0x20000 0x20000>;
H A Dfvp-base-revc.dts15 /memreserve/ 0x80000000 0x00010000;
43 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x0 0x000>;
50 i-cache-size = <0x8000>;
53 d-cache-size = <0x8000>;
61 reg = <0x0 0x100>;
63 i-cache-size = <0x8000>;
66 d-cache-size = <0x8000>;
74 reg = <0x0 0x200>;
[all …]
/openbmc/u-boot/include/configs/
H A Dvexpress_aemv8a.h23 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
25 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
31 #define V2M_PA_CS0 0x00000000
32 #define V2M_PA_CS1 0x14000000
33 #define V2M_PA_CS2 0x18000000
34 #define V2M_PA_CS3 0x1c000000
35 #define V2M_PA_CS4 0x0c000000
36 #define V2M_PA_CS5 0x10000000
43 #define V2M_BASE 0x80000000
52 #define V2M_UART0 0x7ff80000
[all …]
/openbmc/u-boot/configs/
H A Dam57xx_evm_defconfig4 CONFIG_SYS_MALLOC_F_LEN=0x2000
47 CONFIG_FASTBOOT_BUF_ADDR=0x82000000
48 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
60 CONFIG_SF_DEFAULT_MODE=0
90 CONFIG_USB_GADGET_VENDOR_NUM=0x0451
91 CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
H A Dam57xx_hs_evm_defconfig5 CONFIG_SYS_MALLOC_F_LEN=0x2000
7 CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
8 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
9 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
50 CONFIG_FASTBOOT_BUF_ADDR=0x82000000
51 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
63 CONFIG_SF_DEFAULT_MODE=0
93 CONFIG_USB_GADGET_VENDOR_NUM=0x0451
94 CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
H A Dam57xx_hs_evm_usb_defconfig5 CONFIG_SYS_MALLOC_F_LEN=0x2000
7 CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
8 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
9 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
10 CONFIG_ISW_ENTRY_ADDR=0x40306d50
55 CONFIG_FASTBOOT_BUF_ADDR=0x82000000
56 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
68 CONFIG_SF_DEFAULT_MODE=0
99 CONFIG_USB_GADGET_VENDOR_NUM=0x0451
100 CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
H A Ddra7xx_hs_evm_defconfig5 CONFIG_SYS_MALLOC_F_LEN=0x18000
7 CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
8 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
9 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
41 CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x9000
58 CONFIG_FASTBOOT_BUF_ADDR=0x82000000
59 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
75 CONFIG_SF_DEFAULT_MODE=0
109 CONFIG_USB_GADGET_VENDOR_NUM=0x0451
110 CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
H A Ddra7xx_evm_defconfig4 CONFIG_SYS_MALLOC_F_LEN=0x18000
37 CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x9000
54 CONFIG_FASTBOOT_BUF_ADDR=0x82000000
55 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
71 CONFIG_SF_DEFAULT_MODE=0
105 CONFIG_USB_GADGET_VENDOR_NUM=0x0451
106 CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
H A Ddra7xx_hs_evm_usb_defconfig5 CONFIG_SYS_MALLOC_F_LEN=0x18000
7 CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
8 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
9 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
10 CONFIG_ISW_ENTRY_ADDR=0x40306d50
46 CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x9000
62 CONFIG_FASTBOOT_BUF_ADDR=0x82000000
63 CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
79 CONFIG_SF_DEFAULT_MODE=0
114 CONFIG_USB_GADGET_VENDOR_NUM=0x0451
[all …]
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dfsl_secure_boot.h12 #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000
14 #define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000
16 #define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000
18 #define CONFIG_SYS_PBI_FLASH_BASE 0xce000000
20 #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000
41 #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000
48 (CONFIG_SYS_INIT_L3_VADDR & ~0xFFF00000) | \
49 0xbff00000
51 #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000
85 #define CONFIG_SPL_PPAACT_ADDR 0x2e000000
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_0_default.h26 #define cfgNB_NBCFG0_NB_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgNB_NBCFG0_NB_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgNB_NBCFG0_NB_COMMAND_DEFAULT 0x00000000
29 #define cfgNB_NBCFG0_NB_STATUS_DEFAULT 0x00000000
30 #define cfgNB_NBCFG0_NB_REVISION_ID_DEFAULT 0x00000000
31 #define cfgNB_NBCFG0_NB_REGPROG_INF_DEFAULT 0x00000000
32 #define cfgNB_NBCFG0_NB_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgNB_NBCFG0_NB_BASE_CODE_DEFAULT 0x00000000
34 #define cfgNB_NBCFG0_NB_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgNB_NBCFG0_NB_LATENCY_DEFAULT 0x00000000
[all …]
H A Dnbio_2_3_default.h26 #define mmBIF_BX_PF_MM_INDEX_DEFAULT 0x00000000
27 #define mmBIF_BX_PF_MM_DATA_DEFAULT 0x00000000
28 #define mmBIF_BX_PF_MM_INDEX_HI_DEFAULT 0x00000000
32 #define mmSYSHUB_INDEX_OVLP_DEFAULT 0x00000000
33 #define mmSYSHUB_DATA_OVLP_DEFAULT 0x00000000
34 #define mmPCIE_INDEX_DEFAULT 0x00000000
35 #define mmPCIE_DATA_DEFAULT 0x00000000
36 #define mmPCIE_INDEX2_DEFAULT 0x00000000
37 #define mmPCIE_DATA2_DEFAULT 0x00000000
38 #define mmSBIOS_SCRATCH_0_DEFAULT 0x00000000
[all …]
H A Dnbio_6_1_default.h26 #define cfgPSWUSCFG0_VENDOR_ID_DEFAULT 0x00000000
27 #define cfgPSWUSCFG0_DEVICE_ID_DEFAULT 0x00000000
28 #define cfgPSWUSCFG0_COMMAND_DEFAULT 0x00000000
29 #define cfgPSWUSCFG0_STATUS_DEFAULT 0x00000000
30 #define cfgPSWUSCFG0_REVISION_ID_DEFAULT 0x00000000
31 #define cfgPSWUSCFG0_PROG_INTERFACE_DEFAULT 0x00000000
32 #define cfgPSWUSCFG0_SUB_CLASS_DEFAULT 0x00000000
33 #define cfgPSWUSCFG0_BASE_CLASS_DEFAULT 0x00000000
34 #define cfgPSWUSCFG0_CACHE_LINE_DEFAULT 0x00000000
35 #define cfgPSWUSCFG0_LATENCY_DEFAULT 0x00000000
[all …]
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dfsl_epu.c13 {EPGCR, 0},
15 {EPECR0 + EPECR_STRIDE * 0, 0},
16 {EPECR0 + EPECR_STRIDE * 1, 0},
17 {EPECR0 + EPECR_STRIDE * 2, 0xF0004004},
18 {EPECR0 + EPECR_STRIDE * 3, 0x80000084},
19 {EPECR0 + EPECR_STRIDE * 4, 0x20000084},
20 {EPECR0 + EPECR_STRIDE * 5, 0x08000004},
21 {EPECR0 + EPECR_STRIDE * 6, 0x80000084},
22 {EPECR0 + EPECR_STRIDE * 7, 0x80000084},
23 {EPECR0 + EPECR_STRIDE * 8, 0x60000084},
[all …]
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,gic-v3.yaml33 enum: [ 0, 1, 2 ]
46 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
51 SPI interrupts are in the range [0-987]. PPI interrupts are in the
52 range [0-15]. Extended SPI interrupts are in the range [0-1023].
53 Extended PPI interrupts are in the range [0-127].
56 bits[3:0] trigger type and level flags.
68 of 0 if present.
83 ARMv8.0 architecture such as Cortex-A32, A34, A35, A53, A57, A72 and
99 multipleOf: 0x10000
100 exclusiveMinimum: 0
[all …]
/openbmc/linux/drivers/remoteproc/
H A Dimx_rproc.c28 #define IMX7D_SRC_SCR 0x0C
32 #define IMX7D_SW_M4C_NON_SCLR_RST BIT(0)
46 #define IMX8M_GPR22 0x58
47 #define IMX8M_GPR22_CM7_CPUWAIT BIT(0)
49 /* Address: 0x020D8000 */
50 #define IMX6SX_SRC_SCR 0x00
66 #define IMX_SIP_RPROC 0xC2000005
67 #define IMX_SIP_RPROC_START 0x00
68 #define IMX_SIP_RPROC_STARTED 0x01
69 #define IMX_SIP_RPROC_STOP 0x02
[all …]
/openbmc/u-boot/common/
H A DKconfig49 0 0 reset
109 default 0
116 default 0x1000
192 set to 0 to autoboot with no delay, but you can stop it by key input.
196 If this value is >= 0 then it is also used for the default delay
197 before starting the default entry in bootmenu. If it is < 0 then
273 default 0x400 if CONSOLE_RECORD
282 default 0x100 if CONSOLE_RECORD
302 range 0 8
307 0 - emergency
[all …]
/openbmc/linux/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/openbmc/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Dimx-regs.h11 #define CAAM_SEC_SRAM_BASE (0x26000000)
15 #define OCRAM_0_BASE (0x2F000000)
19 #define OCRAM_1_BASE (0x2F020000)
23 #define TCML_BASE (0x1FFD0000)
24 #define TCMU_BASE (0x20000000)
26 #define AIPS3_BASE (0x40800000UL)
28 #define AIPS2_BASE (0x40000000UL)
30 #define AIPS1_BASE (0x41080000UL)
32 #define AIPS0_BASE (0x41000000UL)
87 #define CORE_B_ROM_BASE (0x00000000)
[all …]