1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 27065b7d4SRuchika Gupta /* 37065b7d4SRuchika Gupta * Copyright 2010-2011 Freescale Semiconductor, Inc. 47065b7d4SRuchika Gupta */ 57065b7d4SRuchika Gupta 67065b7d4SRuchika Gupta #ifndef __FSL_SECURE_BOOT_H 77065b7d4SRuchika Gupta #define __FSL_SECURE_BOOT_H 8e04916a7Sgaurav rana #include <asm/config_mpc85xx.h> 9e04916a7Sgaurav rana 10e04916a7Sgaurav rana #ifdef CONFIG_SECURE_BOOT 117065b7d4SRuchika Gupta #if defined(CONFIG_FSL_CORENET) 127065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000 13a202b9f8SYork Sun #elif defined(CONFIG_TARGET_BSC9132QDS) 14f978f7c2SAneesh Bansal #define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000 15ebccf255SYork Sun #elif defined(CONFIG_TARGET_C29XPCIE) 16b3f0f632SAneesh Bansal #define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000 177065b7d4SRuchika Gupta #else 187065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_BASE 0xce000000 197065b7d4SRuchika Gupta #endif 207065b7d4SRuchika Gupta #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000 217065b7d4SRuchika Gupta 22d46a4a13SYork Sun #if defined(CONFIG_TARGET_B4860QDS) || \ 23d46a4a13SYork Sun defined(CONFIG_TARGET_B4420QDS) || \ 249c21d06cSYork Sun defined(CONFIG_TARGET_T4160QDS) || \ 25673c01c7SYork Sun defined(CONFIG_TARGET_T4240QDS) || \ 2680d26188SYork Sun defined(CONFIG_TARGET_T2080QDS) || \ 2786e0a313SYork Sun defined(CONFIG_TARGET_T2080RDB) || \ 28f4f66940SYork Sun defined(CONFIG_TARGET_T1040QDS) || \ 2978e56995SYork Sun defined(CONFIG_TARGET_T1040RDB) || \ 3078e56995SYork Sun defined(CONFIG_TARGET_T1040D4RDB) || \ 3178e56995SYork Sun defined(CONFIG_TARGET_T1042RDB) || \ 3278e56995SYork Sun defined(CONFIG_TARGET_T1042D4RDB) || \ 3378e56995SYork Sun defined(CONFIG_TARGET_T1042RDB_PI) || \ 345ff3f41dSYork Sun defined(CONFIG_ARCH_T1023) || \ 35e5d5f5a8SYork Sun defined(CONFIG_ARCH_T1024) 36aa36c84eSSumit Garg #ifndef CONFIG_SYS_RAMBOOT 37fb4a2409SAneesh Bansal #define CONFIG_SYS_CPC_REINIT_F 38aa36c84eSSumit Garg #endif 39e04916a7Sgaurav rana #define CONFIG_KEY_REVOCATION 40fb4a2409SAneesh Bansal #undef CONFIG_SYS_INIT_L3_ADDR 41fb4a2409SAneesh Bansal #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 42fb4a2409SAneesh Bansal #endif 43fb4a2409SAneesh Bansal 44467a40dfSAneesh Bansal #if defined(CONFIG_RAMBOOT_PBL) 45467a40dfSAneesh Bansal #undef CONFIG_SYS_INIT_L3_ADDR 46aa36c84eSSumit Garg #ifdef CONFIG_SYS_INIT_L3_VADDR 47aa36c84eSSumit Garg #define CONFIG_SYS_INIT_L3_ADDR \ 48aa36c84eSSumit Garg (CONFIG_SYS_INIT_L3_VADDR & ~0xFFF00000) | \ 49aa36c84eSSumit Garg 0xbff00000 50aa36c84eSSumit Garg #else 51467a40dfSAneesh Bansal #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 52467a40dfSAneesh Bansal #endif 53aa36c84eSSumit Garg #endif 54467a40dfSAneesh Bansal 55ebccf255SYork Sun #if defined(CONFIG_TARGET_C29XPCIE) 56e04916a7Sgaurav rana #define CONFIG_KEY_REVOCATION 57e04916a7Sgaurav rana #endif 58e04916a7Sgaurav rana 595e5fdd2dSYork Sun #if defined(CONFIG_ARCH_P3041) || \ 60e71372cbSYork Sun defined(CONFIG_ARCH_P4080) || \ 61cefe11cdSYork Sun defined(CONFIG_ARCH_P5020) || \ 6295390360SYork Sun defined(CONFIG_ARCH_P5040) || \ 63ce040c83SYork Sun defined(CONFIG_ARCH_P2041) 64e04916a7Sgaurav rana #define CONFIG_FSL_TRUST_ARCH_v1 65e04916a7Sgaurav rana #endif 66e04916a7Sgaurav rana 672ed948f4SAneesh Bansal #if defined(CONFIG_FSL_CORENET) && !defined(CONFIG_SYS_RAMBOOT) 68e04916a7Sgaurav rana /* The key used for verification of next level images 69e04916a7Sgaurav rana * is picked up from an Extension Table which has 70e04916a7Sgaurav rana * been verified by the ISBC (Internal Secure boot Code) 712ed948f4SAneesh Bansal * in boot ROM of the SoC. 722ed948f4SAneesh Bansal * The feature is only applicable in case of NOR boot and is 732ed948f4SAneesh Bansal * not applicable in case of RAMBOOT (NAND, SD, SPI). 74e04916a7Sgaurav rana */ 75e04916a7Sgaurav rana #define CONFIG_FSL_ISBC_KEY_EXT 76e04916a7Sgaurav rana #endif 77bdc22074SAneesh Bansal #endif /* #ifdef CONFIG_SECURE_BOOT */ 78e04916a7Sgaurav rana 79bdc22074SAneesh Bansal #ifdef CONFIG_CHAIN_OF_TRUST 80b63f8a43SSimon Glass #ifdef CONFIG_SPL_BUILD 818f01397bSSumit Garg /* 828f01397bSSumit Garg * PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init 838f01397bSSumit Garg * due to space crunch on CPC and thus malloc will not work. 848f01397bSSumit Garg */ 858f01397bSSumit Garg #define CONFIG_SPL_PPAACT_ADDR 0x2e000000 868f01397bSSumit Garg #define CONFIG_SPL_SPAACT_ADDR 0x2f000000 878f01397bSSumit Garg #define CONFIG_SPL_JR0_LIODN_S 454 888f01397bSSumit Garg #define CONFIG_SPL_JR0_LIODN_NS 458 898f01397bSSumit Garg /* 908f01397bSSumit Garg * Define the key hash for U-Boot here if public/private key pair used to 918f01397bSSumit Garg * sign U-boot are different from the SRK hash put in the fuse 928f01397bSSumit Garg * Example of defining KEY_HASH is 938f01397bSSumit Garg * #define CONFIG_SPL_UBOOT_KEY_HASH \ 948f01397bSSumit Garg * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" 958f01397bSSumit Garg * else leave it defined as NULL 968f01397bSSumit Garg */ 978f01397bSSumit Garg 988f01397bSSumit Garg #define CONFIG_SPL_UBOOT_KEY_HASH NULL 998f01397bSSumit Garg #endif /* ifdef CONFIG_SPL_BUILD */ 1008f01397bSSumit Garg 101bdc22074SAneesh Bansal #define CONFIG_FSL_SEC_MON 102bdc22074SAneesh Bansal 1038f01397bSSumit Garg #ifndef CONFIG_SPL_BUILD 1048f01397bSSumit Garg /* 1058f01397bSSumit Garg * fsl_setenv_chain_of_trust() must be called from 106d0a6d7ceSAneesh Bansal * board_late_init() 107d0a6d7ceSAneesh Bansal */ 108d0a6d7ceSAneesh Bansal 1095050f6f0SAneesh Bansal /* If Boot Script is not on NOR and is required to be copied on RAM */ 1105050f6f0SAneesh Bansal #ifdef CONFIG_BOOTSCRIPT_COPY_RAM 1115050f6f0SAneesh Bansal #define CONFIG_BS_HDR_ADDR_RAM 0x00010000 11269d4b48cSSumit Garg #define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000 1135050f6f0SAneesh Bansal #define CONFIG_BS_HDR_SIZE 0x00002000 1145050f6f0SAneesh Bansal #define CONFIG_BS_ADDR_RAM 0x00012000 11569d4b48cSSumit Garg #define CONFIG_BS_ADDR_DEVICE 0x00802000 1165050f6f0SAneesh Bansal #define CONFIG_BS_SIZE 0x00001000 1175050f6f0SAneesh Bansal 1185050f6f0SAneesh Bansal #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM 1195050f6f0SAneesh Bansal #else 1205050f6f0SAneesh Bansal 12198cb0efdSgaurav rana /* The bootscript header address is different for B4860 because the NOR 12298cb0efdSgaurav rana * mapping is different on B4 due to reduced NOR size. 12398cb0efdSgaurav rana */ 124d46a4a13SYork Sun #if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS) 12598cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xecc00000 12698cb0efdSgaurav rana #elif defined(CONFIG_FSL_CORENET) 12798cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xe8e00000 128a202b9f8SYork Sun #elif defined(CONFIG_TARGET_BSC9132QDS) 12998cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR 0x88020000 130ebccf255SYork Sun #elif defined(CONFIG_TARGET_C29XPCIE) 13198cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xec020000 13298cb0efdSgaurav rana #else 13398cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xee020000 13498cb0efdSgaurav rana #endif 13598cb0efdSgaurav rana 136bdc22074SAneesh Bansal #endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */ 1375050f6f0SAneesh Bansal 138bdc22074SAneesh Bansal #include <config_fsl_chain_trust.h> 1398f01397bSSumit Garg #endif /* #ifndef CONFIG_SPL_BUILD */ 140bdc22074SAneesh Bansal #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ 1410d2cff2dSPo Liu #endif 142