Lines Matching +full:0 +full:x2f000000
23 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
25 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
31 #define V2M_PA_CS0 0x00000000
32 #define V2M_PA_CS1 0x14000000
33 #define V2M_PA_CS2 0x18000000
34 #define V2M_PA_CS3 0x1c000000
35 #define V2M_PA_CS4 0x0c000000
36 #define V2M_PA_CS5 0x10000000
43 #define V2M_BASE 0x80000000
52 #define V2M_UART0 0x7ff80000
53 #define V2M_UART1 0x7ff70000
74 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
75 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
76 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
79 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
83 #define GICD_BASE (0x2f000000)
84 #define GICR_BASE (0x2f100000)
89 #define GICD_BASE (0x2f000000)
90 #define GICC_BASE (0x2c000000)
92 #define GICD_BASE (0x2C010000)
93 #define GICC_BASE (0x2C02f000)
103 #define CONFIG_SMC91111_BASE (0x01A000000)
119 #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
124 #define DRAM_SEC_SIZE 0x01000000
125 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
129 #define PHYS_SDRAM_2 (0x880000000)
130 #define PHYS_SDRAM_2_SIZE 0x180000000
144 "kernel_name=norkern\0" \
145 "kernel_alt_name=Image\0" \
146 "kernel_addr=0x80080000\0" \
147 "initrd_name=ramdisk.img\0" \
148 "initrd_addr=0x84000000\0" \
149 "fdtfile=board.dtb\0" \
150 "fdt_alt_name=juno\0" \
151 "fdt_addr=0x83000000\0" \
152 "fdt_high=0xffffffffffffffff\0" \
153 "initrd_high=0xffffffffffffffff\0" \
179 "kernel_name=Image\0" \
180 "kernel_addr=0x80080000\0" \
181 "initrd_name=ramdisk.img\0" \
182 "initrd_addr=0x88000000\0" \
183 "fdtfile=devtree.dtb\0" \
184 "fdt_addr=0x83000000\0" \
185 "fdt_high=0xffffffffffffffff\0" \
186 "initrd_high=0xffffffffffffffff\0"
199 "kernel_addr=0x80080000\0" \
200 "initrd_addr=0x84000000\0" \
201 "fdt_addr=0x83000000\0" \
202 "fdt_high=0xffffffffffffffff\0" \
203 "initrd_high=0xffffffffffffffff\0"
215 #define CONFIG_SYS_FLASH_BASE 0x08000000
220 #define CONFIG_ENV_ADDR 0x0BFC0000
221 #define CONFIG_ENV_SECT_SIZE 0x00010000
223 #define CONFIG_SYS_FLASH_BASE 0x0C000000
227 #define CONFIG_ENV_ADDR 0x0FFC0000
228 #define CONFIG_ENV_SECT_SIZE 0x00040000
235 #define FLASH_MAX_SECTOR_SIZE 0x00040000