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/openbmc/u-boot/include/configs/
H A Domap3_zoom1.h36 #define CONFIG_USBD_VENDORID 0x0451
37 #define CONFIG_USBD_PRODUCTID 0x5678
44 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
62 "loadaddr=0x82000000\0" \
63 "fdtaddr=0x80f80000\0" \
64 "bootfile=uImage\0" \
65 "fdtfile=omap3-ldp.dtb\0" \
66 "bootdir=/\0" \
67 "bootpart=0:1\0" \
68 "usbtty=cdc_acm\0" \
[all …]
H A Domap3_pandora.h33 "if mmc rescan && load mmc 0:1 ${loadaddr} autoboot.scr; then " \
40 func(MMC, mmc, 0) \
46 "usbtty=cdc_acm\0" \
48 "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
49 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
55 0x01F00000) /* 31MB */
66 #define CONFIG_ENV_OFFSET 0x260000
67 #define CONFIG_ENV_ADDR 0x260000
H A Ddevkit8000.h23 * header. That is 0x800FFFC0--0x80100000 should not be used for any
27 #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/
28 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
30 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
31 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
49 #define CONFIG_DM9000_BASE 0x2c000000
51 #define DM9000_DATA (CONFIG_DM9000_BASE + 0x400)
63 #define CONFIG_JFFS2_PART_OFFSET 0x680000
64 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
77 "loadaddr=0x82000000\0" \
[all …]
H A Dam3517_evm.h73 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
74 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000
77 * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
78 * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
79 * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000
80 * Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000
81 * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000
82 * RootFS Remaining Flash Space @ 0xB20000
91 "loadaddr=0x82000000\0" \
92 "console=ttyS2,115200n8\0" \
[all …]
H A Domap3_cairo.h25 * header. That is 0x800FFFC0--0x80100000 should not be used for any
30 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
32 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
33 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
44 #define CONFIG_SYS_I2C_NOPROBES { {0x0, 0x0} }
56 "machid=ffffffff\0" \
57 "fdt_high=0x87000000\0" \
58 "baudrate=115200\0" \
59 "fec_addr=00:50:C2:7E:90:F0\0" \
60 "netmask=255.255.255.0\0" \
[all …]
H A Domap3_evm.h23 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
26 #define CONFIG_SPL_TEXT_BASE 0x40200000
49 #define CONFIG_ENV_OFFSET 0x260000
50 #define CONFIG_ENV_ADDR 0x260000
54 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000
69 "run mmcboot\0"
81 "fi\0"
86 func(MMC, mmc, 0) \
87 func(LEGACY_MMC, legacy_mmc, 0) \
88 func(UBIFS, ubifs, 0) \
[all …]
H A Domap3_logic.h19 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
23 #define CONFIG_SPL_TEXT_BASE 0x40200000
33 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
67 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
68 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
69 "mmcdev=0\0" \
70 "mmcroot=/dev/mmcblk0p2 rw\0" \
71 "mmcrootfstype=ext4 rootwait\0" \
72 "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
73 "nandrootfstype=ubifs rootwait\0" \
[all …]
H A Dtao3530.h79 "loadaddr=0x82000000\0" \
80 "console=ttyO2,115200n8\0" \
81 "mpurate=600\0" \
82 "dvi_mode=omapfb.mode=dvi:1280x720-24@60\0" \
83 "tv_mode=omapfb.mode=tv:ntsc\0" \
84 "video_mode=omapdss.def_disp=lcd vram=6M omapfb.vram=0:2M,1:2M,2:2M\0" \
85 "lcd_mode=omapfb.mode=lcd:800x480@60 \0" \
86 "extra_options= \0" \
87 "mmcdev=0\0" \
88 "mmcroot=/dev/mmcblk0p2 rw\0" \
[all …]
H A Dcm_t3517.h34 * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000.
35 * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
36 * so that leaves DRAM base to DRAM base + 0x4000 available.
38 #define CONFIG_SYS_BOOTMAPSZ 0x4000
83 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
85 #define CONFIG_SYS_I2C_EEPROM_BUS 0
99 "loadaddr=0x82000000\0" \
100 "baudrate=115200\0" \
101 "console=ttyO2,115200n8\0" \
102 "netretry=yes\0" \
[all …]
H A Domap3_beagle.h18 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
21 #define CONFIG_SPL_TEXT_BASE 0x40200000
43 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
45 #define CONFIG_ENV_OFFSET 0x260000
46 #define CONFIG_ENV_ADDR 0x260000
50 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000
75 "run mmcboot\0"
87 "fi\0"
92 func(MMC, mmc, 0) \
93 func(LEGACY_MMC, legacy_mmc, 0) \
[all …]
H A Dcm_t35.h76 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
78 #define CONFIG_SYS_I2C_EEPROM_BUS 0
96 "loadaddr=0x82000000\0" \
97 "usbtty=cdc_acm\0" \
98 "console=ttyO2,115200n8\0" \
99 "mpurate=500\0" \
100 "vram=12M\0" \
101 "dvimode=1024x768MR-16@60\0" \
102 "defaultdisplay=dvi\0" \
103 "mmcdev=0\0" \
[all …]
H A Dam3517_crane.h86 #define CONFIG_USBD_VENDORID 0x0451
87 #define CONFIG_USBD_PRODUCTID 0x5678
110 #define CONFIG_JFFS2_PART_OFFSET 0x680000
111 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
118 "loadaddr=0x82000000\0" \
119 "console=ttyS2,115200n8\0" \
120 "mmcdev=0\0" \
123 "rootfstype=ext3 rootwait\0" \
126 "rootfstype=jffs2\0" \
127 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
[all …]
H A Domap5_uevm.h24 "dfu_bufsiz=0x10000\0" \
36 #define CONFIG_ENV_OFFSET 0x260000
47 #define CONFIG_SYS_I2C_TCA642X_ADDR 0x22
H A Dam57xx_evm.h21 #define CONFIG_SYS_MMC_ENV_PART 0
23 #define CONFIG_ENV_OFFSET 0x260000
33 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
41 "dfu_bufsiz=0x10000\0" \
48 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
50 "dfu_bufsiz=0x10000\0" \
82 * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
83 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
84 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
85 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
[all …]
H A Ddra7xx_evm.h19 #define CONFIG_MAX_MEM_MAPPED 0x80000000
25 #define CONFIG_ENV_OFFSET 0x260000
40 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
47 "dfu_bufsiz=0x10000\0" \
57 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
59 "dfu_bufsiz=0x10000\0" \
81 * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
82 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
83 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
84 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
[all …]
H A Dpengwyn.h21 #define CONFIG_ENV_SIZE 0x4000
25 "loadaddr=0x80200000\0" \
26 "fdtaddr=0x80F80000\0" \
27 "bootpart=0:2\0" \
28 "bootdir=/boot\0" \
29 "bootfile=zImage\0" \
30 "fdtfile=am335x-pengwyn.dtb\0" \
31 "console=ttyO0,115200n8\0" \
32 "optargs=\0" \
33 "mmcdev=0\0" \
[all …]
/openbmc/u-boot/include/net/pfe_eth/pfe/
H A Dcbus.h22 #define EMAC1_BASE_ADDR (CBUS_BASE_ADDR + 0x200000)
23 #define EGPI1_BASE_ADDR (CBUS_BASE_ADDR + 0x210000)
24 #define EMAC2_BASE_ADDR (CBUS_BASE_ADDR + 0x220000)
25 #define EGPI2_BASE_ADDR (CBUS_BASE_ADDR + 0x230000)
26 #define BMU1_BASE_ADDR (CBUS_BASE_ADDR + 0x240000)
27 #define BMU2_BASE_ADDR (CBUS_BASE_ADDR + 0x250000)
28 #define ARB_BASE_ADDR (CBUS_BASE_ADDR + 0x260000)
29 #define DDR_CONFIG_BASE_ADDR (CBUS_BASE_ADDR + 0x270000)
30 #define HIF_BASE_ADDR (CBUS_BASE_ADDR + 0x280000)
31 #define HGPI_BASE_ADDR (CBUS_BASE_ADDR + 0x290000)
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-linksys-rango.dts20 wan_amber@0 {
22 reg = <0x0>;
27 reg = <0x1>;
32 reg = <0x5>;
37 reg = <0x6>;
42 reg = <0x7>;
47 reg = <0x8>;
52 reg = <0x9>;
89 partition@0 {
91 reg = <0x0000000 0x200000>; /* 2MiB */
[all …]
/openbmc/linux/tools/testing/selftests/kvm/aarch64/
H A Dvgic_init.c23 #define GICR_TYPER 0x8
57 TEST_ASSERT(val == want, "%s; want '0x%x', got '0x%x'", msg, want, val); in v3_redist_reg_get()
63 GUEST_SYNC(0); in guest_code()
72 return __vcpu_run(vcpu) ? -errno : 0; in run_vcpu()
114 .size = 0x10000,
115 .alignment = 0x10000,
120 .size = NR_VCPUS * 0x20000,
121 .alignment = 0x10000,
126 .size = 0x1000,
127 .alignment = 0x1000,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dsamsung,exynos4212-fimc-is.yaml79 "^pmu@[0-9a-f]+$":
93 "^i2c-isp@[0-9a-f]+$":
115 pinctrl-0: true
146 reg = <0x12000000 0x260000>;
188 reg = <0x10020000 0x3000>;
193 reg = <0x12140000 0x100>;
196 pinctrl-0 = <&fimc_is_i2c1>;
199 #size-cells = <0>;
203 reg = <0x10>;
H A Dsamsung,fimc.yaml34 The clock specifier cell stores an index of a clock: 0, 1 for
78 "^csis@[0-9a-f]+$":
83 "^fimc@[0-9a-f]+$":
88 "^fimc-is@[0-9a-f]+$":
93 "^fimc-lite@[0-9a-f]+$":
121 ranges = <0x0 0x0 0x18000000>;
133 pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
138 reg = <0x11800000 0x1000>;
157 reg = <0x11880000 0x4000>;
165 assigned-clock-rates = <0>, <176000000>;
[all …]
/openbmc/u-boot/arch/mips/dts/
H A Dmscc,luton.dtsi15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
30 #clock-cells = <0>;
35 #clock-cells = <0>;
43 ranges = <0 0x60000000 0x10200000>;
46 pinctrl-0 = <&uart_pins>;
50 reg = <0x10100000 0x20>;
60 reg = <0x70068 0x68>;
63 gpio-ranges = <&gpio 0 0 32>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Darmada-ap806.dtsi73 reg = <0x0 0x4000000 0x0 0x200000>;
89 ranges = <0x0 0x0 0xf0000000 0x1000000>;
99 reg = <0x210000 0x10000>,
100 <0x220000 0x20000>,
101 <0x240000 0x20000>,
102 <0x260000 0x20000>;
107 reg = <0x280000 0x1000>;
114 reg = <0x290000 0x1000>;
121 reg = <0x2a0000 0x1000>;
128 reg = <0x2b0000 0x1000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-cm-t3x.dtsi10 reg = <0x80000000 0x10000000>; /* 256 MB */
16 pinctrl-0 = <&green_led_pins>;
46 #phy-cells = <0>;
53 #phy-cells = <0>;
79 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
80 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
86 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
87 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
88 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
89 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
[all …]
H A Domap3-tao3530.dtsi25 cpu@0 {
32 reg = <0x80000000 0x10000000>; /* 256 MB */
50 #phy-cells = <0>;
75 OMAP3_CORE1_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
76 OMAP3_CORE1_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
77 OMAP3_CORE1_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
78 OMAP3_CORE1_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
79 OMAP3_CORE1_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
80 OMAP3_CORE1_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
81 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
[all …]

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