1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/samsung,exynos4212-fimc-is.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung Exynos4212/4412 SoC Imaging Subsystem (FIMC-IS) 8 9maintainers: 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 13description: 14 The FIMC-IS is a subsystem for processing image signal from an image sensor. 15 The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5 16 processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C 17 and SPI bus controllers, PWM and ADC. 18 19properties: 20 compatible: 21 enum: 22 - samsung,exynos4212-fimc-is 23 24 reg: 25 maxItems: 1 26 27 ranges: true 28 29 '#address-cells': 30 const: 1 31 32 '#size-cells': 33 const: 1 34 35 clocks: 36 maxItems: 21 37 38 clock-names: 39 items: 40 - const: lite0 41 - const: lite1 42 - const: ppmuispx 43 - const: ppmuispmx 44 - const: isp 45 - const: drc 46 - const: fd 47 - const: mcuisp 48 - const: gicisp 49 - const: mcuctl_isp 50 - const: pwm_isp 51 - const: ispdiv0 52 - const: ispdiv1 53 - const: mcuispdiv0 54 - const: mcuispdiv1 55 - const: mpll 56 - const: aclk200 57 - const: aclk400mcuisp 58 - const: div_aclk200 59 - const: div_aclk400mcuisp 60 - const: uart 61 62 interrupts: 63 maxItems: 2 64 65 iommus: 66 maxItems: 4 67 68 iommu-names: 69 items: 70 - const: isp 71 - const: drc 72 - const: fd 73 - const: mcuctl 74 75 power-domains: 76 maxItems: 1 77 78patternProperties: 79 "^pmu@[0-9a-f]+$": 80 type: object 81 additionalProperties: false 82 description: 83 Node representing the SoC's Power Management Unit (duplicated with the 84 correct PMU node in the SoC). 85 86 properties: 87 reg: 88 maxItems: 1 89 90 required: 91 - reg 92 93 "^i2c-isp@[0-9a-f]+$": 94 type: object 95 $ref: /schemas/i2c/i2c-controller.yaml# 96 unevaluatedProperties: false 97 description: 98 ISP I2C bus controller 99 100 properties: 101 compatible: 102 const: samsung,exynos4212-i2c-isp 103 104 reg: 105 maxItems: 1 106 107 108 clocks: 109 maxItems: 1 110 111 clock-names: 112 items: 113 - const: i2c_isp 114 115 pinctrl-0: true 116 pinctrl-names: 117 items: 118 - const: default 119 120 required: 121 - compatible 122 - reg 123 - clocks 124 - clock-names 125 126required: 127 - compatible 128 - reg 129 - '#address-cells' 130 - clocks 131 - clock-names 132 - interrupts 133 - ranges 134 - '#size-cells' 135 136additionalProperties: false 137 138examples: 139 - | 140 #include <dt-bindings/clock/exynos4.h> 141 #include <dt-bindings/gpio/gpio.h> 142 #include <dt-bindings/interrupt-controller/arm-gic.h> 143 144 fimc-is@12000000 { 145 compatible = "samsung,exynos4212-fimc-is"; 146 reg = <0x12000000 0x260000>; 147 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 148 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 149 clocks = <&isp_clock CLK_ISP_FIMC_LITE0>, 150 <&isp_clock CLK_ISP_FIMC_LITE1>, 151 <&isp_clock CLK_ISP_PPMUISPX>, 152 <&isp_clock CLK_ISP_PPMUISPMX>, 153 <&isp_clock CLK_ISP_FIMC_ISP>, 154 <&isp_clock CLK_ISP_FIMC_DRC>, 155 <&isp_clock CLK_ISP_FIMC_FD>, 156 <&isp_clock CLK_ISP_MCUISP>, 157 <&isp_clock CLK_ISP_GICISP>, 158 <&isp_clock CLK_ISP_MCUCTL_ISP>, 159 <&isp_clock CLK_ISP_PWM_ISP>, 160 <&isp_clock CLK_ISP_DIV_ISP0>, 161 <&isp_clock CLK_ISP_DIV_ISP1>, 162 <&isp_clock CLK_ISP_DIV_MCUISP0>, 163 <&isp_clock CLK_ISP_DIV_MCUISP1>, 164 <&clock CLK_MOUT_MPLL_USER_T>, 165 <&clock CLK_ACLK200>, 166 <&clock CLK_ACLK400_MCUISP>, 167 <&clock CLK_DIV_ACLK200>, 168 <&clock CLK_DIV_ACLK400_MCUISP>, 169 <&clock CLK_UART_ISP_SCLK>; 170 clock-names = "lite0", "lite1", "ppmuispx", 171 "ppmuispmx", "isp", 172 "drc", "fd", "mcuisp", 173 "gicisp", "mcuctl_isp", "pwm_isp", 174 "ispdiv0", "ispdiv1", "mcuispdiv0", 175 "mcuispdiv1", "mpll", "aclk200", 176 "aclk400mcuisp", "div_aclk200", 177 "div_aclk400mcuisp", "uart"; 178 iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>, 179 <&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>; 180 iommu-names = "isp", "drc", "fd", "mcuctl"; 181 power-domains = <&pd_isp>; 182 183 #address-cells = <1>; 184 #size-cells = <1>; 185 ranges; 186 187 pmu@10020000 { 188 reg = <0x10020000 0x3000>; 189 }; 190 191 i2c-isp@12140000 { 192 compatible = "samsung,exynos4212-i2c-isp"; 193 reg = <0x12140000 0x100>; 194 clocks = <&isp_clock CLK_ISP_I2C1_ISP>; 195 clock-names = "i2c_isp"; 196 pinctrl-0 = <&fimc_is_i2c1>; 197 pinctrl-names = "default"; 198 #address-cells = <1>; 199 #size-cells = <0>; 200 201 image-sensor@10 { 202 compatible = "samsung,s5k6a3"; 203 reg = <0x10>; 204 svdda-supply = <&cam_io_reg>; 205 svddio-supply = <&ldo19_reg>; 206 afvdd-supply = <&ldo19_reg>; 207 clock-frequency = <24000000>; 208 clocks = <&camera 1>; 209 clock-names = "extclk"; 210 gpios = <&gpm1 6 GPIO_ACTIVE_LOW>; 211 212 port { 213 endpoint { 214 remote-endpoint = <&csis1_ep>; 215 data-lanes = <1>; 216 }; 217 }; 218 }; 219 }; 220 }; 221