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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-evk.dts42 pinctrl-0 = <&pinctrl_flexspi>;
45 flash@0 {
46 reg = <0>;
60 pinctrl-0 = <&pinctrl_usdhc3>;
71 MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2
72 MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82
73 MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82
74 MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82
75 MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82
76 MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82
[all …]
H A Dimx8mn-var-som.dtsi20 reg = <0x0 0x40000000 0 0x40000000>;
26 pinctrl-0 = <&pinctrl_reg_eth_phy>;
54 pinctrl-0 = <&pinctrl_ecspi1>;
56 <&gpio1 0 GPIO_ACTIVE_LOW>;
62 touchscreen@0 {
63 reg = <0>;
66 pinctrl-0 = <&pinctrl_restouch>;
90 pinctrl-0 = <&pinctrl_fec1>;
100 #size-cells = <0>;
120 pinctrl-0 = <&pinctrl_i2c1>;
[all …]
H A Dimx8mm-var-som.dtsi19 reg = <0x0 0x40000000 0 0x80000000>;
25 pinctrl-0 = <&pinctrl_reg_eth_phy>;
72 pinctrl-0 = <&pinctrl_ecspi1>;
74 <&gpio1 0 GPIO_ACTIVE_LOW>;
80 touchscreen@0 {
81 reg = <0>;
84 pinctrl-0 = <&pinctrl_restouch>;
108 pinctrl-0 = <&pinctrl_fec1>;
117 #size-cells = <0>;
132 pinctrl-0 = <&pinctrl_i2c1>;
[all …]
H A Dimx8mm-prt8mm.dts22 reg = <0x0 0x40000000 0 0x40000000>;
28 pinctrl-0 = <&pinctrl_gpio_leds>;
32 gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
64 pinctrl-0 = <&pinctrl_i2c1>;
69 reg = <0x34>;
70 #sound-dai-cells = <0>;
77 pinctrl-0 = <&pinctrl_i2c2>;
82 reg = <0x60>;
83 regulator-name = "0V9_CORE";
94 pinctrl-0 = <&pinctrl_i2c3>;
[all …]
H A Dimx8mm-innocomm-wb15.dtsi13 pinctrl-0 = <&pinctrl_modem_regulator>;
61 pinctrl-0 = <&pinctrl_i2c1>;
69 reg = <0x4b>;
70 pinctrl-0 = <&pinctrl_pmic>;
187 pinctrl-0 = <&pinctrl_i2c2>;
196 pinctrl-0 = <&pinctrl_i2c3>;
204 fsl,tx-deemph-gen1 = <0x2d>;
205 fsl,tx-deemph-gen2 = <0xf>;
211 pinctrl-0 = <&pinctrl_pcie0>;
222 pinctrl-0 = <&pinctrl_uart1>;
[all …]
H A Dimx8mp-icore-mx8mp.dtsi31 pinctrl-0 = <&pinctrl_i2c1>;
39 pinctrl-0 = <&pinctrl_pmic>;
40 reg = <0x25>;
119 pinctrl-0 = <&pinctrl_usdhc3>;
128 MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3
129 MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3
135 MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01 0x41
141 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
142 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
143 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
[all …]
H A Dimx8mm-icore-mx8mm.dtsi30 pinctrl-0 = <&pinctrl_fec1>;
36 #size-cells = <0>;
50 pinctrl-0 = <&pinctrl_i2c1>;
55 reg = <0x08>;
148 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
149 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
150 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
151 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
152 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
153 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
[all …]
H A Dimx8mp-beacon-som.dtsi14 reg = <0x0 0x40000000 0 0xc0000000>,
15 <0x1 0x00000000 0 0xc0000000>;
21 pinctrl-0 = <&pinctrl_reg_wl_bt>;
49 pinctrl-0 = <&pinctrl_eqos>;
58 #size-cells = <0>;
73 pinctrl-0 = <&pinctrl_flexspi0>;
76 flash0: flash@0 {
78 reg = <0>;
87 pinctrl-0 = <&pinctrl_i2c1>;
93 reg = <0x25>;
[all …]
H A Dimx8mm-nitrogen-r2.dts30 pinctrl-0 = <&pinctrl_reg_wlan_vmmc>;
57 pinctrl-0 = <&pinctrl_sound_wm8960>;
83 pinctrl-0 = <&pinctrl_ecspi2>;
90 pinctrl-0 = <&pinctrl_fec1>;
98 #size-cells = <0>;
110 pinctrl-0 = <&pinctrl_flexspi>;
117 pinctrl-0 = <&pinctrl_i2c1>;
122 reg = <0x8>;
214 pinctrl-0 = <&pinctrl_i2c3>;
219 reg = <0x70>;
[all …]
H A Dimx8mm-emcon.dtsi19 pinctrl-0 = <&pinctrl_gpio_led>;
38 pwms = <&pwm1 0 50000 0>;
40 0 4 8 16 32 64 80 96 112
68 pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
76 pinctrl-0 = <&pinctrl_fec1>;
84 #size-cells = <0>;
86 ethphy0: ethernet-phy@0 {
88 reg = <0>;
97 pinctrl-0 = <&pinctrl_flexspi0>;
101 flash0: flash@0 {
[all …]
H A Dimx8mm-beacon-som.dtsi15 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
24 reg = <0x0 0x40000000 0 0x80000000>;
66 pinctrl-0 = <&pinctrl_fec1>;
74 #size-cells = <0>;
76 ethphy0: ethernet-phy@0 {
78 reg = <0>;
85 pinctrl-0 = <&pinctrl_flexspi>;
88 flash@0 {
89 reg = <0>;
102 pinctrl-0 = <&pinctrl_i2c1>;
[all …]
H A Dimx8mn-beacon-som.dtsi16 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
25 reg = <0x0 0x40000000 0 0x80000000>;
74 pinctrl-0 = <&pinctrl_fec1>;
84 #size-cells = <0>;
86 ethphy0: ethernet-phy@0 {
88 reg = <0>;
95 pinctrl-0 = <&pinctrl_flexspi>;
98 flash@0 {
99 reg = <0>;
112 pinctrl-0 = <&pinctrl_i2c1>;
[all …]
H A Dimx8mp-venice-gw72xx.dtsi14 pinctrl-0 = <&pinctrl_gpio_leds>;
16 led-0 {
34 #clock-cells = <0>;
41 pinctrl-0 = <&pinctrl_pps>;
49 pinctrl-0 = <&pinctrl_reg_usb1_en>;
60 pinctrl-0 = <&pinctrl_reg_usb2_en>;
71 pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
74 gpio = <&gpio2 19 0>; /* SD2_RESET */
85 pinctrl-0 = <&pinctrl_spi2>;
105 pinctrl-0 = <&pinctrl_i2c2>;
[all …]
H A Dimx8mm-venice-gw72xx.dtsi20 pinctrl-0 = <&pinctrl_gpio_leds>;
22 led-0 {
40 #clock-cells = <0>;
47 pinctrl-0 = <&pinctrl_pps>;
62 pinctrl-0 = <&pinctrl_reg_usb1_en>;
73 pinctrl-0 = <&pinctrl_reg_usb2_en>;
86 pinctrl-0 = <&pinctrl_spi2>;
110 pinctrl-0 = <&pinctrl_i2c2>;
115 pinctrl-0 = <&pinctrl_accel>;
117 reg = <0x19>;
[all …]
H A Dimx8mm-emtop-som.dtsi25 pinctrl-0 = <&pinctrl_gpio_led>;
27 led-0 {
54 pinctrl-0 = <&pinctrl_i2c1>;
59 reg = <0x25>;
61 pinctrl-0 = <&pinctrl_pmic>;
159 pinctrl-0 = <&pinctrl_uart2>;
165 pinctrl-0 = <&pinctrl_usdhc3>;
175 pinctrl-0 = <&pinctrl_wdog>;
183 MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
184 MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19
[all …]
H A Dimx8mp-debix-model-a.dts26 pinctrl-0 = <&pinctrl_gpio_led>;
28 led-0 {
39 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
50 pinctrl-0 = <&pinctrl_reg_usb_hub>;
77 pinctrl-0 = <&pinctrl_eqos>;
85 #size-cells = <0>;
87 ethphy0: ethernet-phy@0 { /* RTL8211E */
89 reg = <0>;
100 pinctrl-0 = <&pinctrl_i2c1>;
105 reg = <0x25>;
[all …]
H A Dimx8mn-evk.dtsi17 pinctrl-0 = <&pinctrl_gpio_led>;
40 reg = <0x0 0x40000000 0 0x80000000>;
46 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
59 pinctrl-0 = <&pinctrl_ir>;
69 #sound-dai-cells = <0>;
72 pinctrl-0 = <&pinctrl_gpio_wlf>;
124 pinctrl-0 = <&pinctrl_fec1>;
132 #size-cells = <0>;
134 ethphy0: ethernet-phy@0 {
136 reg = <0>;
[all …]
H A Dimx8mp-debix-som-a.dtsi16 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
44 pinctrl-0 = <&pinctrl_i2c1>;
49 reg = <0x25>;
51 pinctrl-0 = <&pinctrl_pmic>;
146 pinctrl-0 = <&pinctrl_i2c4>;
151 reg = <0x48>;
153 #size-cells = <0>;
188 pinctrl-0 = <&pinctrl_usdhc3>;
200 pinctrl-0 = <&pinctrl_wdog>;
208 MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
[all …]
H A Dimx8mp-venice-gw73xx.dtsi14 pinctrl-0 = <&pinctrl_gpio_leds>;
16 led-0 {
34 #clock-cells = <0>;
41 pinctrl-0 = <&pinctrl_pps>;
49 pinctrl-0 = <&pinctrl_reg_usb1_en>;
60 pinctrl-0 = <&pinctrl_reg_usb2_en>;
71 pinctrl-0 = <&pinctrl_reg_wl>;
83 pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
86 gpio = <&gpio2 19 0>; /* SD2_RESET */
97 pinctrl-0 = <&pinctrl_spi2>;
[all …]
H A Dimx8mm-venice-gw73xx.dtsi20 pinctrl-0 = <&pinctrl_gpio_leds>;
22 led-0 {
40 #clock-cells = <0>;
47 pinctrl-0 = <&pinctrl_pps>;
70 pinctrl-0 = <&pinctrl_reg_usb1_en>;
81 pinctrl-0 = <&pinctrl_reg_usb2_en>;
92 pinctrl-0 = <&pinctrl_reg_wl>;
106 pinctrl-0 = <&pinctrl_spi2>;
130 pinctrl-0 = <&pinctrl_i2c2>;
135 pinctrl-0 = <&pinctrl_accel>;
[all …]
H A Dimx8mp-venice-gw702x.dtsi17 reg = <0x0 0x40000000 0 0x80000000>;
33 interrupts = <0>;
84 pinctrl-0 = <&pinctrl_eqos>;
92 #size-cells = <0>;
94 ethphy0: ethernet-phy@0 {
96 pinctrl-0 = <&pinctrl_ethphy0>;
98 reg = <0x0>;
112 pinctrl-0 = <&pinctrl_i2c1>;
120 reg = <0x20>;
121 pinctrl-0 = <&pinctrl_gsc>;
[all …]
H A Dimx8mm-icore-mx8mm-ctouch2.dts29 pinctrl-0 = <&pinctrl_i2c2>;
36 pinctrl-0 = <&pinctrl_i2c4>;
43 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
44 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
50 MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
51 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
57 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
58 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
64 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41
70 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
[all …]
H A Dimx8mm-icore-mx8mm-edimm2.2.dts29 pinctrl-0 = <&pinctrl_i2c2>;
36 pinctrl-0 = <&pinctrl_i2c4>;
43 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
44 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
50 MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
51 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
57 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
58 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
64 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x41
70 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
[all …]
H A Dimx8mp-phycore-som.dtsi21 reg = <0x0 0x40000000 0 0x80000000>;
44 pinctrl-0 = <&pinctrl_fec>;
52 #size-cells = <0>;
54 ethphy1: ethernet-phy@0 {
56 reg = <0>;
69 pinctrl-0 = <&pinctrl_flexspi0>;
72 som_flash: flash@0 {
74 reg = <0>;
84 pinctrl-0 = <&pinctrl_i2c1>;
92 reg = <0x25>;
[all …]
H A Dimx8mm-kontron-sl.dtsi19 reg = <0x0 0x40000000 0 0x80000000>;
61 pinctrl-0 = <&pinctrl_ecspi1>;
65 flash@0 {
68 reg = <0>;
75 partition@0 {
77 reg = <0x0 0x1e0000>;
82 reg = <0x1e0000 0x10000>;
87 reg = <0x1f0000 0x10000>;
96 pinctrl-0 = <&pinctrl_i2c1>;
101 reg = <0x25>;
[all …]

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