Lines Matching +full:0 +full:x1d0
20 pinctrl-0 = <&pinctrl_gpio_leds>;
22 led-0 {
40 #clock-cells = <0>;
47 pinctrl-0 = <&pinctrl_pps>;
62 pinctrl-0 = <&pinctrl_reg_usb1_en>;
73 pinctrl-0 = <&pinctrl_reg_usb2_en>;
86 pinctrl-0 = <&pinctrl_spi2>;
110 pinctrl-0 = <&pinctrl_i2c2>;
115 pinctrl-0 = <&pinctrl_accel>;
117 reg = <0x19>;
129 pinctrl-0 = <&pinctrl_i2c3>;
143 pinctrl-0 = <&pinctrl_pcie0>;
154 pcie@0,0 {
155 reg = <0x0000 0 0 0 0>;
157 #size-cells = <0>;
159 pcie@1,0 {
160 reg = <0x0000 0 0 0 0>;
162 #size-cells = <0>;
165 reg = <0x1800 0 0 0 0>;
167 #size-cells = <0>;
169 eth1: pcie@5,0 {
170 reg = <0x0000 0 0 0 0>;
172 #size-cells = <0>;
184 pinctrl-0 = <&pinctrl_sai3>;
194 pinctrl-0 = <&pinctrl_uart1>;
201 pinctrl-0 = <&pinctrl_uart3>;
208 pinctrl-0 = <&pinctrl_uart4>;
229 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
240 pinctrl-0 = <&pinctrl_hog>;
244 MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* PLUG_TEST */
245 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x40000041 /* PCI_USBSEL */
246 MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000041 /* PCIE_WDIS# */
247 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x40000041 /* DIO0 */
248 MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x40000041 /* DIO1 */
249 MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x40000104 /* RS485_TERM */
250 MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x40000104 /* RS485 */
251 MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x40000104 /* RS485_HALF */
257 MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x159
263 MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x19
264 MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x19
270 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
271 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
277 MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x41
283 MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41
289 MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x41
290 MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x41
296 MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x41
302 MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
303 MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
304 MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
305 MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
306 MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
312 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6
313 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6
314 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6
315 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6
321 MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
322 MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
328 MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
329 MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
335 MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140
336 MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140
342 MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
343 MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
344 MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
345 MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
346 MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
347 MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
353 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
354 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
355 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
356 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
357 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
358 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
364 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
365 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
366 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
367 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
368 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
369 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
375 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
376 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
377 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
378 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
379 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
380 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
386 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
387 MX8MM_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0x1d0
388 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0