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/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dnvidia,tegra234-xusb.yaml90 - usb2-0
94 - usb3-0
125 reg = <0x03610000 0x40000>,
126 <0x03600000 0x10000>,
127 <0x03650000 0x10000>;
158 phy-names = "usb2-0";
H A Dnvidia,tegra194-xusb.yaml86 - usb2-0
90 - usb3-0
141 reg = <0x03610000 0x40000>,
142 <0x03600000 0x10000>;
174 phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3";
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls2088a.dtsi16 cpu0: cpu@0 {
19 reg = <0x0>;
20 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
29 reg = <0x1>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
39 reg = <0x100>;
49 reg = <0x101>;
59 reg = <0x200>;
69 reg = <0x201>;
79 reg = <0x300>;
[all …]
H A Dfsl-ls2080a.dtsi16 cpu0: cpu@0 {
19 reg = <0x0>;
20 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
29 reg = <0x1>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
39 reg = <0x100>;
49 reg = <0x101>;
59 reg = <0x200>;
69 reg = <0x201>;
79 reg = <0x300>;
[all …]
H A Dfsl-ls1046a.dtsi38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0x0>;
44 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
53 reg = <0x1>;
54 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
63 reg = <0x2>;
64 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
73 reg = <0x3>;
74 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls1088a.dtsi27 #size-cells = <0>;
30 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
42 reg = <0x1>;
43 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
51 reg = <0x2>;
52 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
60 reg = <0x3>;
61 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls1043a.dtsi37 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x0>;
49 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
58 reg = <0x1>;
59 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
68 reg = <0x2>;
69 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
78 reg = <0x3>;
79 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-lx2160a.dtsi12 /memreserve/ 0x80000000 0x00010000;
26 #size-cells = <0>;
29 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
35 d-cache-size = <0x8000>;
38 i-cache-size = <0xC000>;
50 reg = <0x1>;
51 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
52 d-cache-size = <0x8000>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-ls1088a.dtsi16 reg = <0x00000000 0x80000000 0 0x80000000>;
22 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
23 <0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */
26 interrupts = <1 9 0x4>;
31 interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
32 <1 14 0x8>, /* Physical Non-Secure PPI, active-low */
33 <1 11 0x8>, /* Virtual PPI, active-low */
34 <1 10 0x8>; /* Hypervisor PPI, active-low */
40 reg = <0x0 0x21c0500 0x0 0x100>;
41 clock-frequency = <0>; /* Updated by bootloader */
[all …]
H A Dfsl-ls2080a.dtsi16 reg = <0x00000000 0x80000000 0 0x80000000>;
22 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
23 <0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */
26 interrupts = <1 9 0x4>;
31 interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
32 <1 14 0x8>, /* Physical Non-Secure PPI, active-low */
33 <1 11 0x8>, /* Virtual PPI, active-low */
34 <1 10 0x8>; /* Hypervisor PPI, active-low */
40 reg = <0x0 0x21c0500 0x0 0x100>;
41 clock-frequency = <0>; /* Updated by bootloader */
[all …]
H A Dfsl-ls1046a.dtsi18 #clock-cells = <0>;
27 reg = <0x0 0x1410000 0 0x10000>, /* GICD */
28 <0x0 0x1420000 0 0x10000>, /* GICC */
29 <0x0 0x1440000 0 0x20000>, /* GICH */
30 <0x0 0x1460000 0 0x20000>; /* GICV */
31 interrupts = <1 9 0xf08>;
42 reg = <0x0 0x1ee1000 0x0 0x1000>;
50 #size-cells = <0>;
51 reg = <0x0 0x2100000 0x0 0x10000>;
52 interrupts = <0 64 0x4>;
[all …]
H A Dfsl-ls1043a.dtsi18 #clock-cells = <0>;
27 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
28 <0x0 0x1402000 0 0x2000>, /* GICC */
29 <0x0 0x1404000 0 0x2000>, /* GICH */
30 <0x0 0x1406000 0 0x2000>; /* GICV */
31 interrupts = <1 9 0xf08>;
42 reg = <0x0 0x1ee1000 0x0 0x1000>;
50 #size-cells = <0>;
51 reg = <0x0 0x2100000 0x0 0x10000>;
52 interrupts = <0 64 0x4>;
[all …]
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsi.c61 mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011,
62 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
63 mmDB_DEBUG, 0xffffffff, 0x00000000,
64 mmDB_DEBUG2, 0xf00fffff, 0x00000400,
65 mmDB_DEBUG3, 0x0002021c, 0x00020200,
66 mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
67 0x340c, 0x000000c0, 0x00800040,
68 0x360c, 0x000000c0, 0x00800040,
69 mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
70 mmFBC_MISC, 0x00200000, 0x50100000,
[all …]
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi20 bus@0 {
25 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
29 reg = <0x0 0x00100000 0x0 0xf000>,
30 <0x0 0x0010f000 0x0 0x1000>;
36 reg = <0x0 0x2200000 0x0 0x10000>,
37 <0x0 0x2210000 0x0 0x10000>;
90 gpio-ranges = <&pinmux 0 0 169>;
95 reg = <0x0 0x02300000 0x0 0x1000>;
105 reg = <0x0 0x2390000 0x0 0x1000>,
106 <0x0 0x23a0000 0x0 0x1000>,
[all …]
H A Dtegra234.dtsi19 bus@0 {
24 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
28 reg = <0x0 0x00100000 0x0 0xf000>,
29 <0x0 0x0010f000 0x0 0x1000>;
35 reg = <0x0 0x02080000 0x0 0x00121000>;
36 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
58 reg = <0x0 0x02200000 0x0 0x10000>,
59 <0x0 0x02210000 0x0 0x10000>;
112 gpio-ranges = <&pinmux 0 0 164>;
117 reg = <0x0 0x2430000 0x0 0x19100>;
[all …]
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dsi.c161 #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc))
162 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc))
163 #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc))
167 (0x8000 << 16) | (0x98f4 >> 2),
168 0x00000000,
169 (0x8040 << 16) | (0x98f4 >> 2),
170 0x00000000,
171 (0x8000 << 16) | (0xe80 >> 2),
172 0x00000000,
173 (0x8040 << 16) | (0xe80 >> 2),
[all …]