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/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234-sim-vdk.dts11 mmc3 = "/bus@0/mmc@3460000";
16 bootargs = "console=ttyS0,115200n8 earlycon=uart8250,mmio32,0x03100000";
20 bus@0 {
H A Dtegra186.dtsi20 reg = <0x0 0x00100000 0x0 0xf000>,
21 <0x0 0x0010f000 0x0 0x1000>;
27 reg = <0x0 0x2200000 0x0 0x10000>,
28 <0x0 0x2210000 0x0 0x10000>;
44 reg = <0x0 0x02490000 0x0 0x10000>;
71 snps,burst-map = <0x7>;
78 reg = <0x0 0x2600000 0x0 0x210000>;
116 dma-channel-mask = <0xfffffffe>;
129 ranges = <0x02900000 0x0 0x02900000 0x200000>;
134 reg = <0x02900800 0x800>;
[all …]
H A Dtegra194.dtsi20 bus@0 {
25 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
29 reg = <0x0 0x00100000 0x0 0xf000>,
30 <0x0 0x0010f000 0x0 0x1000>;
36 reg = <0x0 0x2200000 0x0 0x10000>,
37 <0x0 0x2210000 0x0 0x10000>;
90 gpio-ranges = <&pinmux 0 0 169>;
95 reg = <0x0 0x02300000 0x0 0x1000>;
105 reg = <0x0 0x2390000 0x0 0x1000>,
106 <0x0 0x23a0000 0x0 0x1000>,
[all …]
H A Dtegra234.dtsi19 bus@0 {
24 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
28 reg = <0x0 0x00100000 0x0 0xf000>,
29 <0x0 0x0010f000 0x0 0x1000>;
35 reg = <0x0 0x02080000 0x0 0x00121000>;
36 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
58 reg = <0x0 0x02200000 0x0 0x10000>,
59 <0x0 0x02210000 0x0 0x10000>;
112 gpio-ranges = <&pinmux 0 0 164>;
117 reg = <0x0 0x2430000 0x0 0x19100>;
[all …]
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/images/firmware-image-juno/
H A Dimages-r0.txt7 NOR0ADDRESS: 0x00000000 ;Image Flash Address
13 NOR1ADDRESS: 0x03EC0000 ;Image Flash Address
19 NOR2ADDRESS: 0x00500000 ;Image Flash Address
26 NOR3ADDRESS: 0x03000000 ;Image Flash Address
33 NOR4ADDRESS: 0x030C0000 ;Image Flash Address
39 NOR5ADDRESS: 0x03E40000 ;Image Flash Address
45 NOR6ADDRESS: 0x0BF00000 ;Image Flash Address
52 NOR7ADDRESS: 0x0BFC0000 ;Image Flash Address
59 NOR8ADDRESS: 0x03100000 ;Image Flash Address
65 NOR9ADDRESS: 0x03180000 ;Image Flash Address
H A Dimages-r2.txt7 NOR0ADDRESS: 0x00000000 ;Image Flash Address
13 NOR1ADDRESS: 0x03EC0000 ;Image Flash Address
19 NOR2ADDRESS: 0x00500000 ;Image Flash Address
26 NOR3ADDRESS: 0x03000000 ;Image Flash Address
33 NOR4ADDRESS: 0x030C0000 ;Image Flash Address
39 NOR5ADDRESS: 0x03E40000 ;Image Flash Address
45 NOR6ADDRESS: 0x0BF00000 ;Image Flash Address
52 NOR7ADDRESS: 0x0BFC0000 ;Image Flash Address
59 NOR8ADDRESS: 0x03100000 ;Image Flash Address
65 NOR9ADDRESS: 0x03180000 ;Image Flash Address
H A Dimages-r1.txt7 NOR0ADDRESS: 0x00000000 ;Image Flash Address
13 NOR1ADDRESS: 0x03EC0000 ;Image Flash Address
19 NOR2ADDRESS: 0x00500000 ;Image Flash Address
26 NOR3ADDRESS: 0x03000000 ;Image Flash Address
33 NOR4ADDRESS: 0x030C0000 ;Image Flash Address
39 NOR5ADDRESS: 0x03E40000 ;Image Flash Address
45 NOR6ADDRESS: 0x0BF00000 ;Image Flash Address
52 NOR7ADDRESS: 0x0BFC0000 ;Image Flash Address
59 NOR8ADDRESS: 0x03100000 ;Image Flash Address
65 NOR9ADDRESS: 0x03180000 ;Image Flash Address
/openbmc/u-boot/include/configs/
H A Dtegra20-common.h19 #define CONFIG_STACKBASE 0x03800000 /* 56MB */
36 * decompress itself to 0x8000 after the start of RAM, kernel_addr_r
49 #define CONFIG_LOADADDR 0x01000000
51 "scriptaddr=0x10000000\0" \
52 "pxefile_addr_r=0x10100000\0" \
53 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
54 "fdt_addr_r=0x03000000\0" \
55 "ramdisk_addr_r=0x03100000\0"
58 #define CONFIG_SPL_TEXT_BASE 0x00108000
59 #define CONFIG_SYS_SPL_MALLOC_START 0x00090000
[all …]
/openbmc/qemu/docs/system/arm/
H A Dxlnx-versal-virt.rst48 address ``0xa0000000`` and have IRQs from 111 and upwards.
60 If there's no ``-kernel`` option, we generate a DTB and place it at 0x1000
81 -device virtio-rng-device,bus=virtio-mmio-bus.0 \
82 -drive if=none,index=0,file=hd0.qcow2,id=hd0,snapshot \
83 -drive file=qemu_sd.qcow2,if=sd,index=0,snapshot \
93 -append "rdinit=/sbin/init console=ttyAMA0,115200n8 earlycon=pl011,mmio,0xFF000000,115200n8" \
95 -device virtio-rng-device,bus=virtio-mmio-bus.0,rng=rng0 \
105 -device loader,file=petalinux-v2018.3/bl31.elf,cpu-num=0 \
107 -device loader,addr=0x20000000,file=petalinux-v2019.2/Image \
109 -device virtio-rng-device,bus=virtio-mmio-bus.0,rng=rng0 \
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sc8180x-tlmm.yaml74 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$"
114 reg = <0x03100000 0x300000>,
115 <0x03500000 0x700000>,
116 <0x03d00000 0x300000>;
123 gpio-ranges = <&tlmm 0 0 190>;
H A Dqcom,sm8150-pinctrl.yaml72 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$"
124 reg = <0x03100000 0x300000>,
125 <0x03500000 0x300000>,
126 <0x03900000 0x300000>,
127 <0x03d00000 0x300000>;
130 gpio-ranges = <&tlmm 0 0 176>;
H A Dqcom,sdm630-pinctrl.yaml77 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-3])$"
141 reg = <0x03100000 0x400000>,
142 <0x03500000 0x400000>,
143 <0x03900000 0x400000>;
147 gpio-ranges = <&tlmm 0 0 114>;
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dp1023rdb.dts56 size = <0 0x1000000>;
57 alignment = <0 0x1000000>;
60 size = <0 0x400000>;
61 alignment = <0 0x400000>;
64 size = <0 0x2000000>;
65 alignment = <0 0x2000000>;
70 ranges = <0x0 0xf 0xff000000 0x200000>;
74 ranges = <0x0 0xf 0xff200000 0x200000>;
78 ranges = <0x0 0x0 0xff600000 0x200000>;
83 reg = <0x53>;
[all …]
/openbmc/linux/arch/arm/mach-omap1/
H A Did.c22 #define OMAP_DIE_ID_0 0xfffe1800
23 #define OMAP_DIE_ID_1 0xfffe1804
24 #define OMAP_PRODUCTION_ID_0 0xfffe2000
25 #define OMAP_PRODUCTION_ID_1 0xfffe2004
26 #define OMAP32_ID_0 0xfffed400
27 #define OMAP32_ID_1 0xfffed404
40 { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000},
41 { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
42 { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
43 { .jtag_id = 0xb62c, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x08500000},
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8026-lg-lenok.dts17 qcom,board-id = <132 0x0a>;
18 qcom,msm-id = <199 0x20000>;
31 reg = <0x02f00000 0x100000>;
36 reg = <0x03100000 0x200000>;
41 reg = <0x03300000 0x1400000>;
57 pinctrl-0 = <&wlan_regulator_default_state>;
70 reg = <0x55>;
80 reg = <0x20>;
87 pinctrl-0 = <&touch_pins>;
90 #size-cells = <0>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dtegra186.dtsi19 <0x0 0x2200000 0x0 0x10000>,
20 <0x0 0x2210000 0x0 0x10000>;
36 reg = <0x0 0x02490000 0x0 0x10000>;
56 reg = <0x0 0x03100000 0x0 0x10000>;
63 reg = <0x0 0x3160000 0x0 0x100>;
66 #size-cells = <0>;
76 reg = <0x0 0x3180000 0x0 0x100>;
79 #size-cells = <0>;
89 reg = <0x0 0x3190000 0x0 0x100>;
92 #size-cells = <0>;
[all …]
H A Dsun9i-a80.dtsi61 #size-cells = <0>;
63 cpu0: cpu@0 {
69 reg = <0x0>;
78 reg = <0x1>;
87 reg = <0x2>;
96 reg = <0x3>;
105 reg = <0x100>;
114 reg = <0x101>;
123 reg = <0x102>;
132 reg = <0x103>;
[all …]
/openbmc/linux/arch/arm/net/
H A Dbpf_jit_32.h12 #define ARM_R0 0
29 #define ARM_COND_EQ 0x0 /* == */
30 #define ARM_COND_NE 0x1 /* != */
31 #define ARM_COND_CS 0x2 /* unsigned >= */
33 #define ARM_COND_CC 0x3 /* unsigned < */
35 #define ARM_COND_MI 0x4 /* < 0 */
36 #define ARM_COND_PL 0x5 /* >= 0 */
37 #define ARM_COND_VS 0x6 /* Signed Overflow */
38 #define ARM_COND_VC 0x7 /* No Signed Overflow */
39 #define ARM_COND_HI 0x8 /* unsigned > */
[all …]
/openbmc/linux/arch/arm/probes/
H A Ddecode-arm.c19 #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit)))))
21 #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25)
72 regs->ARM_pc = iaddr + 8 + disp + ((insn >> 23) & 0x2); in simulate_blx1()
79 int rm = insn & 0xf; in simulate_blx2bx()
85 regs->ARM_pc = rmv & ~0x1; in simulate_blx2bx()
87 if (rmv & 0x1) in simulate_blx2bx()
94 int rd = (insn >> 12) & 0xf; in simulate_mrs()
95 unsigned long mask = 0xf8ff03df; /* Mask out execution state */ in simulate_mrs()
122 DECODE_SIMULATE (0xfe300000, 0xf4100000, PROBES_PRELOAD_IMM),
128 DECODE_SIMULATE (0xfe300010, 0xf6100000, PROBES_PRELOAD_REG),
[all …]
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun9i-a80.dtsi65 #size-cells = <0>;
67 cpu0: cpu@0 {
73 reg = <0x0>;
82 reg = <0x1>;
91 reg = <0x2>;
100 reg = <0x3>;
109 reg = <0x100>;
118 reg = <0x101>;
127 reg = <0x102>;
136 reg = <0x103>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>, /* GICR */
39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsdm630.dtsi33 #clock-cells = <0>;
40 #clock-cells = <0>;
48 #size-cells = <0>;
53 reg = <0x0 0x100>;
73 reg = <0x0 0x101>;
88 reg = <0x0 0x102>;
103 reg = <0x0 0x103>;
115 CPU4: cpu@0 {
118 reg = <0x0 0x0>;
138 reg = <0x0 0x1>;
[all …]
H A Dsc8180x.dtsi27 #clock-cells = <0>;
33 #clock-cells = <0>;
41 #size-cells = <0>;
43 CPU0: cpu@0 {
46 reg = <0x0 0x0>;
50 qcom,freq-domain = <&cpufreq_hw 0>;
57 clocks = <&cpufreq_hw 0>;
75 reg = <0x0 0x100>;
79 qcom,freq-domain = <&cpufreq_hw 0>;
86 clocks = <&cpufreq_hw 0>;
[all …]
H A Dsm8150.dtsi30 #clock-cells = <0>;
37 #clock-cells = <0>;
45 #size-cells = <0>;
47 CPU0: cpu@0 {
50 reg = <0x0 0x0>;
51 clocks = <&cpufreq_hw 0>;
56 qcom,freq-domain = <&cpufreq_hw 0>;
58 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
79 reg = <0x0 0x100>;
80 clocks = <&cpufreq_hw 0>;
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dtable.c7 0x800, 0x8020D010,
8 0x804, 0x080112E0,
9 0x808, 0x0E028233,
10 0x80C, 0x12131113,
11 0x810, 0x20101263,
12 0x814, 0x020C3D10,
13 0x818, 0x03A00385,
14 0x820, 0x00000000,
15 0x824, 0x00030FE0,
16 0x828, 0x00000000,
[all …]