Home
last modified time | relevance | path

Searched +full:0 +full:x0003ffff (Results 1 – 25 of 87) sorted by relevance

1234

/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/privring/
H A Dgk104.c31 u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0800)); in gk104_privring_intr_hub()
32 u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0800)); in gk104_privring_intr_hub()
33 u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0800)); in gk104_privring_intr_hub()
41 u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0800)); in gk104_privring_intr_rop()
42 u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0800)); in gk104_privring_intr_rop()
43 u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0800)); in gk104_privring_intr_rop()
51 u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0800)); in gk104_privring_intr_gpc()
52 u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0800)); in gk104_privring_intr_gpc()
53 u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0800)); in gk104_privring_intr_gpc()
61 u32 intr0 = nvkm_rd32(device, 0x120058); in gk104_privring_intr()
[all …]
H A Dgf117.c30 nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800); in gf117_privring_init()
31 nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100); in gf117_privring_init()
32 nvkm_mask(device, 0x1223b0, 0x0003ffff, 0x00000fff); in gf117_privring_init()
33 return 0; in gf117_privring_init()
H A Dgf100.c31 u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0400)); in gf100_privring_intr_hub()
32 u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0400)); in gf100_privring_intr_hub()
33 u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0400)); in gf100_privring_intr_hub()
41 u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0400)); in gf100_privring_intr_rop()
42 u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0400)); in gf100_privring_intr_rop()
43 u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0400)); in gf100_privring_intr_rop()
51 u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0400)); in gf100_privring_intr_gpc()
52 u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0400)); in gf100_privring_intr_gpc()
53 u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0400)); in gf100_privring_intr_gpc()
61 u32 intr0 = nvkm_rd32(device, 0x121c58); in gf100_privring_intr()
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852c_rfk_table.c8 RTW89_DECL_RFK_WM(0xc004, BIT(17), 0x1),
9 RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1),
10 RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1),
11 RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1),
17 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x0),
18 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x1),
24 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x0),
25 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x1),
31 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
32 RTW89_DECL_RFK_WM(0x030c, BIT(28), 0x1),
[all …]
H A Drtw8852a_rfk_table.c8 RTW89_DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001),
9 RTW89_DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002),
10 RTW89_DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001),
11 RTW89_DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002),
12 RTW89_DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005),
13 RTW89_DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005),
14 RTW89_DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005),
15 RTW89_DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005),
16 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033),
17 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033),
[all …]
H A Drtw8851b_rfk_table.c8 RTW89_DECL_RFK_WM(0xc210, 0x003fc000, 0x80),
9 RTW89_DECL_RFK_WM(0xc224, 0x003fc000, 0x80),
10 RTW89_DECL_RFK_WM(0xc0f8, 0x30000000, 0x3),
11 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
12 RTW89_DECL_RFK_WM(0x030c, 0x1f000000, 0x1f),
13 RTW89_DECL_RFK_WM(0x032c, 0xc0000000, 0x0),
14 RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x0),
15 RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x1),
16 RTW89_DECL_RFK_WM(0x032c, BIT(16), 0x0),
17 RTW89_DECL_RFK_WM(0x032c, BIT(20), 0x1),
[all …]
H A Drtw8852b_rfk_table.c8 RTW89_DECL_RFK_WM(0xC0D4, 0xffffffff, 0x4486888c),
9 RTW89_DECL_RFK_WM(0xC0D8, 0xffffffff, 0xc6ba10e0),
10 RTW89_DECL_RFK_WM(0xc0dc, 0xffffffff, 0x30c52868),
11 RTW89_DECL_RFK_WM(0xc0e0, 0xffffffff, 0x05008128),
12 RTW89_DECL_RFK_WM(0xc0e4, 0xffffffff, 0x0000272b),
13 RTW89_DECL_RFK_WM(0xC1D4, 0xffffffff, 0x4486888c),
14 RTW89_DECL_RFK_WM(0xC1D8, 0xffffffff, 0xc6ba10e0),
15 RTW89_DECL_RFK_WM(0xc1dc, 0xffffffff, 0x30c52868),
16 RTW89_DECL_RFK_WM(0xc1e0, 0xffffffff, 0x05008128),
17 RTW89_DECL_RFK_WM(0xc1e4, 0xffffffff, 0x0000272b),
[all …]
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dr600_reg.h31 #define R600_PCIE_PORT_INDEX 0x0038
32 #define R600_PCIE_PORT_DATA 0x003c
34 #define R600_RCU_INDEX 0x0100
35 #define R600_RCU_DATA 0x0104
37 #define R600_UVD_CTX_INDEX 0xf4a0
38 #define R600_UVD_CTX_DATA 0xf4a4
40 #define R600_MC_VM_FB_LOCATION 0x2180
41 #define R600_MC_FB_BASE_MASK 0x0000FFFF
42 #define R600_MC_FB_BASE_SHIFT 0
43 #define R600_MC_FB_TOP_MASK 0xFFFF0000
[all …]
/openbmc/linux/drivers/media/pci/dm1105/
H A Ddm1105.c41 #define DM1105_BOARD_UNKNOWN 0
52 #define PCI_VENDOR_ID_TRIGEM 0x109f
55 #define PCI_VENDOR_ID_AXESS 0x195d
58 #define PCI_DEVICE_ID_DM1105 0x036f
61 #define PCI_DEVICE_ID_DW2002 0x2002
64 #define PCI_DEVICE_ID_DW2004 0x2004
67 #define PCI_DEVICE_ID_DM05 0x1105
73 #define DM1105_TSCTR 0x00
74 #define DM1105_DTALENTH 0x04
77 #define DM1105_GPIOVAL 0x08
[all …]
/openbmc/u-boot/arch/m68k/include/asm/coldfire/
H A Dflexcan.h15 u8 tmstamp; /* 0x00 Timestamp */
16 u8 ctrl; /* 0x01 Control */
17 u16 idh; /* 0x02 ID High */
18 u16 idl; /* 0x04 ID High */
19 u8 data[8]; /* 0x06 8 Byte Data Field */
20 u16 res; /* 0x0E */
22 u16 ctrl; /* 0x00 Control/Status */
23 u16 tmstamp; /* 0x02 Timestamp */
24 u32 id; /* 0x04 Identifier */
25 u8 data[8]; /* 0x08 8 Byte Data Field */
[all …]
/openbmc/linux/drivers/gpu/drm/msm/adreno/
H A Dadreno_pm4.xml.h52 VS_DEALLOC = 0,
119 DI_PT_NONE = 0,
168 DI_SRC_SEL_DMA = 0,
175 DI_FACE_CULL_NONE = 0,
182 INDEX_SIZE_IGN = 0,
183 INDEX_SIZE_16_BIT = 0,
186 INDEX_SIZE_INVALID = 0,
190 IGNORE_VISIBILITY = 0,
195 CP_TYPE0_PKT = 0,
196 CP_TYPE1_PKT = 0x40000000,
[all …]
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a23.c35 .para1 = 0, /* not used (only used when tpr13 bit 31 is set */
36 .para2 = 0, /* not used (only used when tpr13 bit 31 is set */
40 .mr3 = 0,
42 .tpr0 = 0x2ab83def,
43 .tpr1 = 0x18082356,
44 .tpr2 = 0x00034156,
45 .tpr3 = 0x448c5533,
46 .tpr4 = 0x08010d00,
47 .tpr5 = 0x0340b20f,
48 .tpr6 = 0x20d118cc,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Dsnps,dw-wdt.yaml69 default: [0x0001000 0x0002000 0x0004000 0x0008000
70 0x0010000 0x0020000 0x0040000 0x0080000
71 0x0100000 0x0200000 0x0400000 0x0800000
72 0x1000000 0x2000000 0x4000000 0x8000000]
87 reg = <0xffd02000 0x1000>;
88 interrupts = <0 171 4>;
96 reg = <0xffd02000 0x1000>;
97 interrupts = <0 171 4>;
100 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
101 0x000007FF 0x0000FFFF 0x0001FFFF
[all …]
/openbmc/linux/arch/mips/include/asm/mach-rc32434/
H A Ddma.h17 #define DMA0_BASE_ADDR 0x18040000
31 #define DMA_DESC_COUNT_BIT 0
32 #define DMA_DESC_COUNT_MSK 0x0003ffff
34 #define DMA_DESC_DS_MSK 0x00300000
37 #define DMA_DESC_DEV_CMD_MSK 0x01c00000
40 #define DMA_DESC_DEV_CMD_BYTE 0
71 #define DMA_CHAN_RUN_BIT (1 << 0)
74 #define DMA_CHAN_MODE_MSK 0x0000000c
75 #define DMA_CHAN_MODE_AUTO 0
82 #define DMA_STAT_FINI (1 << 0)
[all …]
/openbmc/linux/arch/xtensa/kernel/
H A Djump_label.c13 #define J_OFFSET_MASK 0x0003ffff
17 #define J_INSN 0x6
18 #define NOP_INSN 0x0020f0
20 #define J_INSN 0x60000000
21 #define NOP_INSN 0x0f020000
51 return 0; in patch_text_stop_machine()
58 .cpu_count = ATOMIC_INIT(0), in patch_text()
81 BUG_ON(!((d & J_SIGN_MASK) == 0 || in arch_jump_label_transform()
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dsdram_gen5.h22 #define SDR_CTRLGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x5000)
29 u32 dram_timing4; /* 0x10 */
34 u32 dram_addrw; /* 0x2c */
35 u32 dram_if_width; /* 0x30 */
39 u32 sbe_count; /* 0x40 */
43 u32 drop_addr; /* 0x50 */
47 u32 ctrl_width; /* 0x60 */
51 u32 rfifo_cmap; /* 0x70 */
55 u32 fpgaport_rst; /* 0x80 */
59 u32 prot_rule_addr; /* 0x90 */
[all …]
/openbmc/linux/drivers/media/usb/cx231xx/
H A Dcx231xx-reg.h17 #define SAV_ACTIVE_VIDEO_FIELD1 0x80
18 #define EAV_ACTIVE_VIDEO_FIELD1 0x90
20 #define SAV_ACTIVE_VIDEO_FIELD2 0xc0
21 #define EAV_ACTIVE_VIDEO_FIELD2 0xd0
23 #define SAV_VBLANK_FIELD1 0xa0
24 #define EAV_VBLANK_FIELD1 0xb0
26 #define SAV_VBLANK_FIELD2 0xe0
27 #define EAV_VBLANK_FIELD2 0xf0
29 #define SAV_VBI_FIELD1 0x20
30 #define EAV_VBI_FIELD1 0x30
[all …]
/openbmc/u-boot/include/linux/usb/
H A Dxhci-omap.h14 #define OMAP_XHCI_BASE 0x488d0000
15 #define OMAP_OCP1_SCP_BASE 0x4A081000
16 #define OMAP_OTG_WRAPPER_BASE 0x488c0000
17 #elif CONFIG_USB_XHCI_DRA7XX_INDEX == 0
18 #define OMAP_XHCI_BASE 0x48890000
19 #define OMAP_OCP1_SCP_BASE 0x4A084c00
20 #define OMAP_OTG_WRAPPER_BASE 0x48880000
23 #define OMAP_XHCI_BASE 0x483d0000
24 #define OMAP_OCP1_SCP_BASE 0x483E8000
25 #define OMAP_OTG_WRAPPER_BASE 0x483dc100
[all …]
/openbmc/linux/drivers/net/ethernet/dec/tulip/
H A D21142.c21 static u16 t21142_csr13[] = { 0x0001, 0x0009, 0x0009, 0x0000, 0x0001, };
22 u16 t21142_csr14[] = { 0xFFFF, 0x0705, 0x0705, 0x0000, 0x7F3D, };
23 static u16 t21142_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
36 int new_csr6 = 0; in t21142_media_task()
40 if ((csr14 & 0x80) && (csr12 & 0x7000) != 0x5000) in t21142_media_task()
46 if (tulip_check_duplex(dev) < 0) { in t21142_media_task()
70 } else if ((csr12 & 0x7000) != 0x5000) { in t21142_media_task()
77 new_csr6 = 0x82420000; in t21142_media_task()
78 dev->if_port = 0; in t21142_media_task()
79 iowrite32(0, ioaddr + CSR13); in t21142_media_task()
[all …]
/openbmc/linux/drivers/net/ethernet/sfc/siena/
H A Dsiena.c53 FRF_CZ_TC_TIMER_VAL, 0); in siena_push_irq_moderation()
61 if (efx->fc_disable++ == 0) in efx_siena_prepare_flush()
67 if (--efx->fc_disable == 0) in siena_finish_flush()
73 EFX_OWORD32(0x0003FFFF, 0x0003FFFF, 0x0003FFFF, 0x0003FFFF) },
75 EFX_OWORD32(0x000103FF, 0x00000000, 0x00000000, 0x00000000) },
77 EFX_OWORD32(0xFFFFFFFE, 0xFFFFFFFF, 0x0003FFFF, 0x00000000) },
79 EFX_OWORD32(0x7FFF0037, 0xFFFF8000, 0xFFFFFFFF, 0x03FFFFFF) },
81 EFX_OWORD32(0xFFFEFE80, 0x1FFFFFFF, 0x020000FE, 0x007FFFFF) },
83 EFX_OWORD32(0x001FFFFF, 0x00000000, 0x00000000, 0x00000000) },
85 EFX_OWORD32(0x00000003, 0x00000000, 0x00000000, 0x00000000) },
[all …]
/openbmc/u-boot/tools/
H A Dvybridimage.c16 * NAND page 0 boot header
23 }; /* 0x00000000 - 0x000001ff */
24 uint8_t sw_ecc[512]; /* 0x00000200 - 0x000003ff */
25 uint32_t padding[65280]; /* 0x00000400 - 0x0003ffff */
26 uint8_t ivt_prefix[1024]; /* 0x00040000 - 0x000403ff */
42 uint8_t bit0 = (byte & (1 << 0)) ? 1 : 0; in vybridimage_sw_ecc()
43 uint8_t bit1 = (byte & (1 << 1)) ? 1 : 0; in vybridimage_sw_ecc()
44 uint8_t bit2 = (byte & (1 << 2)) ? 1 : 0; in vybridimage_sw_ecc()
45 uint8_t bit3 = (byte & (1 << 3)) ? 1 : 0; in vybridimage_sw_ecc()
46 uint8_t bit4 = (byte & (1 << 4)) ? 1 : 0; in vybridimage_sw_ecc()
[all …]
/openbmc/u-boot/include/configs/
H A Dedb93xx.h38 #define CONFIG_ENV_SECT_SIZE 0x00020000
42 #define CONFIG_ENV_SECT_SIZE 0x00020000
46 #define CONFIG_ENV_SECT_SIZE 0x00020000
50 #define CONFIG_ENV_SECT_SIZE 0x00040000
54 #define CONFIG_ENV_SECT_SIZE 0x00020000
58 #define CONFIG_ENV_SECT_SIZE 0x00040000
62 #define CONFIG_ENV_SECT_SIZE 0x00040000
66 #define CONFIG_ENV_SECT_SIZE 0x00020000
83 #define CONFIG_SYS_SERIAL0 0x808C0000
84 #define CONFIG_SYS_SERIAL1 0x808D0000
[all …]
/openbmc/u-boot/arch/arm/mach-omap2/
H A Dpipe3-phy.c18 #define PLL_STATUS 0x00000004
19 #define PLL_GO 0x00000008
20 #define PLL_CONFIGURATION1 0x0000000C
21 #define PLL_CONFIGURATION2 0x00000010
22 #define PLL_CONFIGURATION3 0x00000014
23 #define PLL_CONFIGURATION4 0x00000020
25 #define PLL_REGM_MASK 0x001FFE00
27 #define PLL_REGM_F_MASK 0x0003FFFF
28 #define PLL_REGM_F_SHIFT 0
29 #define PLL_REGN_MASK 0x000001FE
[all …]
/openbmc/qemu/hw/misc/
H A Daspeed_xdma.c19 #define XDMA_BMC_CMDQ_ADDR 0x10
20 #define XDMA_BMC_CMDQ_ENDP 0x14
21 #define XDMA_BMC_CMDQ_WRP 0x18
22 #define XDMA_BMC_CMDQ_W_MASK 0x0003FFFF
23 #define XDMA_BMC_CMDQ_RDP 0x1C
24 #define XDMA_BMC_CMDQ_RDP_MAGIC 0xEE882266
25 #define XDMA_IRQ_ENG_CTRL 0x20
28 #define XDMA_IRQ_ENG_CTRL_W_MASK 0xBFEFF07F
29 #define XDMA_IRQ_ENG_STAT 0x24
32 #define XDMA_IRQ_ENG_STAT_RESET 0xF8000000
[all …]
/openbmc/linux/drivers/net/wireless/mediatek/mt76/mt7996/
H A Dcoredump.c16 .start = 0x00800000,
17 .len = 0x0004ffff,
21 .start = 0x00900000,
22 .len = 0x00037fff,
26 .start = 0x02200000,
27 .len = 0x0003ffff,
31 .start = 0x00400000,
32 .len = 0x00067fff,
36 .start = 0xe0000000,
37 .len = 0x0015ffff,
[all …]

1234