Home
last modified time | relevance | path

Searched +full:0 +full:- +full:100 (Results 1 – 25 of 1030) sorted by relevance

12345678910>>...42

/openbmc/qemu/target/hexagon/imported/mmvec/
H A Dencode_ext.def2 * Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
24 DEF_ENC(V6_extractw, ICLASS_LD" 001 0 000sssss PP0uuuuu --1ddddd") /* coproc insn, returns Rd */
32 DEF_CLASS32(ICLASS_NCJ" 1--- -------- PP------ --------",COPROC_VMEM)
33 DEF_CLASS32(ICLASS_NCJ" 1000 0-0ttttt PPi--iii ---ddddd",BaseOffset_VMEM_Loads)
34 DEF_CLASS32(ICLASS_NCJ" 1000 1-0ttttt PPivviii ---ddddd",BaseOffset_if_Pv_VMEM_Loads)
35 DEF_CLASS32(ICLASS_NCJ" 1000 0-1ttttt PPi--iii --------",BaseOffset_VMEM_Stores1)
36 DEF_CLASS32(ICLASS_NCJ" 1000 1-0ttttt PPi--iii 00------",BaseOffset_VMEM_Stores2)
37 DEF_CLASS32(ICLASS_NCJ" 1000 1-1ttttt PPivviii --------",BaseOffset_if_Pv_VMEM_Stores)
39 DEF_CLASS32(ICLASS_NCJ" 1001 0-0xxxxx PP---iii ---ddddd",PostImm_VMEM_Loads)
40 DEF_CLASS32(ICLASS_NCJ" 1001 1-0xxxxx PP-vviii ---ddddd",PostImm_if_Pv_VMEM_Loads)
[all …]
/openbmc/entity-manager/configurations/ampere/
H A Dmtmitchell_bp.json6 "Name": "Mitchell BP_$BUS % 100 + 1",
10 "Address": "0x6a",
11 "Bus": "$BUS % 100 * 8 + 48 + 0",
12 "Name": "nvme$BUS % 100 * 8 + 0",
16 "Address": "0x6a",
17 "Bus": "$BUS % 100 * 8 + 48 + 1",
18 "Name": "nvme$BUS % 100 * 8 + 1",
22 "Address": "0x6a",
23 "Bus": "$BUS % 100 * 8 + 48 + 2",
24 "Name": "nvme$BUS % 100 * 8 + 2",
[all …]
/openbmc/openbmc/meta-openembedded/meta-python/recipes-devtools/python/python3-pydantic-core/
H A D0001-Upgrade-radium-to-1.0.patch3 Date: Fri, 18 Apr 2025 17:54:42 -0700
6 Upstream-Status: Submitted [https://github.com/ferrilab/bitvec/pull/220]
7 Signed-off-by: Khem Raj <raj.khem@gmail.com>
8 ---
9 Cargo.toml | 2 +-
10 src/macros/tests.rs | 256 ++++++++++++++++++++++----------------------
11 src/mem.rs | 28 ++---
12 src/serdes.rs | 58 +++++-----
13 src/store.rs | 61 +++++------
14 5 files changed, 207 insertions(+), 198 deletions(-)
[all …]
/openbmc/u-boot/post/lib_powerpc/
H A Dthree.c1 // SPDX-License-Identifier: GPL-2.0+
16 * The test contains a pre-built table of instructions, operands and
40 100,
46 100,
47 -200,
48 -100
52 100,
58 100,
59 -200,
60 -100
[all …]
/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
19 #define DDR_CTRL_UPD_MRS BIT(0)
22 #define DDR_REFRESH_M 0x3ff
26 #define DDR_TRAS_S 0
27 #define DDR_TRAS_M 0x1f
29 #define DDR_TRCD_M 0xf
32 #define DDR_TRP_M 0xf
35 #define DDR_TRRD_M 0xf
38 #define DDR_TRFC_M 0x7f
[all …]
/openbmc/u-boot/arch/mips/mach-ath79/ar934x/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
18 AR934X_SDRAM = 0,
32 [AR934X_SDRAM] = { 0x7fbe8cd0, 0x959f66a8, 0x33, 0, 0x1f1f },
33 [AR934X_DDR1] = { 0x7fd48cd0, 0x99d0e6a8, 0x33, 0, 0x14 },
34 [AR934X_DDR2] = { 0xc7d48cd0, 0x9dd0e6a8, 0x33, 0, 0x10012 },
51 cycle = 0xffff; in ar934x_ddr_init()
54 if (gd->arch.rev) { in ar934x_ddr_init()
55 ctl = BIT(6); /* Undocumented bit :-( */ in ar934x_ddr_init()
57 cycle = 0xff; in ar934x_ddr_init()
59 cycle = 0xffff; in ar934x_ddr_init()
[all …]
/openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/static/fonts/
H A Dglyphicons-halflings-regular.svg2 <!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd" >
6 <font id="glyphicons_halflingsregular" horiz-adv-x="1200" >
7 <font-face units-per-em="1200" ascent="960" descent="-240" />
8 <missing-glyph horiz-adv-x="500" />
9 <glyph horiz-adv-x="0" />
10 <glyph horiz-adv-x="400" />
12 …0 34 -1.5t30 -3.5l11 -1q10 -2 17.5 -10.5t7.5 -18.5v-224l158 158q7 7 18 8t19 -6l106 -106q7 -8 6 -19…
13 …0 35.5 -14.5t14.5 -35.5v-350h350q21 0 35.5 -14.5t14.5 -35.5v-200q0 -21 -14.5 -35.5t-35.5 -14.5h-35…
15 …0 12.5 -5t-5.5 -13l-364 -364q-6 -6 -11 -18h268q10 0 13 -6t-3 -14l-120 -160q-6 -8 -18 -14t-22 -6h-1…
16 <glyph unicode="&#x2000;" horiz-adv-x="650" />
[all …]
/openbmc/openbmc-test-automation/data/
H A DRomulus.py17 "/org/openbmc/sensors": 0,
20 "/org/openbmc/control/chassis0": 0,
21 "/org/openbmc/control/power0": 0,
22 "/org/openbmc/control/flash/bios": 0,
361 0x01: "<inventory_root>/system/chassis/motherboard/cpu0",
362 0x02: "<inventory_root>/system/chassis/motherboard/cpu1",
363 0x03: "<inventory_root>/system/chassis/motherboard",
364 0x04: "<inventory_root>/system/chassis/motherboard/dimm0",
365 0x05: "<inventory_root>/system/chassis/motherboard/dimm1",
366 0x06: "<inventory_root>/system/chassis/motherboard/dimm2",
[all …]
/openbmc/phosphor-webui/app/common/styles/base/
H A Dmixins.scss3 @if $breakpoint == "x-small" {
4 @media (min-width: 25em) {
10 @media (min-width: 47.938em) {
15 @media (min-width: 64em) {
20 @media (min-width: 85.375em) {
24 } @else if $breakpoint == "x-large" {
25 @media (min-width: 100em) {
34 font-family: Helvetica, Arial, Verdana, sans-serif;
35 font-weight: 200;
39 font-family: Helvetica, Arial, Verdana, sans-serif;
[all …]
/openbmc/qemu/target/riscv/
H A Dinsn16.decode2 # RISC-V translation routines for the RVXI Base Integer Instruction Set.
4 # Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
5 # Bastian Koppelmann, kbastian@mail.uni-paderborn.de
80 @cb_z ... ... ... .. ... .. &b imm=%imm_cb rs1=%rs1_3 rs2=0
88 @c_li ... . ..... ..... .. &i imm=%imm_ci rs1=0 %rd
90 @c_jalr ... . ..... ..... .. &i imm=0 rs1=%rd
91 @c_mv ... . ..... ..... .. &i imm=0 rs1=%rs2_5 %rd
112 # *** RV32/64C Standard Extension (Quadrant 0) ***
114 # Opcode of all zeros is illegal; rd != 0, nzuimm == 0 is reserved.
115 illegal 000 000 000 00 --- 00
[all …]
/openbmc/u-boot/include/linux/
H A Dmii.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * linux/mii.h: definitions for MII-compatible transceivers
13 #define MII_BMCR 0x00 /* Basic mode control register */
14 #define MII_BMSR 0x01 /* Basic mode status register */
15 #define MII_PHYSID1 0x02 /* PHYS ID 1 */
16 #define MII_PHYSID2 0x03 /* PHYS ID 2 */
17 #define MII_ADVERTISE 0x04 /* Advertisement control reg */
18 #define MII_LPA 0x05 /* Link partner ability reg */
19 #define MII_EXPANSION 0x06 /* Expansion register */
20 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
[all …]
/openbmc/phosphor-webui/app/common/styles/elements/
H A Dloader.scss4 0% { transform: rotate(0deg);}
5 100% { transform: rotate(360deg);}
14 transform: translate(-50%, -50%);
15 margin: 3em 0;
16 z-index: 91;
20 width:100%;
21 height:100%;
22 transform: translateZ(0) rotate(360deg);
23 transform-origin: center center;
24 -moz-transform-origin: center center; /* firefox requires fixed values */
[all …]
/openbmc/qemu/target/hexagon/imported/
H A Dencode_subinsn.def2 * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
25 /* Ld1-type subinsns */
27 DEF_ENC_SUBINSN(SL1_loadri_io, SUBINSN_L1, "0iiiissssdddd")
31 /* St1-type subinsns */
33 DEF_ENC_SUBINSN(SS1_storew_io, SUBINSN_S1, "0ii iisssstttt")
38 /* Ld2-type subinsns */
43 DEF_ENC_SUBINSN(SL2_loadri_sp, SUBINSN_L2, "111 0iiiiidddd")
46 DEF_ENC_SUBINSN(SL2_deallocframe,SUBINSN_L2, "111 1100---0--")
48 DEF_ENC_SUBINSN(SL2_return, SUBINSN_L2, "111 1101---0--")
49 DEF_ENC_SUBINSN(SL2_return_t, SUBINSN_L2, "111 1101---100")
[all …]
/openbmc/qemu/tests/qemu-iotests/
H A D061.out6 wrote 131072/131072 bytes at offset 0
8 magic 0x514649fb
10 backing_file_offset 0x0
11 backing_file_size 0x0
14 crypt_method 0
16 l1_table_offset 0x30000
17 refcount_table_offset 0x10000
19 nb_snapshots 0
20 snapshot_offset 0x0
22 compatible_features [0]
[all …]
H A D07725 seq=`basename $0`
34 trap "_cleanup; exit \$status" 0 1 2 3 15
54 echo "open -o driver=$IMGFMT,file.align=4k blkdebug::$TEST_IMG"
57 aio_write -P 10 0x200 0x200
62 off=0x1000
66 aio_write -P 10 $((off + 0x200)) 0x200
68 aio_write -P 11 $((off + 0x400)) 0x200
69 sleep 100
73 off=$((off + 0x1000))
79 aio_write -P 10 0x5000 0x200
[all …]
/openbmc/openbmc-test-automation/security/
H A Dtest_bmc_connections.robot65 # Every 100th iteration, check BMC allows patch with auth token.
66 ${status}= Run Keyword If ${iter} % 100 == 0 Run Keyword And Return Status
70 ${verify_count}= Evaluate ${iterations}/100
73 Should Be Equal As Integers ${fail_count} ${0}
77 Verify User Cannot Login After 5 Non-Logged In Sessions
79 ... are 5 non-logged in sessions.
80 [Tags] Verify_User_Cannot_Login_After_5_Non-Logged_In_Sessions
85 FOR ${iter} IN RANGE ${0} ${MAX_UNAUTH_PER_IP}
121 # Every 100th iteration, check BMC allows post with auth token.
122 ${status}= Run Keyword If ${iter} % 100 == 0 Run Keyword And Return Status
[all …]
/openbmc/entity-manager/configurations/ibm/
H A Dgenesis3_chassis.json4 "Address": "0x2e",
7 "Index": 0,
8 "MaxReading": 0,
18 "Address": "0x2e",
21 "Index": 0,
22 "MaxReading": 0,
28 "Address": "0x2e",
31 "Index": 0,
32 "MaxReading": 0,
42 "Address": "0x2e",
[all …]
/openbmc/qemu/target/arm/tcg/
H A Dsve.decode37 # A combination of tsz:imm3 -- extract esize.
39 # A combination of tsz:imm3 -- extract (2 * esize) - (tsz:imm3)
41 # A combination of tsz:imm3 -- extract (tsz:imm3) - esize
49 # Signed 8-bit immediate, optionally shifted left by 8.
51 # Unsigned 8-bit immediate, optionally shifted left by 8.
57 # Either a copy of rd (at bit 0), or a different source
59 %reg_movprfx 0:5
63 %pnd 0:3 !function=plus_8
106 @pd_pn_e0 ........ ........ ....... rn:4 . rd:4 &rr_esz esz=0
115 @pd_pg_pn_s0 ........ . . ...... .. pg:4 . rn:4 . rd:4 &rpr_s s=0
[all …]
/openbmc/qemu/tests/unit/
H A Dtest-thread-pool.c3 #include "block/thread-pool.h"
7 #include "qemu/error-report.h"
8 #include "qemu/main-loop.h"
22 return qatomic_fetch_inc(&data->n); in worker_cb()
28 if (qatomic_cmpxchg(&data->n, 0, 1) == 0) { in long_cb()
30 qatomic_or(&data->n, 2); in long_cb()
32 return 0; in long_cb()
38 g_assert(data->ret == -EINPROGRESS || data->ret == -ECANCELED); in done_cb()
39 data->ret = ret; in done_cb()
40 data->aiocb = NULL; in done_cb()
[all …]
/openbmc/u-boot/board/sbc8349/
H A Dsbc8349.c1 // SPDX-License-Identifier: GPL-2.0+
3 * sbc8349.c -- WindRiver SBC8349 board support.
4 * Copyright (c) 2006-2007 Wind River Systems, Inc.
33 return 0; in board_early_init_f()
42 u32 msize = 0; in dram_init()
44 if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im) in dram_init()
45 return -1; in dram_init()
47 /* DDR SDRAM - Main SODIMM */ in dram_init()
48 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
65 /* set total bus SDRAM size(bytes) -- DDR */ in dram_init()
[all …]
/openbmc/u-boot/board/freescale/common/
H A Didt8t49n222a_serdes_clk.c1 // SPDX-License-Identifier: GPL-2.0+
9 #define DEVICE_ID_REG 0x00
13 u8 val = 0; in check_pll_status()
16 ret = i2c_read(idt_addr, 0x17, 1, &val, 1); in check_pll_status()
17 if (ret < 0) { in check_pll_status()
18 printf("IDT:0x%x could not read status register from device.\n", in check_pll_status()
23 if (val & 0x04) { in check_pll_status()
27 return -1; in check_pll_status()
30 return 0; in check_pll_status()
37 u8 dev_id = 0; in set_serdes_refclk()
[all …]
/openbmc/u-boot/test/dm/
H A Dsound.c1 // SPDX-License-Identifier: GPL-2.0+
23 ut_asserteq_str("audio-codec", uc_priv->codec->name); in dm_test_sound()
24 ut_asserteq_str("i2s", uc_priv->i2s->name); in dm_test_sound()
25 ut_asserteq(0, sandbox_get_setup_called(dev)); in dm_test_sound()
27 ut_assertok(sound_beep(dev, 1, 100)); in dm_test_sound()
29 ut_assertok(sound_beep(dev, 1, 100)); in dm_test_sound()
32 return 0; in dm_test_sound()
43 ut_asserteq(-ENOSYS, sound_start_beep(dev, 100)); in dm_test_sound_beep()
44 ut_asserteq(0, sandbox_get_beep_frequency(dev)); in dm_test_sound_beep()
47 ut_asserteq(0, sound_start_beep(dev, 100)); in dm_test_sound_beep()
[all …]
/openbmc/phosphor-webui/app/server-control/styles/
H A Dremote-console.scss1 .serial-lan__wrapper {
3 .btn-export {
4 margin: 1.8em 0 1.8em 2em;
6 height: 100%;
9 .serial-lan__copy {
10 padding: 1em 0;
13 .serial-lan__header {
14 background: $primary-light;
15 padding-bottom: 1.2em;
16 line-height: 0;
[all …]
/openbmc/qemu/tests/qtest/
H A Dtest-arm-mptimer.c7 * See the COPYING file in the top-level directory.
12 #include "libqtest-single.h"
14 #define TIMER_BLOCK_SCALE(s) ((((s) & 0xff) + 1) * 10)
19 #define TIMER_BASE_PHYS 0x1e000600
21 #define TIMER_LOAD 0x00
22 #define TIMER_COUNTER 0x04
23 #define TIMER_CONTROL 0x08
24 #define TIMER_INTSTAT 0x0C
26 #define TIMER_CONTROL_ENABLE (1 << 0)
29 #define TIMER_CONTROL_PRESCALER(p) (((p) & 0xff) << 8)
[all …]
/openbmc/openbmc/meta-evb/meta-evb-raspberrypi/conf/templates/default/
H A Dlocal.conf.sample2 DISTRO ?= "openbmc-phosphor"
5 EXTRA_IMAGE_FEATURES ?= "allow-root-login"
9 STOPTASKS,${TMPDIR},1G,100K \
10 STOPTASKS,${DL_DIR},1G,100K \
11 STOPTASKS,${SSTATE_DIR},1G,100K \
12 STOPTASKS,/tmp,100M,100K \
13 HALT,${TMPDIR},100M,1K \
14 HALT,${DL_DIR},100M,1K \
15 HALT,${SSTATE_DIR},100M,1K \
19 # Set the root password to '0penBmc'
[all …]

12345678910>>...42