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/openbmc/linux/drivers/thermal/ti-soc-thermal/
H A Domap3-thermal-data.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 Texas Instruments Inc.
21 #include "ti-thermal.h"
22 #include "ti-bandgap.h"
50 -40000, -40000, -40000, -40000, -40000, -39000, -38000, -36000,
51 -34000, -32000, -31000, -29000, -28000, -26000, -25000, -24000,
52 -22000, -21000, -19000, -18000, -17000, -15000, -14000, -12000,
53 -11000, -9000, -8000, -7000, -5000, -4000, -2000, -1000, 0000,
56 28000, 30000, 31000, 32000, 34000, 35000, 37000, 38000, 39000,
118 -40000, -40000, -40000, -40000, -40000, -40000, -40000, -40000,
[all …]
H A Domap4-thermal-data.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 Texas Instruments Inc.
10 #include "ti-thermal.h"
11 #include "ti-bandgap.h"
12 #include "omap4xxx-bandgap.h"
44 omap4430_adc_to_temp[OMAP4430_ADC_END_VALUE - OMAP4430_ADC_START_VALUE + 1] = {
45 -40000, -38000, -35000, -34000, -32000, -30000, -28000, -26000, -24000,
46 -22000, -20000, -18500, -17000, -15000, -13500, -12000, -10000, -8000,
47 -6500, -5000, -3500, -1500, 0, 2000, 3500, 5000, 6500, 8500, 10000,
49 30000, 32000, 33500, 35000, 37000, 38500, 40000, 42000, 43500, 45000,
[all …]
/openbmc/u-boot/arch/x86/include/asm/
H A Dspeedstep.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2007-2009 coresystems GmbH
72 /* Table of p-states for EMTTM and ACPI by decreasing performance. */
81 #define SPEEDSTEP_MAX_POWER_MEROM 35000
84 #define SPEEDSTEP_MAX_POWER_PENRYN 35000
/openbmc/linux/drivers/thermal/
H A Drockchip_thermal.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
4 * Caesar Wang <wxt@rock-chips.com>
55 * struct chip_tsadc_table - hold information about chip-specific differences
69 * struct rockchip_tsadc_chip - hold the private data of tsadc chip
72 * @tshut_temp: the hardware-controlled shutdown temperature value
73 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
74 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
80 * @set_tshut_temp: set the hardware-controlled shutdown temperature
81 * @set_tshut_mode: set the hardware-controlled shutdown mode
[all …]
H A Ddb8500_thermal.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * db8500_thermal.c - DB8500 Thermal Management Implementation
5 * Copyright (C) 2012 ST-Ericsson
6 * Copyright (C) 2012-2019 Linaro Ltd.
13 #include <linux/mfd/dbx500-prcmu.h>
24 * db8500_thermal_points - the interpolation points that trigger
32 35000,
71 *temp = th->interpolated_temp; in db8500_thermal_get_temp()
87 th->cur_index = idx; in db8500_thermal_update_config()
88 th->interpolated_temp = (next_low + next_high)/2; in db8500_thermal_update_config()
[all …]
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dnand_timings.c4 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
76 .tCS_min = 35000,
124 .tRC_min = 35000,
135 .tWC_min = 35000,
271 * onfi_async_timing_mode_to_sdr_timings - [NAND Interface] Retrieve NAND
278 return ERR_PTR(-EINVAL); in onfi_async_timing_mode_to_sdr_timings()
285 * onfi_init_data_interface - [NAND Interface] Initialize a data interface from
296 return -EINVAL; in onfi_init_data_interface()
299 return -EINVAL; in onfi_init_data_interface()
308 if (chip->onfi_version) { in onfi_init_data_interface()
[all …]
/openbmc/openbmc/meta-ibm/recipes-phosphor/sensors/phosphor-hwmon/witherspoon-tacoma/obmc/hwmon/ahb/apb@1e780000/bus@1e78a000/i2c@200/
H A Ddps310@76.conf4 CRITHI_temp1 = "35000"
6 OFFSET_temp1 = "-2000"
H A Dbmp280@77.conf4 CRITHI_temp1 = "35000"
6 OFFSET_temp1 = "-2000"
/openbmc/openbmc/meta-ibm/recipes-phosphor/sensors/phosphor-hwmon/witherspoon/obmc/hwmon/ahb/apb@1e780000/bus@1e78a000/i2c@100/
H A Dbmp280@77.conf4 CRITHI_temp1 = "35000"
6 OFFSET_temp1 = "-2000"
H A Ddps310@76.conf4 CRITHI_temp1 = "35000"
6 OFFSET_temp1 = "-2000"
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dradeon_clocks.c42 struct radeon_pll *spll = &rdev->clock.spll; in radeon_legacy_get_engine_clock()
48 fb_div *= spll->reference_freq; in radeon_legacy_get_engine_clock()
72 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_legacy_get_memory_clock()
78 fb_div *= mpll->reference_freq; in radeon_legacy_get_memory_clock()
106 struct radeon_device *rdev = dev->dev_private; in radeon_read_clocks_OF()
107 struct device_node *dp = rdev->pdev->dev.of_node; in radeon_read_clocks_OF()
109 struct radeon_pll *p1pll = &rdev->clock.p1pll; in radeon_read_clocks_OF()
110 struct radeon_pll *p2pll = &rdev->clock.p2pll; in radeon_read_clocks_OF()
111 struct radeon_pll *spll = &rdev->clock.spll; in radeon_read_clocks_OF()
112 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_read_clocks_OF()
[all …]
/openbmc/linux/lib/
H A Dtest_vmalloc.c1 // SPDX-License-Identifier: GPL-2.0
102 return -1; in random_size_align_alloc_test()
125 return -1; in align_shift_alloc_test()
143 return -1; in fix_align_alloc_test()
162 return -1; in random_size_alloc_test()
175 int rv = -1; in long_busy_list_alloc_test()
218 int rv = -1; in full_fit_alloc_test()
277 return -1; in fix_size_alloc_test()
296 pcpu = vmalloc(sizeof(void __percpu *) * 35000); in pcpu_alloc_test()
298 return -1; in pcpu_alloc_test()
[all …]
/openbmc/linux/drivers/mtd/nand/raw/
H A Dnand_timings.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
16 * For non-ONFI chips we use the highest possible value for tPROG and tBERS.
89 .tCS_min = 35000,
140 .tRC_min = 35000,
151 .tWC_min = 35000,
316 .tCS_min = 35000,
557 * onfi_find_closest_sdr_mode - Derive the closest ONFI SDR timing mode given a
567 for (mode = ARRAY_SIZE(onfi_sdr_timings) - 1; mode > 0; mode--) { in onfi_find_closest_sdr_mode()
570 if (spec_timings->tCCS_min <= onfi_timings->tCCS_min && in onfi_find_closest_sdr_mode()
[all …]
/openbmc/linux/drivers/iio/adc/
H A Dqcom-vadc-common.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/fixp-arith.h>
6 #include <linux/iio/adc/qcom-vadc-common.h>
14 * struct vadc_map_pt - Map the graph representation for ADC channel
26 {1758, -40000 },
27 {1742, -35000 },
28 {1719, -30000 },
29 {1691, -25000 },
30 {1654, -20000 },
31 {1608, -15000 },
[all …]
/openbmc/linux/Documentation/devicetree/bindings/thermal/
H A Dgeneric-adc-thermal.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/thermal/generic-adc-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laxman Dewangan <ldewangan@nvidia.com>
16 temperature using voltage-temperature lookup table.
20 const: generic-adc-thermal
22 '#thermal-sensor-cells':
25 io-channels:
28 io-channel-names:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iio/potentiostat/
H A Dti,lmp91000.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matt Ranostay <matt.ranostay@konsulko.com>
20 - ti,lmp91000
21 - ti,lmp91002
26 io-channels:
29 ti,external-tia-resistor:
32 If the property ti,tia-gain-ohm is not defined this needs to be set to
35 ti,tia-gain-ohm:
[all …]
/openbmc/u-boot/drivers/ddr/microchip/
H A Dddr2_timing.h1 /* SPDX-License-Identifier: GPL-2.0+ */
18 /* default write latency for all speed grades = CL-1 */
21 /* From Micron MT47H64M16HR-3 data sheet */
40 #define T_FAW 35000 /* psec */
53 #define COL_LO_MASK ((1 << COL_BITS) - 1)
56 #define BA_MASK ((1 << BA_BITS) - 1)
59 #define ROW_ADDR_MASK ((1 << ROW_BITS) - 1)
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234-p3767.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 vcc-supply = <&vdd_1v8_hs>;
18 address-width = <8>;
21 read-only;
29 compatible = "jedec,spi-nor";
31 spi-max-frequency = <102000000>;
32 spi-tx-bus-width = <4>;
33 spi-rx-bus-width = <4>;
44 bus-width = <4>;
45 cd-gpios = <&gpio TEGRA234_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>;
[all …]
/openbmc/u-boot/drivers/misc/
H A Djz4780_efuse.c1 // SPDX-License-Identifier: GPL-2.0+
43 ((count - 1) << EFUSE_EFUCTRL_LEN_BIT) | in jz4780_efuse_read_chunk()
87 count -= chunk; in jz4780_efuse_read()
97 tmp = (((35000 * (ahb2_rate / 1000000)) / 1000000) - 4) - rd_adj; in jz4780_efuse_init()
/openbmc/linux/Documentation/devicetree/bindings/leds/
H A Dissi,is31fl319x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vincent Knecht <vincent.knecht@mailoo.org>
14 Previously known as Si-En SN319{0,1,3,6,9}.
26 - issi,is31fl3190
27 - issi,is31fl3191
28 - issi,is31fl3193
29 - issi,is31fl3196
30 - issi,is31fl3199
[all …]
/openbmc/linux/drivers/phy/
H A Dphy-core-mipi-dphy.c1 /* SPDX-License-Identifier: GPL-2.0 */
13 #include <linux/phy/phy-mipi-dphy.h>
16 * Minimum D-PHY timings based on MIPI D-PHY specification. Derived
18 * of the D-PHY specification (v1.2).
29 return -EINVAL; in phy_mipi_dphy_calc_config()
39 cfg->clk_miss = 0; in phy_mipi_dphy_calc_config()
40 cfg->clk_post = 60000 + 52 * ui; in phy_mipi_dphy_calc_config()
41 cfg->clk_pre = 8; in phy_mipi_dphy_calc_config()
42 cfg->clk_prepare = 38000; in phy_mipi_dphy_calc_config()
43 cfg->clk_settle = 95000; in phy_mipi_dphy_calc_config()
[all …]
/openbmc/linux/drivers/media/dvb-frontends/
H A Dzl10036.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for Zarlink zl10036 DVB-S silicon tuner
6 * Copyright (C) 2007-2009 Matthias Schwarzott <zzam@gentoo.de>
10 * http://www.mcmilk.de/projects/dvb-card/datasheets/ZL10036.pdf
12 * This one is working: (at my Avermedia DVB-S Pro)
13 * - zl10036 (40pin, FTA)
63 { .addr = state->config->tuner_address, .flags = I2C_M_RD, in zl10036_read_status_reg()
67 if (i2c_transfer(state->i2c, msg, 1) != 1) { in zl10036_read_status_reg()
69 __func__, state->config->tuner_address); in zl10036_read_status_reg()
70 return -EIO; in zl10036_read_status_reg()
[all …]
/openbmc/linux/include/linux/phy/
H A Dphy-mipi-dphy.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set
13 * MIPI D-PHY phy.
20 * Clock transitions and disable the Clock Lane HS-RX.
53 * Lane LP-00 Line state immediately before the HS-0 Line
86 * Time, in picoseconds, that the transmitter drives the HS-0
97 * Time, in picoseconds, that the transmitter drives the HS-0
108 * Maximum value: 35000 ps + 4 * @hs_clk_rate period in ps
116 * of @hs_trail or @clk_trail, to the start of the LP- 11
126 * Time, in picoseconds, that the transmitter drives LP-11
[all …]
/openbmc/u-boot/drivers/thermal/
H A Dti-bandgap.c4 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
15 * Taken from Linux v4.9 (drivers/thermal/ti-soc-thermal/ti-bandgap.c)
37 /* Index 540 - 549 */
38 -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200,
39 -37800,
40 /* Index 550 - 559 */
41 -37400, -37000, -36600, -36200, -35800, -35300, -34700, -34200, -33800,
42 -33400,
43 /* Index 560 - 569 */
44 -33000, -32600, -32200, -31800, -31400, -31000, -30600, -30200, -29800,
[all …]
/openbmc/u-boot/board/freescale/b4860qds/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2011-2012 Freescale Semiconductor, Inc.
44 .tfaw_ps = 35000,
55 memset(pdimm->mpart, 0, sizeof(pdimm->mpart)); in fsl_ddr_get_dimm_params()
56 memcpy(pdimm->mpart, dimm_model, sizeof(dimm_model) - 1); in fsl_ddr_get_dimm_params()
109 if (!pdimm->n_ranks) in fsl_ddr_board_options()
119 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
120 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
121 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
122 popts->cpo_override = pbsp->cpo; in fsl_ddr_board_options()
[all …]

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