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Searched defs:UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h661 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT … macro
H A Duvd_4_0_sh_mask.h759 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT 0x00000000 macro
H A Duvd_4_2_sh_mask.h534 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT 0x0 macro
H A Duvd_3_1_sh_mask.h530 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT 0x0 macro
H A Duvd_6_0_sh_mask.h568 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT 0x0 macro
H A Duvd_5_0_sh_mask.h566 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1181 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT … macro
H A Dvcn_2_5_sh_mask.h2691 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h2687 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h44 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h3749 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h3995 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h4030 #define UVD_VCPU_CACHE_SIZE2__CACHE_SIZE2__SHIFT … macro