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Searched defs:UVD_RBC_RB_CNTL__RB_BUFSZ_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h741 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro
H A Duvd_4_0_sh_mask.h596 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK 0x0000001fL macro
H A Duvd_4_2_sh_mask.h615 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK 0x1f macro
H A Duvd_3_1_sh_mask.h609 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK 0x1f macro
H A Duvd_6_0_sh_mask.h679 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK 0x1f macro
H A Duvd_5_0_sh_mask.h677 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK 0x1f macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1268 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro
H A Dvcn_2_5_sh_mask.h2915 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro
H A Dvcn_2_0_0_sh_mask.h2886 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3239 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro
H A Dvcn_3_0_0_sh_mask.h3995 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro
H A Dvcn_4_0_0_sh_mask.h4245 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro
H A Dvcn_4_0_3_sh_mask.h4288 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro