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Searched defs:UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h225 #define UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT 0x00000008 macro
H A Duvd_4_2_sh_mask.h284 #define UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT 0x8 macro
H A Duvd_3_1_sh_mask.h284 #define UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT 0x8 macro
H A Duvd_6_0_sh_mask.h310 #define UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT 0x8 macro
H A Duvd_5_0_sh_mask.h308 #define UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT 0x8 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h2034 #define UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h1986 #define UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h3705 #define UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h2764 #define UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h3882 #define UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h3917 #define UVD_CGC_UDEC_STATUS__IT_VCLK__SHIFT … macro