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Searched defs:UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h223 #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT 0x00000006 macro
H A Duvd_4_2_sh_mask.h280 #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT 0x6 macro
H A Duvd_3_1_sh_mask.h280 #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT 0x6 macro
H A Duvd_6_0_sh_mask.h306 #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT 0x6 macro
H A Duvd_5_0_sh_mask.h304 #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT 0x6 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h2032 #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h1984 #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h3703 #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h2762 #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h3880 #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h3915 #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT … macro