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Searched defs:UVD_CGC_UDEC_STATUS__IT_SCLK_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h222 #define UVD_CGC_UDEC_STATUS__IT_SCLK_MASK 0x00000040L macro
H A Duvd_4_2_sh_mask.h279 #define UVD_CGC_UDEC_STATUS__IT_SCLK_MASK 0x40 macro
H A Duvd_3_1_sh_mask.h279 #define UVD_CGC_UDEC_STATUS__IT_SCLK_MASK 0x40 macro
H A Duvd_6_0_sh_mask.h305 #define UVD_CGC_UDEC_STATUS__IT_SCLK_MASK 0x40 macro
H A Duvd_5_0_sh_mask.h303 #define UVD_CGC_UDEC_STATUS__IT_SCLK_MASK 0x40 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h2047 #define UVD_CGC_UDEC_STATUS__IT_SCLK_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1999 #define UVD_CGC_UDEC_STATUS__IT_SCLK_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3718 #define UVD_CGC_UDEC_STATUS__IT_SCLK_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2777 #define UVD_CGC_UDEC_STATUS__IT_SCLK_MASK … macro
H A Dvcn_4_0_0_sh_mask.h3895 #define UVD_CGC_UDEC_STATUS__IT_SCLK_MASK … macro
H A Dvcn_4_0_3_sh_mask.h3930 #define UVD_CGC_UDEC_STATUS__IT_SCLK_MASK … macro