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336aee50 |
| 16-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-tegra
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ceff355a |
| 16-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-sunxi Update A20-OLinuXino-Lime2-eMMC_defconfig to include CONFIG_SCSI Signed-off-by: Tom Rini <trini@konsulko.com>
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470135be |
| 16-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://www.denx.de/git/u-boot-imx Update pfla02 for setenv changes and PHYLIB/etc migration to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
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390194d4 |
| 16-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-spi
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c1c3fe23 |
| 03-Aug-2017 |
Simon Glass <sjg@chromium.org> |
env: Convert CONFIG_ENV_IS_IN... to a choice At present we support multiple environment drivers but there is not way to select between them at run time. Also settings related to the posi
env: Convert CONFIG_ENV_IS_IN... to a choice At present we support multiple environment drivers but there is not way to select between them at run time. Also settings related to the position and size of the environment area are global (i.e. apply to all locations). Until these limitations are removed we cannot really support more than one environment location. Adjust the location to be a choice so that only one can be selected. By default the environment is 'nowhere', meaning that the environment exists only in memory and cannot be saved. Also expand the help for the 'nowhere' option and move it to the top since it is the default. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Move all of the imply logic to default X if Y so it works again] Signed-off-by: Tom Rini <trini@konsulko.com>
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c1b62ba9 |
| 14-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-rockchip
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b529993e |
| 03-Aug-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
spl: add hierarchical defaults for SPL_LDSCRIPT With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config node), all the lingering definitions in header files will cause w
spl: add hierarchical defaults for SPL_LDSCRIPT With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config node), all the lingering definitions in header files will cause warnings/errors due to the redefinition of the configuration item. As we don't want to pollute the defconfig files (and values should usually be identical for entire architectures), the defaults are moved into Kconfig. Kconfig will always pick the first default that matches, so please keep these values at the end of each file (to allow any board-specific Kconfig, which will be included earlier) to override with an unconditional default setting. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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2218b32d |
| 31-Jul-2017 |
Tom Rini <trini@konsulko.com> |
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot Patch queue for efi - 2017-07-29 A lot of EFI greatness this time around. Thanks a lot to the two amazing new contri
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot Patch queue for efi - 2017-07-29 A lot of EFI greatness this time around. Thanks a lot to the two amazing new contributors Heinrich Schuchardt and Rob Clark we now gain - stable objects across multiple bootefi invocations - fixes for shim - fixes for ipxe - protocol installation - device path conversion to/from text - working "lsefi" support in grub - working notifiers - various bug fixes
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0ddc9c17 |
| 26-Jul-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-mips
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2be29653 |
| 23-Jul-2017 |
Simon Glass <sjg@chromium.org> |
Convert CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to Kconfig This converts the following to Kconfig: CONFIG_ENV_IS_IN_MMC CONFIG_ENV_IS_IN_NAND CONFIG_ENV_IS_IN_UBI
Convert CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to Kconfig This converts the following to Kconfig: CONFIG_ENV_IS_IN_MMC CONFIG_ENV_IS_IN_NAND CONFIG_ENV_IS_IN_UBI CONFIG_ENV_IS_NOWHERE In fact this already exists for sunxi as a 'choice' config. However not all the choices are available in Kconfig yet so we cannot use that. It would lead to more than one option being set. In addition, one purpose of this series is to allow the environment to be stored in more than one place. So the existing choice is converted to a normal config allowing each option to be set independently. There are not many opportunities for Kconfig updates to reduce the size of this patch. This was tested with ./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC And then manual updates. This is because for CHAIN_OF_TRUST boards they can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic now. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
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821560fd |
| 27-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://www.denx.de/git/u-boot-imx Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/imx6qdl_icore_rqs.h include/configs/imx6ul_gea
Merge git://www.denx.de/git/u-boot-imx Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/imx6qdl_icore_rqs.h include/configs/imx6ul_geam.h include/configs/imx6ul_isiot.h
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235c5b83 |
| 21-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-samsung
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784667d7 |
| 21-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2017.07' of git://www.denx.de/git/u-boot-microblaze Xilinx changes for v2017.07 ZynqMP: - config cleanup - SD LS mode support - psu_init* cleanup
Merge tag 'xilinx-for-v2017.07' of git://www.denx.de/git/u-boot-microblaze Xilinx changes for v2017.07 ZynqMP: - config cleanup - SD LS mode support - psu_init* cleanup - unmap OCM - Support for SMC Zynq: - add ddrc to Kconfig - add topic-miamilite board support
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eab76dfd |
| 19-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-usb
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ebba9d1d |
| 19-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
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ec4670a1 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add LPDDR3 timing from stock boot0 As we added LPDDR3 support in the former patch, we need a set of timing info to really enable it. Add the timing info used by stock boo
sunxi: add LPDDR3 timing from stock boot0 As we added LPDDR3 support in the former patch, we need a set of timing info to really enable it. Add the timing info used by stock boot0. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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72cc9870 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add LPDDR3 DRAM type support for DesignWare-like DRAM controller Some A64 boards (SoPine and Pinebook production batch) use LPDDR3 DRAM chips. Add support for LPDDR3 DRAM
sunxi: add LPDDR3 DRAM type support for DesignWare-like DRAM controller Some A64 boards (SoPine and Pinebook production batch) use LPDDR3 DRAM chips. Add support for LPDDR3 DRAM in the DesignWare-like DRAM controller code. Real LPDDR3 chips' support is not added yet in this commit. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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7d06e59f |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.io> |
sunxi: enable DRAM initialization and SPL for V3s SoC As we have already support for the DesignWare DRAM controller and the integrated DDR2 chip of V3s, let's enable the SPL support for
sunxi: enable DRAM initialization and SPL for V3s SoC As we have already support for the DesignWare DRAM controller and the integrated DDR2 chip of V3s, let's enable the SPL support for V3s. This patch also contains the default DRAM configuration for V3s. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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3ec0698b |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add support for V3s DRAM controller Allwinner V3s features a DRAM controller like the on in H3, but with a DDR2 DRAM. Add support for it. Signed-off-by: Icenowy
sunxi: add support for V3s DRAM controller Allwinner V3s features a DRAM controller like the on in H3, but with a DDR2 DRAM. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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67337e68 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add support for the DDR2 in V3s SoC Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its timing param. Add support for it. Signed-off-by: Ice
sunxi: add support for the DDR2 in V3s SoC Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its timing param. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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f6457ce5 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: Add selective DRAM type and timing DRAM chip varies, and one code cannot satisfy all DRAMs. Add options to select a timing set. Currently only DDR3-1333 (the origina
sunxi: Add selective DRAM type and timing DRAM chip varies, and one code cannot satisfy all DRAMs. Add options to select a timing set. Currently only DDR3-1333 (the original set) is added into it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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87098d70 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: add option for 16-bit DW DRAM controller Some Allwinner SoCs features a DesignWare-like controller with only 16 bit bus width. Add support for them. Signed-off-b
sunxi: add option for 16-bit DW DRAM controller Some Allwinner SoCs features a DesignWare-like controller with only 16 bit bus width. Add support for them. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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9934aba4 |
| 03-Jun-2017 |
Icenowy Zheng <icenowy@aosc.xyz> |
sunxi: makes an invisible option for H3-like DRAM controllers Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like DesignWare DRAM controller, which do not have official free
sunxi: makes an invisible option for H3-like DRAM controllers Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like DesignWare DRAM controller, which do not have official free DRAM initialization code, but can use modified dram_sun8i_h3.c. Add a invisible option for easier DRAM initialization code reuse. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
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380e86f3 |
| 26-May-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fsl-qoriq
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be62fbf3 |
| 23-May-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'rmobile' of git://git.denx.de/u-boot-sh
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