scsi: hisi_sas: use wait_for_completion_timeout() when clearing ITCT

When injecting 2bit ecc errors, it will cause confusion inside SAS
controller which needs host reset to recover it. If a device i

scsi: hisi_sas: use wait_for_completion_timeout() when clearing ITCT

When injecting 2bit ecc errors, it will cause confusion inside SAS
controller which needs host reset to recover it. If a device is gone at the
same times inject 2bit ecc errors, we may not receive the ITCT interrupt so
it will wait for completion in clear_itct_v3_hw() all the time. And host
reset will also not occur because it can't require hisi_hba->sem, so the
system will be suspended.

To solve the issue, use wait_for_completion_timeout() instead of
wait_for_completion(), and also don't mark the gone device as
SAS_PHY_UNUSED when device gone.

Link: https://lore.kernel.org/r/1571926105-74636-4-git-send-email-john.garry@huawei.com
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Set the BIST init value before enabling BIST

If set the BIST init value after enabling BIST, there may be still some few
error bits. According to the process, need to set the BIST in

scsi: hisi_sas: Set the BIST init value before enabling BIST

If set the BIST init value after enabling BIST, there may be still some few
error bits. According to the process, need to set the BIST init value
before enabling BIST.

Fixes: 97b151e75861 ("scsi: hisi_sas: Add BIST support for phy loopback")
Link: https://lore.kernel.org/r/1571926105-74636-3-git-send-email-john.garry@huawei.com
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Add BIST support for phy loopback

Add BIST (built in self test) support for phy loopback.

Through the new debugfs interface, the user can configure loopback
mode/linkrate/phy id/cod

scsi: hisi_sas: Add BIST support for phy loopback

Add BIST (built in self test) support for phy loopback.

Through the new debugfs interface, the user can configure loopback
mode/linkrate/phy id/code mode before enabling it. And also user can
enable/disable BIST function.

Link: https://lore.kernel.org/r/1567774537-20003-13-git-send-email-john.garry@huawei.com
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Remove some unused function arguments

Some function arguments are unused, so remove them.

Also move the timeout print in for wait_cmds_complete_timeout_vX_hw()
callsites into that s

scsi: hisi_sas: Remove some unused function arguments

Some function arguments are unused, so remove them.

Also move the timeout print in for wait_cmds_complete_timeout_vX_hw()
callsites into that same function.

Link: https://lore.kernel.org/r/1567774537-20003-11-git-send-email-john.garry@huawei.com
Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Remove hisi_sas_hw.slot_complete

We never call hisi_sas_hw.slot_complete, so remove it.

Link: https://lore.kernel.org/r/1567774537-20003-9-git-send-email-john.garry@huawei.com
Signe

scsi: hisi_sas: Remove hisi_sas_hw.slot_complete

We never call hisi_sas_hw.slot_complete, so remove it.

Link: https://lore.kernel.org/r/1567774537-20003-9-git-send-email-john.garry@huawei.com
Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Assign NCQ tag for all NCQ commands

Currently the NCQ tag is only assigned for FPDMA READ and FPDMA WRITE
commands, and for other NCQ commands (such as FPDMA SEND), their NCQ tags
ar

scsi: hisi_sas: Assign NCQ tag for all NCQ commands

Currently the NCQ tag is only assigned for FPDMA READ and FPDMA WRITE
commands, and for other NCQ commands (such as FPDMA SEND), their NCQ tags
are set in the delivery command to 0.

So for all the NCQ commands, we also need to assign normal NCQ tag for
them, so drop the command type check in hisi_sas_get_ncq_tag() [drop
hisi_sas_get_ncq_tag() altogether actually], and always use the ATA command
NCQ tag when appropriate.

Link: https://lore.kernel.org/r/1567774537-20003-8-git-send-email-john.garry@huawei.com
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Update all the registers after suspend and resume

After suspend and resume, the HW registers will be set back to their
initial value. We use init_reg_v3_hw() to set some registers, b

scsi: hisi_sas: Update all the registers after suspend and resume

After suspend and resume, the HW registers will be set back to their
initial value. We use init_reg_v3_hw() to set some registers, but some
registers are set via firmware in ACPI "_RST" method, so add reset handler
before init_reg_v3_hw().

Link: https://lore.kernel.org/r/1567774537-20003-7-git-send-email-john.garry@huawei.com
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: replace "%p" with "%pK"

The format specifier "%p" can leak kernel address, and use "%pK" instead.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <jo

scsi: hisi_sas: replace "%p" with "%pK"

The format specifier "%p" can leak kernel address, and use "%pK" instead.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

show more ...

scsi: hisi_sas: Remove some unnecessary code

Remove some unnecessary code, including:

- Explicit zeroing of memory allocated for dmam_alloc_coherent()

- Some duplicated code

- Some redundant m

scsi: hisi_sas: Remove some unnecessary code

Remove some unnecessary code, including:

- Explicit zeroing of memory allocated for dmam_alloc_coherent()

- Some duplicated code

- Some redundant masking

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Drop free_irq() when devm_request_irq() failed

It will free irq automatically if devm_request_irq() failed, so drop
free_irq() if devm_request_irq() failed.

Signed-off-by: Xiang Che

scsi: hisi_sas: Drop free_irq() when devm_request_irq() failed

It will free irq automatically if devm_request_irq() failed, so drop
free_irq() if devm_request_irq() failed.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Drop SMP resp frame DMA mapping

The SMP frame response is written to the command table and not the SMP
response pointer from libsas, so don't bother DMA mapping (and unmapping)
the S

scsi: hisi_sas: Drop SMP resp frame DMA mapping

The SMP frame response is written to the command table and not the SMP
response pointer from libsas, so don't bother DMA mapping (and unmapping)
the SMP response from libsas.

Suggested-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Drop kmap_atomic() in SMP command completion

The call to kmap_atomic() in the SMP command completion code is
unnecessary, since kmap() is only really concerned with highmem, which is

scsi: hisi_sas: Drop kmap_atomic() in SMP command completion

The call to kmap_atomic() in the SMP command completion code is
unnecessary, since kmap() is only really concerned with highmem, which is
not relevant on arm64. The controller only finds itself in arm64 systems.

Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Snapshot AXI and RAS register at debugfs

The AXI and RAS register values should also should be snapshot at debugfs.

Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com>
Signed-off-by:

scsi: hisi_sas: Snapshot AXI and RAS register at debugfs

The AXI and RAS register values should also should be snapshot at debugfs.

Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Snapshot HW cache of IOST and ITCT at debugfs

The value of IOST/ITCT is updated to cache first, and then synchronize to
DDR periodically. So the value in IOST/ITCT cache is the lates

scsi: hisi_sas: Snapshot HW cache of IOST and ITCT at debugfs

The value of IOST/ITCT is updated to cache first, and then synchronize to
DDR periodically. So the value in IOST/ITCT cache is the latest data and
it's important for debugging.

So, the HW cache of IOST and ITCT should be snapshot at debugfs.

Signed-off-by: Luo Jiaxing <luojiaxing@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Drop hisi_sas_hw.get_free_slot

In commit 1273d65f29045 ("scsi: hisi_sas: change queue depth from 512 to
4096"), the depth of each queue is the same as the max IPTT in the system.

As

scsi: hisi_sas: Drop hisi_sas_hw.get_free_slot

In commit 1273d65f29045 ("scsi: hisi_sas: change queue depth from 512 to
4096"), the depth of each queue is the same as the max IPTT in the system.

As such, as long as we have an IPTT allocated, we will have enough space on
any delivery queue.

All .get_free_slot functions were checking for space on the queue by
reading the DQ read pointer. Drop this, and also raise the code into common
code, as there is nothing hw specific remaining.

Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Make max IPTT count equal for all hw revisions

There is a small optimisation to be had by making the max IPTT the same for
all hw revisions, that being we can drop the check for read

scsi: hisi_sas: Make max IPTT count equal for all hw revisions

There is a small optimisation to be had by making the max IPTT the same for
all hw revisions, that being we can drop the check for read and write
pointer being the same in the get free slot function.

Change v1 hw to have max IPTT of 4096 - same as v2 and v3 hw - and
drop hisi_sas_hw.max_command_entries.

Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: libsas: aic94xx: hisi_sas: mvsas: pm8001: Use dev_is_expander()

Many times in libsas, and in LLDDs which use libsas, the check for an
expander device is re-implemented or open coded.

Use dev_

scsi: libsas: aic94xx: hisi_sas: mvsas: pm8001: Use dev_is_expander()

Many times in libsas, and in LLDDs which use libsas, the check for an
expander device is re-implemented or open coded.

Use dev_is_expander() instead. We rename this from
sas_dev_type_is_expander() to not spill so many lines in referencing.

Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Jason Yan <yanaijie@huawei.com>
Reviewed-by: Jack Wang <jinpu.wang@cloud.ionos.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Disable stash for v3 hw

For v3 hw, stash is enabled to promote performance, but it does little to
improve performance according to current tests. What's more, it causes
exceptions fo

scsi: hisi_sas: Disable stash for v3 hw

For v3 hw, stash is enabled to promote performance, but it does little to
improve performance according to current tests. What's more, it causes
exceptions for some situations, so disable it.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Ignore the error code between phy down to phy up

Several error codes will be generated between PHY down to up.

This issue was introduced by HW design. The designers came to the
conc

scsi: hisi_sas: Ignore the error code between phy down to phy up

Several error codes will be generated between PHY down to up.

This issue was introduced by HW design. The designers came to the
conclusion that we should ignore these errors.

Signed-off-by: Jiaxing Luo <luojiaxing@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Change the type of some numbers to unsigned

It reports a error as follows from some tools at two places in our code:
runtime error: left shift of 4 by 29 places cannot be represented

scsi: hisi_sas: Change the type of some numbers to unsigned

It reports a error as follows from some tools at two places in our code:
runtime error: left shift of 4 by 29 places cannot be represented in type
'int' So change the type of the two numbers to unsigned to avoid the error.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Fix the issue of argument mismatch of printing ecc errors

The argument of dev_err() called by multi_bit_ecc_error_process_v3_hw() is
not right. We pass two arguments, but there is on

scsi: hisi_sas: Fix the issue of argument mismatch of printing ecc errors

The argument of dev_err() called by multi_bit_ecc_error_process_v3_hw() is
not right. We pass two arguments, but there is only one printk format
specifier in the string.

Also move the print format string to dev_err().

Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of th

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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scsi: hisi_sas: Some misc tidy-up

Do some minor tidy-up.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <m

scsi: hisi_sas: Some misc tidy-up

Do some minor tidy-up.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: Support all RAS events with MSI interrupts

This patch is to switch HW all error handling from PCI AER to MSI interrupt
due to non-standard PCI implementation. All HW errors which wer

scsi: hisi_sas: Support all RAS events with MSI interrupts

This patch is to switch HW all error handling from PCI AER to MSI interrupt
due to non-standard PCI implementation. All HW errors which were being
reported through PCI AER can be reported through MSI interrupt also.

Do two things to complete the switch:

1. Notify FW to switch to MSI handling through ACPI DSM.

2. Add MSI handling for some hw errors, ECC errors and poison errors (we
also call some of them AXI reuser error). They were handled only through
PCI AER before.

For old FW reporting PCI AER events, the PCI AER handler will see that the
driver on longer support AER, and will leave the device in offlined state,
which is safe.

Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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scsi: hisi_sas: allocate different SAS address for directly attached situation

In commit 8b8d66531555 ("scsi: hisi_sas: make SAS address of SATA disks
unique"), we ensured that each SATA disk in the

scsi: hisi_sas: allocate different SAS address for directly attached situation

In commit 8b8d66531555 ("scsi: hisi_sas: make SAS address of SATA disks
unique"), we ensured that each SATA disk in the system has a unique SAS
address, even if it is fake. That was for v2 hw.

Add this for v3 hw.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

show more ...