#
cbaf7588 |
| 28-Jun-2023 |
Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> |
drm/i915: Don't preserve dpll_hw_state for slave crtc in Bigjoiner
If we are using Bigjoiner dpll_hw_state is supposed to be exactly same as for master crtc, so no need to save it's state for slave
drm/i915: Don't preserve dpll_hw_state for slave crtc in Bigjoiner
If we are using Bigjoiner dpll_hw_state is supposed to be exactly same as for master crtc, so no need to save it's state for slave crtc.
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Fixes: 0ff0e219d9b8 ("drm/i915: Compute clocks earlier") Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230628141017.18937-1-stanislav.lisovskiy@intel.com
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#
205508cf |
| 16-Jun-2023 |
Imre Deak <imre.deak@intel.com> |
drm/i915: Prevent needless toggling of DC states during modesets
DC states are disabled / re-enabled around each modeset, which may lead to a needless off->on->off toggling of the DC_off power well.
drm/i915: Prevent needless toggling of DC states during modesets
DC states are disabled / re-enabled around each modeset, which may lead to a needless off->on->off toggling of the DC_off power well. This has some overhead as toggling DC states involves running a DMC firmware handler and also running a periodic firmware handler while DC states are enabled. The limit of when DC states have a benefit is at 30 FPS (using DC3co) and below 30 FPS (using DC5/6), where the firmware can actually disable clocks / power off power wells. Accordingly delay powering off the DC_off powerwell (which re-enables DC states) by 17 ms at the end of a modeset to avoid the above overhead at or above 60 FPS.
Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230616185104.2502003-4-imre.deak@intel.com
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#
d77721c1 |
| 16-Jun-2023 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Convert HSW/BDW to use port_mask for DDI probe
Make HSW/BDW use port_mask for output probing as well. To achieve that the strap checks are moved into intel_ddi_init() itself. Or should we
drm/i915: Convert HSW/BDW to use port_mask for DDI probe
Make HSW/BDW use port_mask for output probing as well. To achieve that the strap checks are moved into intel_ddi_init() itself. Or should we move them to the runtime port_mask init instead? Maybe not since the hardware is still there, just not connected to anything.
v2: Account for DDI-E in strap detection Keep to the old CRT->DDI init order
Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230616140820.11726-8-ville.syrjala@linux.intel.com
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#
7b801dee |
| 16-Jun-2023 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Init DDI outputs based on port_mask on skl+
Instead of listing every platform's possible DDI outputs in intel_setup_outputs() just loop over the new port_mask to achieve the same thing.
H
drm/i915: Init DDI outputs based on port_mask on skl+
Instead of listing every platform's possible DDI outputs in intel_setup_outputs() just loop over the new port_mask to achieve the same thing.
HSW/BDW were left as is since they still look at the straps as well.
DSI is still a mess. For now just check for the relevant platforms explicitly.
Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230616140820.11726-7-ville.syrjala@linux.intel.com
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#
679df6f1 |
| 16-Jun-2023 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Assert that the port being initialized is valid
Sprinkle some asserts to catch any mishaps in the port_mask vs. output init.
For DDI/DP/HDMI/SDVO I decided that we want to bail out for an
drm/i915: Assert that the port being initialized is valid
Sprinkle some asserts to catch any mishaps in the port_mask vs. output init.
For DDI/DP/HDMI/SDVO I decided that we want to bail out for an invalid port since those are the encoder types where we might want consider driving the whole thing from the VBT child device list, and bogus VBTs could be a real issue (if for no other reason than the i915.vbt_firmware).
For DVO and HSW/BDW CRT port I just threw the assert in there for good measure.
Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230616140820.11726-5-ville.syrjala@linux.intel.com
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#
7142ec2e |
| 16-Jun-2023 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Remove bogus DDI-F from hsw/bdw output init
HSW/BDW don't have DDI-F so don't go looking for one.
Seems to have been accidentally left behind when the skl+ stuff got split out in commit 0
drm/i915: Remove bogus DDI-F from hsw/bdw output init
HSW/BDW don't have DDI-F so don't go looking for one.
Seems to have been accidentally left behind when the skl+ stuff got split out in commit 097d9e902068 ("drm/i915/display: remove strap checks from gen 9").
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230616140820.11726-2-ville.syrjala@linux.intel.com
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#
3e3c8e29 |
| 09-Jun-2023 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915/psr: Allow PSR with sprite enabled on hsw/bdw
Can't see why we'd want the sprite blocking PSR entry. Mask it out.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https:/
drm/i915/psr: Allow PSR with sprite enabled on hsw/bdw
Can't see why we'd want the sprite blocking PSR entry. Mask it out.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230609141404.12729-13-ville.syrjala@linux.intel.com Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
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#
848a4e5c |
| 08-Jun-2023 |
Luca Coelho <luciano.coelho@intel.com> |
drm/i915: add a dedicated workqueue inside drm_i915_private
In order to avoid flush_scheduled_work() usage, add a dedicated workqueue in the drm_i915_private structure. In this way, we don't need t
drm/i915: add a dedicated workqueue inside drm_i915_private
In order to avoid flush_scheduled_work() usage, add a dedicated workqueue in the drm_i915_private structure. In this way, we don't need to use the system queue anymore.
This change is mostly mechanical and based on Tetsuo's original patch[1].
v6 by Jani: - Also create unordered_wq for mock device
Link: https://patchwork.freedesktop.org/series/114608/ [1] Cc: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/c816ebe17ef08d363981942a096a586a7658a65e.1686231190.git.jani.nikula@intel.com
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#
4c4cc7ac |
| 06-Jun-2023 |
Mika Kahola <mika.kahola@intel.com> |
drm/i915/mtl: Add support for PM DEMAND
MTL introduces a new way to instruct the PUnit with power and bandwidth requirements of DE. Add the functionality to program the registers and handle waits us
drm/i915/mtl: Add support for PM DEMAND
MTL introduces a new way to instruct the PUnit with power and bandwidth requirements of DE. Add the functionality to program the registers and handle waits using interrupts. The current wait time for timeouts is programmed for 10 msecs to factor in the worst case scenarios. Changes made to use REG_BIT for a register that we touched(GEN8_DE_MISC_IER _MMIO).
Wa_14016740474 is added which applies to Xe_LPD+ display
v2: checkpatch warning fixes, simplify program pmdemand part
v3: update to dbufs and pipes values to pmdemand register(stan) Removed the macro usage in update_pmdemand_values()
v4: move the pmdemand_pre_plane_update before cdclk update pmdemand_needs_update included cdclk params comparisons pmdemand_state NULL check (Gustavo) pmdemand.o in sorted order in the makefile (Jani) update pmdemand misc irq handler loop (Gustavo) active phys bitmask and programming correction (Gustavo)
v5: simplify pmdemand_state structure simplify methods to find active phys and max port clock Timeout in case of previou pmdemand task pending (Gustavo)
v6: rebasing updates to max_ddiclk calculations (Gustavo) updates to active_phys count method (Gustavo)
v7: use two separate loop to iterate throug old and new crtc states to calculate the active phys (Gustavo)
v8: use uniform function names (Gustavo)
v9: For phys change iterate through connectors (Imre) Look for change in phys for pmdemand update (Gustavo, Imre) Some more stlying changes (Imre) Update pmdemand state during HW readout/sanitize (Imre)
v10: Fix CI checkpatch warnings
v11: use correct pmdemand object pointer during hw readout, simplify the check for phys need update (Gustavo)
v12: Handle possible non serialize cases (Imre) Initialise also pmdemand params HW readout (Imre) Update active phys mask during sanitize calls (Imre) Check TC/encoder changes to limit connector update (Imre)
v13: Check display version before accessing pmdemand functions
v14: Move is_serialized to intel_global_state.c simplify update params and other stlying issues (Imre)
Bspec: 66451, 64636, 64602, 64603 Cc: Matt Atwood <matthew.s.atwood@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> #v4 Acked-by: Gustavo Sousa <gustavo.sousa@intel.com> #v11 Reviewed-by: Imre Deak <imre.deak@intel.com> [RK: Fixed minor typo in one of the comments. s/qclck_gc/qclk_gv/] Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230606201032.347449-1-vinod.govindapillai@intel.com
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#
84f9c3c7 |
| 26-May-2023 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915: annotate maybe unused but set intel_crtc_state variables
Prepare for re-enabling -Wunused-but-set-variable.
for_each_new_intel_crtc_in_state() requires passing in a struct intel_crtc_stat
drm/i915: annotate maybe unused but set intel_crtc_state variables
Prepare for re-enabling -Wunused-but-set-variable.
for_each_new_intel_crtc_in_state() requires passing in a struct intel_crtc_state pointer, which it uses, but in a few places this leads to warning about unused but set variables. Annotate them with __maybe_unused.
Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/eb041f426bc3d76ef7a0ea906f99367cbf439b1a.1685119007.git.jani.nikula@intel.com
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#
ace87304 |
| 26-May-2023 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915: annotate maybe unused but set intel_plane_state variables
Prepare for re-enabling -Wunused-but-set-variable.
for_each_new_intel_plane_in_state() requires passing in a struct intel_plane_s
drm/i915: annotate maybe unused but set intel_plane_state variables
Prepare for re-enabling -Wunused-but-set-variable.
for_each_new_intel_plane_in_state() requires passing in a struct intel_plane_state pointer, which it uses, but in many places this leads to warning about unused but set variables. Annotate them with __maybe_unused.
Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/438ff3b257b7f85ecca5750ae8687336faee0a79.1685119007.git.jani.nikula@intel.com
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#
d58bfcd4 |
| 01-Jun-2023 |
Arun R Murthy <arun.r.murthy@intel.com> |
drm/i915/display: Print useful information on error
For modifier not supporting async flip, print the modifier and display version. Helps in reading the error message.
v2: Reframe the error message
drm/i915/display: Print useful information on error
For modifier not supporting async flip, print the modifier and display version. Helps in reading the error message.
v2: Reframe the error message (Jani)
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230602022157.221225-1-arun.r.murthy@intel.com
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Revision tags: v6.1.27, v6.1.26, v6.3, v6.1.25 |
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#
47d56cad |
| 13-Apr-2023 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Implement CTM property support for VLV
VLV has a so called "wide gamut color correction" unit (WGC). What it is is a 3x3 matrix similar to the later CHV CGM CSC, with less precisions/range
drm/i915: Implement CTM property support for VLV
VLV has a so called "wide gamut color correction" unit (WGC). What it is is a 3x3 matrix similar to the later CHV CGM CSC, with less precisions/range. In fact CHV also has the WGC but using it there doesn't really make sense when you have the superior CGM CSC around.
Hook up the necessary stuff to expose the WGC as the CTM crtc property.
One additional crazy idea that came to mind would be to use the WGC as an output CSC on CHV for YCbCr output. But it would be incompatible with the legacy LUT usage. In fact since the WGC lacks post-offsets we'd probably have to use the legacy LUT to do that final part of the RGB->YCbCr conversion. Sounds doable, but perhaps not worth the hassle.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230413164916.4221-6-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar <uma.shankar@intel.com>
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#
35c81205 |
| 24-May-2023 |
Nathan Chancellor <nathan@kernel.org> |
drm/i915: Fix clang -Wimplicit-fallthrough in intel_async_flip_check_hw()
Clang warns:
drivers/gpu/drm/i915/display/intel_display.c:6012:3: error: unannotated fall-through between switch labels [
drm/i915: Fix clang -Wimplicit-fallthrough in intel_async_flip_check_hw()
Clang warns:
drivers/gpu/drm/i915/display/intel_display.c:6012:3: error: unannotated fall-through between switch labels [-Werror,-Wimplicit-fallthrough] case I915_FORMAT_MOD_X_TILED: ^ drivers/gpu/drm/i915/display/intel_display.c:6012:3: note: insert 'break;' to avoid fall-through case I915_FORMAT_MOD_X_TILED: ^ break; 1 error generated.
Clang is a little more pedantic than GCC, which does not warn when falling through to a case that is just break or return. Clang's version is more in line with the kernel's own stance in deprecated.rst, which states that all switch/case blocks must end in either break, fallthrough, continue, goto, or return. Add the missing break to silence the warning.
Fixes: 937859485aef ("drm/i915: Support Async Flip on Linear buffers") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/202305241902.UvHtMoxa-lkp@intel.com/ Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org> Closes: https://lore.kernel.org/CA+G9fYv68V3ewK0Qj-syQj7qX-hQr0H1MFL=QFNuDoE_J2Zu-g@mail.gmail.com/ Reported-by: Tom Rix <trix@redhat.com> Closes: https://lore.kernel.org/all/20230523125116.1669057-1-trix@redhat.com/ Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230524-intel_async_flip_check_hw-implicit-fallthrough-v1-1-83de89e376a1@kernel.org
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#
18e0deee |
| 23-May-2023 |
Matt Roper <matthew.d.roper@intel.com> |
drm/i915/display: Move display runtime info to display structure
Move the runtime info specific to display into display-specific structures as has already been done with the constant display info.
drm/i915/display: Move display runtime info to display structure
Move the runtime info specific to display into display-specific structures as has already been done with the constant display info.
v2: - Rename __runtime to __runtime_defaults for more clarity on the purpose. (Andrzej) - Move introduction of DISPLAY_INFO() to previous patch. (Andrzej) - Drop NO_DISPLAY macro. (Andrzej) v3: - Use "{}" instead of "{ 0 }" for empty struct init. (Jani)
Cc: Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230523195609.73627-4-matthew.d.roper@intel.com
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#
45dfbd99 |
| 10-May-2023 |
Imre Deak <imre.deak@intel.com> |
drm/i915: Fix PIPEDMC disabling for a bigjoiner configuration
For a bigjoiner configuration display->crtc_disable() will be called first for the slave CRTCs and then for the master CRTC. However sla
drm/i915: Fix PIPEDMC disabling for a bigjoiner configuration
For a bigjoiner configuration display->crtc_disable() will be called first for the slave CRTCs and then for the master CRTC. However slave CRTCs will be actually disabled only after the master CRTC is disabled (from the encoder disable hooks called with the master CRTC state). Hence the slave PIPEDMCs can be disabled only after the master CRTC is disabled, make this so.
intel_encoders_post_pll_disable() must be called only for the master CRTC, as for the other two encoder disable hooks. While at it fix this up as well. This didn't cause a problem, since intel_encoders_post_pll_disable() will call the corresponding hook only for an encoder/connector connected to the given CRTC, however slave CRTCs will have no associated encoder/connector.
Fixes: 3af2ff0840be ("drm/i915: Enable a PIPEDMC whenever its corresponding pipe is enabled") Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230510103131.1618266-2-imre.deak@intel.com (cherry picked from commit 7eeef32719f6af935a1554813e6bc206446339cd) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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Revision tags: v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66 |
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#
93785948 |
| 05-Sep-2022 |
Arun R Murthy <arun.r.murthy@intel.com> |
drm/i915: Support Async Flip on Linear buffers
Starting from Gen12 Async Flip is supported on linear buffers. This patch enables support for async on linear buffer.
UseCase: In Hybrid graphics, for
drm/i915: Support Async Flip on Linear buffers
Starting from Gen12 Async Flip is supported on linear buffers. This patch enables support for async on linear buffer.
UseCase: In Hybrid graphics, for hardware unsupported pixel formats it will be converted to linear memory and then composed.
v2: Added use case v3: Added FIXME for ICL indicating the restrictions
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906041806.4095575-1-arun.r.murthy@intel.com
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#
86634ba3 |
| 16-May-2023 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915: tweak language in fastset pipe config compare logging
The "fastset mismatch" debug logging has been slightly confusing, leading people to believe some error happened. Change it to the more
drm/i915: tweak language in fastset pipe config compare logging
The "fastset mismatch" debug logging has been slightly confusing, leading people to believe some error happened. Change it to the more informative "fastset requirement not met", and add a final message about this leading to full modeset.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230516094406.2675307-1-jani.nikula@intel.com
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#
e826839e |
| 10-May-2023 |
Imre Deak <imre.deak@intel.com> |
drm/i915: Add support for disabling any CRTCs during HW readout/sanitization
During HW readout/sanitization CRTCs can be disabled only if they don't have an attached encoder (and so the encoder disa
drm/i915: Add support for disabling any CRTCs during HW readout/sanitization
During HW readout/sanitization CRTCs can be disabled only if they don't have an attached encoder (and so the encoder disable hooks don't need to be called). An upcoming patch will need to disable CRTCs also with an attached encoder, so add support for this.
For bigjoiner configs the encoder disabling hooks require the slave CRTC states, so add these too to the atomic state. Since the connector atomic state is already up-to-date when the CRTC is disabled the connector state needs to be updated (reset) after the CRTC is disabled, make this so. Follow the proper order of disabling first all bigjoiner slaves, then any port synced CRTC slaves followed by the CRTC originally requested to be disabled.
v2: - Fix calculating the bigjoiner_masters mask in a port sync config, (Ville) - Keep _noatomic suffix in intel_crtc_disable_noatomic(). (Ville) - Rebase on full CRTC state reset in this patchset, not requiring resetting the bigjoiner state separately and (instead) resetting the full atomic CRTC and related global state after all linked pipes got disabled. - Disable portsync slaves before a portsync master. - Disable a portsync master if a linked portsync slave is disabled.
v3: (Ville) - Use s/u32/u8 for transcoder and pipe masks. - Use is_power_of_2() instead of hweight()==1.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230510103131.1618266-8-imre.deak@intel.com
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#
7eeef327 |
| 10-May-2023 |
Imre Deak <imre.deak@intel.com> |
drm/i915: Fix PIPEDMC disabling for a bigjoiner configuration
For a bigjoiner configuration display->crtc_disable() will be called first for the slave CRTCs and then for the master CRTC. However sla
drm/i915: Fix PIPEDMC disabling for a bigjoiner configuration
For a bigjoiner configuration display->crtc_disable() will be called first for the slave CRTCs and then for the master CRTC. However slave CRTCs will be actually disabled only after the master CRTC is disabled (from the encoder disable hooks called with the master CRTC state). Hence the slave PIPEDMCs can be disabled only after the master CRTC is disabled, make this so.
intel_encoders_post_pll_disable() must be called only for the master CRTC, as for the other two encoder disable hooks. While at it fix this up as well. This didn't cause a problem, since intel_encoders_post_pll_disable() will call the corresponding hook only for an encoder/connector connected to the given CRTC, however slave CRTCs will have no associated encoder/connector.
Fixes: 3af2ff0840be ("drm/i915: Enable a PIPEDMC whenever its corresponding pipe is enabled") Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230510103131.1618266-2-imre.deak@intel.com
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6b9bd7c3 |
| 12-May-2023 |
Jani Nikula <jani.nikula@intel.com> |
drm/i915/display: add i915 parameter to I915_STATE_WARN()
Add i915 parameter to I915_STATE_WARN() and use device based logging.
Done using cocci + hand edited where there was no i915 local variable
drm/i915/display: add i915 parameter to I915_STATE_WARN()
Add i915 parameter to I915_STATE_WARN() and use device based logging.
Done using cocci + hand edited where there was no i915 local variable ready.
v2: avoid null deref in verify_connector_state()
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230512181658.1735594-1-jani.nikula@intel.com
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a04d27cd |
| 27-Apr-2023 |
Ankit Nautiyal <ankit.k.nautiyal@intel.com> |
drm/i915/display: Add new member to configure PCON color conversion
The decision to use DFP output format conversion capabilities should be during compute_config phase.
This patch adds new member t
drm/i915/display: Add new member to configure PCON color conversion
The decision to use DFP output format conversion capabilities should be during compute_config phase.
This patch adds new member to crtc_state to represent the final output_format to the sink. In case of a DFP this can be different than the output_format, as per the format conversion done via the PCON.
This will help to store only the format conversion capabilities of the DP device in intel_dp->dfp, and use crtc_state to compute and store the configuration for color/format conversion for a given mode.
v2: modified the new member to crtc_state to represent the final output_format that eaches the sink, after possible conversion by PCON kind of devices. (Ville)
v3: Addressed comments from Ville: -Added comments to clarify difference between sink_format and output_format. -Corrected the order of setting sink_format and output_format. -Added readout for sink_format in get_pipe_config hooks.
v4: Set sink_format for intel_sdvo too. (Ville)
v5: Rebased.
v6: Fixed condition to go for YCbCr420 format for dp and hdmi. (Ville)
v7: Fix the condition to set sink_format for HDMI. Set hdmi output_format simply as sink_format. (Ville)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v3) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230427125605.487769-2-ankit.k.nautiyal@intel.com
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4883c804 |
| 26-Apr-2023 |
Ville Syrjälä <ville.syrjala@linux.intel.com> |
drm/i915: Define bitmasks for ilk pfit window pos/size
Define and use the bitmasks for the x/y components of the ilk+ panel filter window pos/size registers.
Note that we stick to the full 16 bit m
drm/i915: Define bitmasks for ilk pfit window pos/size
Define and use the bitmasks for the x/y components of the ilk+ panel filter window pos/size registers.
Note that we stick to the full 16 bit mask even though the actual hardware limits are lower (and somewhat platform dependent). BDW is actually limited to 13 bits horizontal and 12 bits vertical, with the high bits being hardwired to zero. HSW should have the same limits as BDW. And pre-HSW should be limited to 12bits in both directions as that's already the limit of the transcoder timing registers. Curiously on HSW and earlier platforms all 16 bits can actually be set, but presumably the hardware ignores the high bits.
v2: Switch back to full 16bit masks since that's what we use transcoder timign regs and PIPESRC as well
Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230426135019.7603-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
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ee963428 |
| 28-Apr-2023 |
Mika Kahola <mika.kahola@intel.com> |
drm/i915/mtl: Enable TC ports
Finally, we can enable TC ports for Meteorlake.
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by
drm/i915/mtl: Enable TC ports
Finally, we can enable TC ports for Meteorlake.
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230428095433.4109054-14-mika.kahola@intel.com
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6f0423b0 |
| 28-Apr-2023 |
Mika Kahola <mika.kahola@intel.com> |
drm/i915/mtl: Power up TCSS
Add register writes to enable powering up Type-C subsystem i.e. TCSS. For MeteorLake we need to request TCSS to power up and check the TCSS power state after 500 us.
In
drm/i915/mtl: Power up TCSS
Add register writes to enable powering up Type-C subsystem i.e. TCSS. For MeteorLake we need to request TCSS to power up and check the TCSS power state after 500 us.
In addition, for PICA we need to set/clear the Type-C PHY ownnership bit when Type-C device is connected/disconnected.
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230428095433.4109054-11-mika.kahola@intel.com
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