Revision tags: v5.4.39, v5.4.38, v5.4.37, v5.4.36 |
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8c30e7ca |
| 25-Apr-2020 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Update VDD_ARM 1.2GHz setpoint voltage
The latest datasheet Rev. 0.1, 03/2020 removes below constrain:
"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."
So, for 1.2G
arm64: dts: imx8mn: Update VDD_ARM 1.2GHz setpoint voltage
The latest datasheet Rev. 0.1, 03/2020 removes below constrain:
"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."
So, for 1.2GHz setpoint VDD_ARM can use its typical voltage directly.
The datasheet can be downloaded from below link: https://www.nxp.com/docs/en/data-sheet/IMX8MNCEC.pdf
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29 |
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921a6845 |
| 31-Mar-2020 |
Fabio Estevam <festevam@gmail.com> |
arm64: dts: imx8m: Fix AIPS reg properties
Commit dc3efc6ff0d5 ("arm64: dts: imx8m: fix aips dts node") caused several dtc warnings like these when building with W=1:
arch/arm64/boot/dts/freescale/
arm64: dts: imx8m: Fix AIPS reg properties
Commit dc3efc6ff0d5 ("arm64: dts: imx8m: fix aips dts node") caused several dtc warnings like these when building with W=1:
arch/arm64/boot/dts/freescale/imx8mm.dtsi:265.23-542.5: Warning (simple_bus_reg): /soc@0/bus@30000000: simple-bus unit address format error, expected "301f0000" arch/arm64/boot/dts/freescale/imx8mm.dtsi:544.23-602.5: Warning (simple_bus_reg): /soc@0/bus@30400000: simple-bus unit address format error, expected "305f0000" arch/arm64/boot/dts/freescale/imx8mm.dtsi:604.23-862.5: Warning (simple_bus_reg): /soc@0/bus@30800000: simple-bus unit address format error, expected "309f0000" arch/arm64/boot/dts/freescale/imx8mm.dtsi:864.23-909.5: Warning (simple_bus_reg): /soc@0/bus@32c00000: simple-bus unit address format error, expected "32df0000"
Fix them by using the correct address base and size in the AIPS reg properties.
Fixes: dc3efc6ff0d5 ("arm64: dts: imx8m: fix aips dts node") Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.6 |
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15ddc3e1 |
| 27-Mar-2020 |
Adam Ford <aford173@gmail.com> |
arm64: dts: imx8mn: Change SDMA1 ahb clock for imx8mn
Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error. This patch changes to ahb clock from SDMA1_ROOT to AHB which fixes the time
arm64: dts: imx8mn: Change SDMA1 ahb clock for imx8mn
Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error. This patch changes to ahb clock from SDMA1_ROOT to AHB which fixes the timeout error.
Fixes: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support")
Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.4.28, v5.4.27, v5.4.26, v5.4.25 |
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c2a2f446 |
| 12-Mar-2020 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Add snvs clock to powerkey
SNVS powerkey driver needs snvs clock for proper clock management, add support for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: H
arm64: dts: imx8mn: Add snvs clock to powerkey
SNVS powerkey driver needs snvs clock for proper clock management, add support for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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dc3efc6f |
| 11-Mar-2020 |
Peng Fan <peng.fan@nxp.com> |
arm64: dts: imx8m: fix aips dts node
Per binding doc fsl,aips-bus.yaml, compatible and reg is required. And for reg, the AIPS configuration space should be used, not all the AIPS bus space.
Signed-
arm64: dts: imx8m: fix aips dts node
Per binding doc fsl,aips-bus.yaml, compatible and reg is required. And for reg, the AIPS configuration space should be used, not all the AIPS bus space.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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819779a9 |
| 08-Mar-2020 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Add CPU thermal zone support
i.MX8MN shares same thermal sensor with i.MX8MM, add thermal zone support for i.MX8MN.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-b
arm64: dts: imx8mn: Add CPU thermal zone support
i.MX8MN shares same thermal sensor with i.MX8MM, add thermal zone support for i.MX8MN.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.4.24 |
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f5ff5a21 |
| 05-Mar-2020 |
Silvano di Ninno <silvano.dininno@nxp.com> |
arm64: dts: imx8mn: align name for crypto child nodes
crypto child nodes should use the "jr" name (without an index), as indicated in the DT binding.
Signed-off-by: Silvano di Ninno <silvano.dininn
arm64: dts: imx8mn: align name for crypto child nodes
crypto child nodes should use the "jr" name (without an index), as indicated in the DT binding.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.4.23, v5.4.22 |
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80b06c5c |
| 23-Feb-2020 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Adjust 1.2GHz OPP voltage to OD mode
According to latest datasheet Rev.0, 10/2019, there is restriction as below:
"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."
A
arm64: dts: imx8mn: Adjust 1.2GHz OPP voltage to OD mode
According to latest datasheet Rev.0, 10/2019, there is restriction as below:
"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."
As by default SoC is running at OD mode(VDD_SOC = 0.95V), so VDD_ARM 1.2GHz OPP's voltage should be increased to 0.95V.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11 |
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53458f86 |
| 10-Jan-2020 |
Peng Fan <peng.fan@nxp.com> |
arm64: dts: imx8mn: Init rates and parents configs for clocks
Add the initial configuration for clocks that need default parent and rate setting.
NoC sources from SYS PLL3, running at 600MHz. Audio
arm64: dts: imx8mn: Init rates and parents configs for clocks
Add the initial configuration for clocks that need default parent and rate setting.
NoC sources from SYS PLL3, running at 600MHz. Audio AHB/IPG clks needs to run at 400MHz for better performance.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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42ef961b |
| 16-Jan-2020 |
Horia Geantă <horia.geanta@nxp.com> |
arm64: dts: imx8mn: add clock for snvs rtc node
Initial commit adding imx8mn support: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support") added the "clock-names" property for the snvs r
arm64: dts: imx8mn: add clock for snvs rtc node
Initial commit adding imx8mn support: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support") added the "clock-names" property for the snvs rtc node, however it missed adding the clock.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.4.10, v5.4.9 |
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c16b4571 |
| 08-Jan-2020 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Memory node should be in board DT
Memory address/size depends on board design, so memory node should be in board DT.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by
arm64: dts: imx8mn: Memory node should be in board DT
Memory address/size depends on board design, so memory node should be in board DT.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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aad24175 |
| 06-Jan-2020 |
Horia Geantă <horia.geanta@nxp.com> |
arm64: dts: imx8mn: add crypto node
Add node for CAAM - Cryptographic Acceleration and Assurance Module.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan
arm64: dts: imx8mn: add crypto node
Add node for CAAM - Cryptographic Acceleration and Assurance Module.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Tested-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3 |
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aebf07e6 |
| 11-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
arm64: dts: imx8m: drop "fsl,aips-bus" and "fsl,imx8mq-aips-bus"
There is no binding doc for these compatible string "fsl,imx8mq-aips-bus" and "fsl,aips-bus", "simple-bus" is enough for aips usage,
arm64: dts: imx8m: drop "fsl,aips-bus" and "fsl,imx8mq-aips-bus"
There is no binding doc for these compatible string "fsl,imx8mq-aips-bus" and "fsl,aips-bus", "simple-bus" is enough for aips usage, so drop the upper two.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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d51cb99c |
| 05-Dec-2019 |
Li Jun <jun.li@nxp.com> |
arm64: dts: imx8mn: Remove setting for IMX8MN_CLK_USB_CORE_REF
Since IMX8MN_CLK_USB_CORE_REF is not used at all, so remove the setting for it.
Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by:
arm64: dts: imx8mn: Remove setting for IMX8MN_CLK_USB_CORE_REF
Since IMX8MN_CLK_USB_CORE_REF is not used at all, so remove the setting for it.
Signed-off-by: Li Jun <jun.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13 |
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0376f6ec |
| 22-Nov-2019 |
Leonard Crestez <leonard.crestez@nxp.com> |
arm64: dts: imx8m: Add ddr controller nodes
This is used by the imx-ddrc devfreq driver to implement dynamic frequency scaling of DRAM.
Support for proactive scaling via interconnect will come late
arm64: dts: imx8m: Add ddr controller nodes
This is used by the imx-ddrc devfreq driver to implement dynamic frequency scaling of DRAM.
Support for proactive scaling via interconnect will come later. The high-performance bus masters which need that (display, vpu, gpu) are mostly not yet enabled in upstream anyway.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.3.12, v5.3.11, v5.3.10 |
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0f93eb28 |
| 07-Nov-2019 |
Fancy Fang <chen.fang@nxp.com> |
arm64: dts: imx8mn: remove "simple-bus" for anatop
Remove "simple-bus" compatible for device anatop, since no child nodes exist under it and it is not a populated bus.
Signed-off-by: Fancy Fang <ch
arm64: dts: imx8mn: remove "simple-bus" for anatop
Remove "simple-bus" compatible for device anatop, since no child nodes exist under it and it is not a populated bus.
Signed-off-by: Fancy Fang <chen.fang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.3.9, v5.3.8 |
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235e0919 |
| 23-Oct-2019 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Remove duplicated machine compatible
Machine compatible string normally is located in board DT, remove the duplicated one from SoC dtsi.
Signed-off-by: Anson Huang <Anson.Huang@
arm64: dts: imx8mn: Remove duplicated machine compatible
Machine compatible string normally is located in board DT, remove the duplicated one from SoC dtsi.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.3.7 |
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0bd0512d |
| 15-Oct-2019 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Move usdhc clocks assignment to board DT
usdhc's clock rate is different according to different devices connected, so clock rate assignment should be placed in board DT according
arm64: dts: imx8mn: Move usdhc clocks assignment to board DT
usdhc's clock rate is different according to different devices connected, so clock rate assignment should be placed in board DT according to different devices connected on each usdhc port.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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958c6014 |
| 25-Oct-2019 |
Shengjiu Wang <shengjiu.wang@nxp.com> |
arm64: dts: imx8mn: fix compatible string for sdma
SDMA in i.MX8MN should use same configuration as i.MX8MQ So need to change compatible string to be "fsl,imx8mq-sdma".
Fixes: 6c3debcbae47 ("arm64:
arm64: dts: imx8mn: fix compatible string for sdma
SDMA in i.MX8MN should use same configuration as i.MX8MQ So need to change compatible string to be "fsl,imx8mq-sdma".
Fixes: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.3.6 |
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ea65aba8 |
| 07-Oct-2019 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Use correct clock for usdhc's ipg clk
On i.MX8MN, usdhc's ipg clock is from IMX8MN_CLK_IPG_ROOT, assign it explicitly instead of using IMX8MN_CLK_DUMMY.
Fixes: 6c3debcbae47 ("ar
arm64: dts: imx8mn: Use correct clock for usdhc's ipg clk
On i.MX8MN, usdhc's ipg clock is from IMX8MN_CLK_IPG_ROOT, assign it explicitly instead of using IMX8MN_CLK_DUMMY.
Fixes: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1 |
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2d8e0747 |
| 16-Sep-2019 |
Joakim Zhang <qiangqing.zhang@nxp.com> |
arm64: dts: imx8mn: add ddr pmu node
Add ddr pmu node for i.MX8MN EVK board.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Revision tags: v5.3 |
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2bad8c48 |
| 11-Sep-2019 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Use "fsl,imx8mm-ocotp" as ocotp's fallback compatible
Use "fsl,imx8mm-ocotp" as i.MX8MN ocotp's fallback compatible instead of "fsl,imx7d-ocotp" to support SoC UID read, as i.MX8
arm64: dts: imx8mn: Use "fsl,imx8mm-ocotp" as ocotp's fallback compatible
Use "fsl,imx8mm-ocotp" as i.MX8MN ocotp's fallback compatible instead of "fsl,imx7d-ocotp" to support SoC UID read, as i.MX8MN reuses i.MX8MM's SoC ID driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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#
df844a9a |
| 10-Sep-2019 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Enable cpu-idle driver
Enable i.MX8MN cpu-idle using generic ARM cpu-idle driver, 2 states are supported, details as below:
root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cp
arm64: dts: imx8mn: Enable cpu-idle driver
Enable i.MX8MN cpu-idle using generic ARM cpu-idle driver, 2 states are supported, details as below:
root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state0/name WFI root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state0/usage 3098 root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state1/name cpu-pd-wait root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state1/usage 3078
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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c4a21269 |
| 10-Sep-2019 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Add system counter node
Add i.MX8MN system counter node to enable timer-imx-sysctr broadcast timer driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn
arm64: dts: imx8mn: Add system counter node
Add i.MX8MN system counter node to enable timer-imx-sysctr broadcast timer driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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#
23b80c20 |
| 10-Sep-2019 |
Anson Huang <Anson.Huang@nxp.com> |
arm64: dts: imx8mn: Add "fsl,imx8mq-src" as src's fallback compatible
i.MX8MN can reuse i.MX8MQ's src driver, add "fsl,imx8mq-src" as src's fallback compatible to enable it.
Signed-off-by: Anson Hu
arm64: dts: imx8mn: Add "fsl,imx8mq-src" as src's fallback compatible
i.MX8MN can reuse i.MX8MQ's src driver, add "fsl,imx8mq-src" as src's fallback compatible to enable it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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