[ARM] omap: create a proper tree of clocks

Traditionally, we've tracked the parent/child relationships between
clk structures by setting the child's parent member to point at the
upstream clock. As

[ARM] omap: create a proper tree of clocks

Traditionally, we've tracked the parent/child relationships between
clk structures by setting the child's parent member to point at the
upstream clock. As a result, when decending the tree, we have had
to scan all clocks to find the children.

Avoid this wasteful scanning by keeping a list of the clock's children.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] OMAP3: PM: Make sure clk_disable_unused() order is correct

Current implementation will disable clocks in the order defined in clock34xx.h,
at least DPLL4_M2X2 will hang in certain cases (and p

[ARM] OMAP3: PM: Make sure clk_disable_unused() order is correct

Current implementation will disable clocks in the order defined in clock34xx.h,
at least DPLL4_M2X2 will hang in certain cases (and prevent retention / off)
if clocks are not disabled in correct order. This patch makes sure the parent
clocks will be active when disabling a clock.

linux-omap source commit is 672680063420ef8c8c4e7271984bb9cc08171d29.

Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] OMAP2 SDRC: move mach-omap2/memory.h into mach/sdrc.h

Move the contents of the arch/arm/mach-omap2/memory.h file to the
existing mach/sdrc.h file, and remove memory.h. Modify files which
incl

[ARM] OMAP2 SDRC: move mach-omap2/memory.h into mach/sdrc.h

Move the contents of the arch/arm/mach-omap2/memory.h file to the
existing mach/sdrc.h file, and remove memory.h. Modify files which
include memory.h to include asm/arch/sdrc.h instead.

linux-omap source commit is e7ae2d89921372fc4b9712a32cc401d645597807.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] OMAP2/3 clock: clean up mach-omap2/clock.c

This patch rolls up several cleanup patches.

1. Some unnecessarily verbose variable names are used in several clock.c
functions; clean these up per

[ARM] OMAP2/3 clock: clean up mach-omap2/clock.c

This patch rolls up several cleanup patches.

1. Some unnecessarily verbose variable names are used in several clock.c
functions; clean these up per CodingStyle.

2. Remove omap2_get_clksel() and just use clk->clksel_reg and
clk->clksel_mask directly.

3. Get rid of void __iomem * usage in omap2_clksel_get_src_field.
Prepend the function name with an underscore to highlight that it is a
static function.

linux-omap source commits are 7fa95e007ea2f3c4d0ecd2779d809756e7775894,
af0ea23f1ee4a5bea3b026e38761b47089f9048a, and
91c0c979b47c44b08f80e4f8d4c990fb158d82c4.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] OMAP3 clock: avoid invalid FREQSEL values during DPLL rate rounding

The DPLL FREQSEL jitter correction bits are set based on a table in
the 34xx TRM, Table 4-38, according to the DPLL's intern

[ARM] OMAP3 clock: avoid invalid FREQSEL values during DPLL rate rounding

The DPLL FREQSEL jitter correction bits are set based on a table in
the 34xx TRM, Table 4-38, according to the DPLL's internal clock
frequency "Fint." Several Fint frequency ranges are missing from this
table. Previously, we allowed these Fint frequency ranges to be
selected in the rate rounding code, but did not change the FREQSEL bits.
Correspondence with the OMAP hardware team indicates that Fint values
not in the table should not be used. So, prevent them from being
selected during DPLL rate rounding. This removes warnings and also
can prevent the chip from locking up.

The first pass through the rate rounding code will update the DPLL max
and min dividers appropriately, so later rate rounding passes will run
faster than the first.

Peter de Schrijver <peter.de-schrijver@nokia.com> put up with several
test cycles of this patch - thanks Peter.

linux-omap source commit is f9c1b82f55b60fc39eaa6e7aa1fbe380c0ffe2e9.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Peter de Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] OMAP3 clock: optimize DPLL rate rounding algorithm

The previous DPLL rate rounding algorithm counted the divider (N) down
from the maximum to 1. Since we currently use a broad DPLL rate
toler

[ARM] OMAP3 clock: optimize DPLL rate rounding algorithm

The previous DPLL rate rounding algorithm counted the divider (N) down
from the maximum to 1. Since we currently use a broad DPLL rate
tolerance, and lower N values are more power-efficient, we can often
bypass several iterations through the loop by counting N upwards from
1.

Peter de Schrijver <peter.de-schrijver@nokia.com> put up with several
test cycles of this patch - thanks Peter.

linux-omap source commit is 6f6d82bb2f80fa20a841ac3e95a6f44a5a156188.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Peter de Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] OMAP3 clock: remove unnecessary dpll_data dereferences

Remove some clutter from omap2_dpll_round_rate().

linux-omap source commit is 4625dceb8583c02a6d67ededc9f6a8347b6b8cb7.

Signed-off-by:

[ARM] OMAP3 clock: remove unnecessary dpll_data dereferences

Remove some clutter from omap2_dpll_round_rate().

linux-omap source commit is 4625dceb8583c02a6d67ededc9f6a8347b6b8cb7.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] OMAP: Fix sparse, checkpatch warnings in OMAP2/3 PRCM/PM code

Fix sparse & checkpatch warnings in OMAP2/3 PRCM & PM code. This mostly
consists of:

- converting pointer comparisons to integer

[ARM] OMAP: Fix sparse, checkpatch warnings in OMAP2/3 PRCM/PM code

Fix sparse & checkpatch warnings in OMAP2/3 PRCM & PM code. This mostly
consists of:

- converting pointer comparisons to integers in form similar to
(ptr == 0) to the standard idiom (!ptr)

- labeling a few non-static private functions as static

- adding prototypes for *_init() functions in the appropriate header
files, and getting rid of the corresponding open-coded extern
prototypes in other C files

- renaming the variable 'sclk' in mach-omap2/clock.c:omap2_get_apll_clkin
to avoid shadowing an earlier declaration

Clean up checkpatch issues. This mostly involves:

- converting some asm/ includes to linux/ includes

- cleaning up some whitespace

- getting rid of braces for conditionals with single following statements

Also take care of a few odds and ends, including:

- getting rid of unlikely() and likely() - none of this code is particularly
fast-path code, so the performance impact seems slim; and some of those
likely() and unlikely() indicators are probably not as accurate as the
ARM's branch predictor

- removing some superfluous casts

linux-omap source commit is 347df59f5d20fdf905afbc26b1328b0e28a8a01b.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: move propagate_rate() calls into generic omap clock code

propagate_rate() is recursive, so it makes sense to minimise the
amount of stack which is used for each recursion. So, rather th

[ARM] omap: move propagate_rate() calls into generic omap clock code

propagate_rate() is recursive, so it makes sense to minimise the
amount of stack which is used for each recursion. So, rather than
recursing back into it from the ->recalc functions if RATE_PROPAGATES
is set, do that test at the higher level.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: move clock propagation into core omap clock code

Move the clock propagation calls for set_parent and set_rate into
the core omap clock code, rather than having these calls scattered
thro

[ARM] omap: move clock propagation into core omap clock code

Move the clock propagation calls for set_parent and set_rate into
the core omap clock code, rather than having these calls scattered
throughout the OMAP1 and OMAP2 implementations.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: don't use clkops_omap2_dflt_wait for non-ICLK/FCLK clocks

The original code in omap2_clk_wait_ready() used to check the low 8
bits to determine whether they were within the FCLKEN or ICL

[ARM] omap: don't use clkops_omap2_dflt_wait for non-ICLK/FCLK clocks

The original code in omap2_clk_wait_ready() used to check the low 8
bits to determine whether they were within the FCLKEN or ICLKEN
registers. Specifically, the test is satisfied when these offsets
are used:

CM_FCLKEN, CM_FCLKEN1, CM_CLKEN, OMAP24XX_CM_FCLKEN2, CM_ICLKEN,
CM_ICLKEN1, CM_ICLKEN2, CM_ICLKEN3, OMAP24XX_CM_ICLKEN4
OMAP3430_CM_CLKEN_PLL, OMAP3430ES2_CM_CLKEN2

If one of these offsets isn't used, omap2_clk_wait_ready() merely
returns without doing anything. So we should use the non-wait clkops
version instead and eliminate that conditional.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: eliminate unnecessary conditionals in omap2_clk_wait_ready

Rather than employing run-time tests in omap2_clk_wait_ready() to
decide whether we need to wait for the clock to become ready,

[ARM] omap: eliminate unnecessary conditionals in omap2_clk_wait_ready

Rather than employing run-time tests in omap2_clk_wait_ready() to
decide whether we need to wait for the clock to become ready, we
can set the .ops appropriately.

This change deals with the OMAP24xx and OMAP34xx conditionals only.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: add default .ops to all remaining OMAP2 clocks

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

[ARM] omap: kill PARENT_CONTROLS_CLOCK

PARENT_CONTROLS_CLOCK just makes enable/disable no-op, and is
functionally an alias for ALWAYS_ENABLED. This can be handled
in the same way, using clkops_null

[ARM] omap: kill PARENT_CONTROLS_CLOCK

PARENT_CONTROLS_CLOCK just makes enable/disable no-op, and is
functionally an alias for ALWAYS_ENABLED. This can be handled
in the same way, using clkops_null.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: provide a NULL clock operations structure

... and use it for clocks which are ALWAYS_ENABLED. These clocks
use a non-NULL enable_reg pointer for other purposes (such as
selecting clock

[ARM] omap: provide a NULL clock operations structure

... and use it for clocks which are ALWAYS_ENABLED. These clocks
use a non-NULL enable_reg pointer for other purposes (such as
selecting clock rates.)

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] omap: introduce clock operations structure

Collect up all the common enable/disable clock operation functions
into a separate operations structure.

Signed-off-by: Russell King <rmk+kernel@arm

[ARM] omap: introduce clock operations structure

Collect up all the common enable/disable clock operation functions
into a separate operations structure.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

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[ARM] Convert asm/bitops.h to linux/bitops.h

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

[ARM] Convert asm/io.h to linux/io.h

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

[ARM] omap: fix lots of 'Using plain integer as NULL pointer'

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: OMAP2: Clockdomain: Integrate OMAP3 clocks with clockdomain code

This patch integrates the OMAP3 clock tree with the clockdomain code.
This patch:

- marks OMAP34xx clocks with their correspond

ARM: OMAP2: Clockdomain: Integrate OMAP3 clocks with clockdomain code

This patch integrates the OMAP3 clock tree with the clockdomain code.
This patch:

- marks OMAP34xx clocks with their corresponding clockdomain.

- adds code to convert the clockdomain name to a clockdomain pointer in the
struct clk during clk_register().

- modifies OMAP2 clock usecounting to call into the clockdomain code
when clocks are enabled or disabled.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach

This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: OMAP2: Clock: New OMAP2/3 DPLL rate rounding algorithm

This patch adds a new rate rounding algorithm for DPLL clocks on the
OMAP2/3 architecture.

For a desired DPLL target rate, there may be s

ARM: OMAP2: Clock: New OMAP2/3 DPLL rate rounding algorithm

This patch adds a new rate rounding algorithm for DPLL clocks on the
OMAP2/3 architecture.

For a desired DPLL target rate, there may be several
multiplier/divider (M, N) values which will generate a sufficiently
close rate. Lower N values result in greater power economy. However,
lower N values can cause the difference between the rounded rate and
the target rate ("rate error") to be larger than it would be with a
higher N. This can cause downstream devices to run more slowly than
they otherwise would.

This DPLL rate rounding algorithm:

- attempts to find the lowest possible N (DPLL divider) to reach the
target_rate (since, according to Richard Woodruff <r-woodruff@ti.com>,
lower N values save more power than higher N values).

- allows developers to set an upper bound on the error between the
rounded rate and the desired target rate ("rate tolerance"), so an
appropriate balance between rate fidelity and power savings can be
set. This maximum rate error tolerance is set via
omap2_set_dpll_rate_tolerance().

- never returns a rounded rate higher than the target rate.

The rate rounding algorithm caches the last rounded M, N, and rate
computation to avoid rounding the rate twice for each clk_set_rate()
call. (This patch does not yet implement set_rate for DPLLs; that
follows in a future patch.)

The algorithm trades execution speed for rate accuracy. It will find
the (M, N) set that results in the least rate error, within a
specified rate tolerance. It does this by evaluating each divider
setting - on OMAP3, this involves 128 steps. Another approach to DPLL
rate rounding would be to bail out as soon as a valid rate is found
within the rate tolerance, which would trade rate accuracy for
execution speed. Alternate implementations welcome.

This code is not yet used by the OMAP24XX DPLL clock, since it
is currently defined as a composite clock, fusing the DPLL M,N and the
M2 output divider. This patch also renames the existing OMAP24xx DPLL
programming functions to highlight that they program both the DPLL and
the DPLL's output multiplier.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: OMAP: SRAM: Split sram24xx.S into sram242x.S and sram243x.S

Split sram24xx.S into sram242x.S and sram243x.S

Signed-off-by: Tony Lindgren <tony@atomide.com>

ARM: OMAP: PRCM fixes to ssi clock handling

ssi_l4_ick should have PARENT_CONTROLS_CLOCK flag.
ST_SSI_STDBY bit in idlest register cannot be used in omap2_clk_wait_ready

Signed-off-by: Jouni Högan

ARM: OMAP: PRCM fixes to ssi clock handling

ssi_l4_ick should have PARENT_CONTROLS_CLOCK flag.
ST_SSI_STDBY bit in idlest register cannot be used in omap2_clk_wait_ready

Signed-off-by: Jouni Högander <jouni.hogander@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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ARM: OMAP2: New DPLL clock framework

These changes is the result of the discussion with Paul Walmsley.
His ideas are included into this patch.

Remove DPLL output divider handling from DPLLs and CLK

ARM: OMAP2: New DPLL clock framework

These changes is the result of the discussion with Paul Walmsley.
His ideas are included into this patch.

Remove DPLL output divider handling from DPLLs and CLKOUTX2 clocks,
and place it into specific DPLL output divider clocks (e.g., dpll3_m2_clk).
omap2_get_dpll_rate() now returns the correct DPLL rate, as represented
by the DPLL's CLKOUT output. Also add MPU and IVA2 subsystem clocks, along
with high-frequency bypass support.

Add support for DPLLs function in locked and bypass clock modes.

Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

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