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Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40 |
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| #
9169e039 |
| 21-Jul-2023 |
Mrinmay Sarkar <quic_msarkar@quicinc.com> |
dt-bindings: PCI: qcom: Add sa8775p compatible
Add sa8775p platform to the binding.
Link: https://lore.kernel.org/linux-pci/1689960276-29266-2-git-send-email-quic_msarkar@quicinc.com
Signed-off-by:
dt-bindings: PCI: qcom: Add sa8775p compatible
Add sa8775p platform to the binding.
Link: https://lore.kernel.org/linux-pci/1689960276-29266-2-git-send-email-quic_msarkar@quicinc.com
Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
show more ...
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|
Revision tags: v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24 |
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| #
c025c7e5 |
| 11-Apr-2023 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
dt-bindings: PCI: qcom: Document msi-map and msi-map-mask properties
The Qcom PCIe controller is capable of using either internal MSI controller
or the external GIC-ITS for signaling MSIs sent by en
dt-bindings: PCI: qcom: Document msi-map and msi-map-mask properties
The Qcom PCIe controller is capable of using either internal MSI controller
or the external GIC-ITS for signaling MSIs sent by endpoint devices.
Currently, the binding only documents the internal MSI implementation.
Let's document the GIC-ITS imeplementation by making use of msi-map and
msi-map-mask properties. Only one of the implementation should be used
at a time and the drivers can choose the preferred one.
Link: https://lore.kernel.org/r/20230411121442.22227-1-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
show more ...
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Revision tags: v6.1.23, v6.1.22, v6.1.21 |
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| #
1a24edc3 |
| 20-Mar-2023 |
Abel Vesa <abel.vesa@linaro.org> |
dt-bindings: PCI: qcom: Add SM8550 compatible
Add the SM8550 platform to the binding.
Link: https://lore.kernel.org/r/20230320144658.1794991-1-abel.vesa@linaro.org
Signed-off-by: Abel Vesa <abel.ve
dt-bindings: PCI: qcom: Add SM8550 compatible
Add the SM8550 platform to the binding.
Link: https://lore.kernel.org/r/20230320144658.1794991-1-abel.vesa@linaro.org
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
show more ...
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Revision tags: v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16 |
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| #
1bc7ae32 |
| 08-Mar-2023 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
dt-bindings: PCI: qcom: Add SDX55 SoC
Add support for the PCIe controller on the Qcom SDX55 SoC to the binding.
Link: https://lore.kernel.org/r/20230308082424.140224-4-manivannan.sadhasivam@linaro.
dt-bindings: PCI: qcom: Add SDX55 SoC
Add support for the PCIe controller on the Qcom SDX55 SoC to the binding.
Link: https://lore.kernel.org/r/20230308082424.140224-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
show more ...
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| #
a4c71670 |
| 08-Mar-2023 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
dt-bindings: PCI: qcom: Update maintainers entry
Stan is no longer working with MMSOL and expressed his interest to not
continue maintaining Qcom PCIe driver. Since I took over the driver
maintainer
dt-bindings: PCI: qcom: Update maintainers entry
Stan is no longer working with MMSOL and expressed his interest to not
continue maintaining Qcom PCIe driver. Since I took over the driver
maintainership, I'm stepping in to maintain the binding also.
Link: https://lore.kernel.org/r/20230308082424.140224-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
show more ...
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| #
0f80edf8 |
| 16-Mar-2023 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
dt-bindings: PCI: qcom: Add "mhi" register region to supported SoCs
"mhi" register region contains the MHI registers that could be used by
the PCIe controller drivers to get debug information like P
dt-bindings: PCI: qcom: Add "mhi" register region to supported SoCs
"mhi" register region contains the MHI registers that could be used by
the PCIe controller drivers to get debug information like PCIe link
transition counts on newer SoCs.
Link: https://lore.kernel.org/r/20230316081117.14288-16-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
show more ...
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Revision tags: v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6 |
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| #
2b1c46ce |
| 13-Jan-2023 |
Robert Marko <robimarko@gmail.com> |
dt-bindings: PCI: qcom: Add IPQ8074 Gen3 port
IPQ8074 has one Gen2 and one Gen3 PCIe port, with Gen2 already supported.
Document Gen3 port which uses the same controller as IPQ6018.
Link: https://l
dt-bindings: PCI: qcom: Add IPQ8074 Gen3 port
IPQ8074 has one Gen2 and one Gen3 PCIe port, with Gen2 already supported.
Document Gen3 port which uses the same controller as IPQ6018.
Link: https://lore.kernel.org/r/20230113164449.906002-6-robimarko@gmail.com
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
show more ...
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| #
371a6106 |
| 13-Jan-2023 |
Robert Marko <robimarko@gmail.com> |
dt-bindings: PCI: qcom: Sort compatibles alphabetically
Sort the compatibles list alphabetically for maintenance.
Link: https://lore.kernel.org/r/20230113164449.906002-5-robimarko@gmail.com
Signed-
dt-bindings: PCI: qcom: Sort compatibles alphabetically
Sort the compatibles list alphabetically for maintenance.
Link: https://lore.kernel.org/r/20230113164449.906002-5-robimarko@gmail.com
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
show more ...
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Revision tags: v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80 |
|
| #
89a7adad |
| 18-Nov-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
dt-bindings: PCI: qcom: Add SM8350
Add bindings for two PCIe hosts on SM8350 platform. The only difference
between them is in the aggre0 clock, which warrants the oneOf clause for
the clocks propert
dt-bindings: PCI: qcom: Add SM8350
Add bindings for two PCIe hosts on SM8350 platform. The only difference
between them is in the aggre0 clock, which warrants the oneOf clause for
the clocks properties.
Link: https://lore.kernel.org/r/20221118233242.2904088-2-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
show more ...
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| #
0b93acc6 |
| 06-Jan-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
dt-bindings: PCI: qcom: Unify MSM8996 and MSM8998 clock order
MSM8996 and MSM8998 use the same clocks, so use one order to make the
binding simpler.
Link: https://lore.kernel.org/r/20230106081203.1
dt-bindings: PCI: qcom: Unify MSM8996 and MSM8998 clock order
MSM8996 and MSM8998 use the same clocks, so use one order to make the
binding simpler.
Link: https://lore.kernel.org/r/20230106081203.14118-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
show more ...
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| #
ff0132f7 |
| 06-Jan-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
dt-bindings: PCI: qcom: Add MSM8998 specific compatible
Add new compatible for MSM8998 (compatible with MSM8996) to allow further
customizing if needed and to accurately describe the hardware.
Link
dt-bindings: PCI: qcom: Add MSM8998 specific compatible
Add new compatible for MSM8998 (compatible with MSM8996) to allow further
customizing if needed and to accurately describe the hardware.
Link: https://lore.kernel.org/r/20230106081203.14118-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
show more ...
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| #
7952e716 |
| 06-Jan-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
dt-bindings: PCI: qcom: Add oneOf to compatible match
Prepare for extending compatible list by adding oneOf keyword. No
functional changes.
Link: https://lore.kernel.org/r/20230106081203.14118-1-k
dt-bindings: PCI: qcom: Add oneOf to compatible match
Prepare for extending compatible list by adding oneOf keyword. No
functional changes.
Link: https://lore.kernel.org/r/20230106081203.14118-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
show more ...
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| #
74eac503 |
| 05-Dec-2022 |
Johan Hovold <johan+linaro@kernel.org> |
dt-bindings: PCI: qcom: Allow 'dma-coherent' property
Devices on some PCIe buses may be cache coherent and must be marked as
such in the devicetree to avoid data corruption.
This is specifically ne
dt-bindings: PCI: qcom: Allow 'dma-coherent' property
Devices on some PCIe buses may be cache coherent and must be marked as
such in the devicetree to avoid data corruption.
This is specifically needed on recent Qualcomm platforms like SC8280XP.
Link: https://lore.kernel.org/r/20221205094530.12883-1-johan+linaro@kernel.org
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
show more ...
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Revision tags: v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77 |
|
| #
3a936b2a |
| 02-Nov-2022 |
Johan Hovold <johan+linaro@kernel.org> |
dt-bindings: PCI: qcom: Add SC8280XP/SA8540P interconnects
Add the missing SC8280XP/SA8540P "pcie-mem" and "cpu-pcie" interconnect
paths to the bindings.
Link: https://lore.kernel.org/r/20221102090
dt-bindings: PCI: qcom: Add SC8280XP/SA8540P interconnects
Add the missing SC8280XP/SA8540P "pcie-mem" and "cpu-pcie" interconnect
paths to the bindings.
Link: https://lore.kernel.org/r/20221102090705.23634-2-johan+linaro@kernel.org
Fixes: 76d777ae045e ("dt-bindings: PCI: qcom: Add SC8280XP to binding")
Fixes: 76c4207f4085 ("dt-bindings: PCI: qcom: Add SA8540P to binding")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
show more ...
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Revision tags: v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66 |
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| #
1abbe04a |
| 08-Sep-2022 |
Krishna chaitanya chundru <quic_krichai@quicinc.com> |
dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
Add missing aggre0 and aggre1 clocks.
Link: https://lore.kernel.org/r/1662626776-19636-3-git-send-email-quic_krichai@quicinc.com
Sign
dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
Add missing aggre0 and aggre1 clocks.
Link: https://lore.kernel.org/r/1662626776-19636-3-git-send-email-quic_krichai@quicinc.com
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
show more ...
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| #
a672a9f4 |
| 08-Sep-2022 |
Krishna chaitanya chundru <quic_krichai@quicinc.com> |
dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
Add missing aggre0 and aggre1 clocks.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Reviewed-by: Krzysztof Kozl
dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
Add missing aggre0 and aggre1 clocks.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662626776-19636-3-git-send-email-quic_krichai@quicinc.com
show more ...
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|
Revision tags: v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55 |
|
| #
76c4207f |
| 14-Jul-2022 |
Johan Hovold <johan+linaro@kernel.org> |
dt-bindings: PCI: qcom: Add SA8540P to binding
SA8540P is a new platform related to SC8280XP but which uses a single
host interrupt for MSI routing.
Link: https://lore.kernel.org/r/20220714071348.6
dt-bindings: PCI: qcom: Add SA8540P to binding
SA8540P is a new platform related to SC8280XP but which uses a single
host interrupt for MSI routing.
Link: https://lore.kernel.org/r/20220714071348.6792-4-johan+linaro@kernel.org
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
show more ...
|
| #
76d777ae |
| 14-Jul-2022 |
Johan Hovold <johan+linaro@kernel.org> |
dt-bindings: PCI: qcom: Add SC8280XP to binding
Add the SC8280XP platform to the binding.
SC8280XP use four host interrupts for MSI routing so remove the obsolete
comment referring to newer chipset
dt-bindings: PCI: qcom: Add SC8280XP to binding
Add the SC8280XP platform to the binding.
SC8280XP use four host interrupts for MSI routing so remove the obsolete
comment referring to newer chipsets supporting one or eight interrupts
(e.g. for backwards compatibility).
Link: https://lore.kernel.org/r/20220714071348.6792-3-johan+linaro@kernel.org
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
show more ...
|
| #
66116567 |
| 14-Jul-2022 |
Johan Hovold <johan+linaro@kernel.org> |
dt-bindings: PCI: qcom: Enumerate platforms with single msi interrupt
Explicitly enumerate the older platforms that have a single msi host
interrupt. This allows for adding further platforms with, f
dt-bindings: PCI: qcom: Enumerate platforms with single msi interrupt
Explicitly enumerate the older platforms that have a single msi host
interrupt. This allows for adding further platforms with, for example,
four msi interrupts without resorting to nested conditionals.
Drop the redundant comment about older chipsets instead of moving it.
Link: https://lore.kernel.org/r/20220714071348.6792-2-johan+linaro@kernel.org
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
show more ...
|
|
Revision tags: v5.15.54, v5.15.53 |
|
| #
91a773f9 |
| 07-Jul-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
dt-bindings: PCI: qcom: Support additional MSI vectors
On Qualcomm platforms each group of 32 MSI vectors is routed to the
separate GIC interrupt. Document mapping of additional interrupts.
Link: h
dt-bindings: PCI: qcom: Support additional MSI vectors
On Qualcomm platforms each group of 32 MSI vectors is routed to the
separate GIC interrupt. Document mapping of additional interrupts.
Link: https://lore.kernel.org/r/20220707134733.2436629-6-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
show more ...
|
|
Revision tags: v5.15.52 |
|
| #
839fbdee |
| 29-Jun-2022 |
Johan Hovold <johan+linaro@kernel.org> |
dt-bindings: PCI: qcom: Fix reset conditional
Fix the reset conditional which always evaluated to true due to a
misspelled property name ("compatibles" in plural).
Fixes: 6700a9b00f0a ("dt-bindings
dt-bindings: PCI: qcom: Fix reset conditional
Fix the reset conditional which always evaluated to true due to a
misspelled property name ("compatibles" in plural).
Fixes: 6700a9b00f0a ("dt-bindings: PCI: qcom: Do not require resets on msm8996 platforms")
Link: https://lore.kernel.org/r/20220629141000.18111-2-johan+linaro@kernel.org
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
show more ...
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|
Revision tags: v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47 |
|
| #
5b05eab5 |
| 13-Jun-2022 |
Baruch Siach <baruch@tkos.co.il> |
dt-bindings: PCI: qcom: Fix description typo
Fix "based" typo in description.
Link: https://lore.kernel.org/r/e08b53be6cdf8d94a5a002d5b74c8a884b2ff3c6.1655100158.git.baruch@tkos.co.il
Signed-off-by
dt-bindings: PCI: qcom: Fix description typo
Fix "based" typo in description.
Link: https://lore.kernel.org/r/e08b53be6cdf8d94a5a002d5b74c8a884b2ff3c6.1655100158.git.baruch@tkos.co.il
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
show more ...
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Revision tags: v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38 |
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| #
3f467d12 |
| 06-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
dt-bindings: PCI: qcom: Add schema for sc7280 chipset
Add support for sc7280-specific clock and reset definitions.
Link: https://lore.kernel.org/r/20220506152107.1527552-5-dmitry.baryshkov@linaro.o
dt-bindings: PCI: qcom: Add schema for sc7280 chipset
Add support for sc7280-specific clock and reset definitions.
Link: https://lore.kernel.org/r/20220506152107.1527552-5-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
show more ...
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| #
c6523c4a |
| 06-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
dt-bindings: PCI: qcom: Specify reg-names explicitly
Instead of specifying the enum of possible reg-names, specify them
explicitly. This allows us to specify which chipsets need the "atu"
regions an
dt-bindings: PCI: qcom: Specify reg-names explicitly
Instead of specifying the enum of possible reg-names, specify them
explicitly. This allows us to specify which chipsets need the "atu"
regions and which do not. Also it clearly describes which platforms
enumerate PCIe cores using the dbi region and which use parf region for
that.
Link: https://lore.kernel.org/r/20220506152107.1527552-4-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
show more ...
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| #
6700a9b0 |
| 06-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
dt-bindings: PCI: qcom: Do not require resets on msm8996 platforms
On MSM8996/APQ8096 platforms the PCIe controller doesn't have any
resets. So move the requirement stanza under the corresponding if
dt-bindings: PCI: qcom: Do not require resets on msm8996 platforms
On MSM8996/APQ8096 platforms the PCIe controller doesn't have any
resets. So move the requirement stanza under the corresponding if
condition.
Link: https://lore.kernel.org/r/20220506152107.1527552-3-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
show more ...
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