1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PCI express root complex 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Stanimir Varbanov <svarbanov@mm-sol.com> 12 13description: | 14 Qualcomm PCIe root complex controller is based on the Synopsys DesignWare 15 PCIe IP. 16 17properties: 18 compatible: 19 enum: 20 - qcom,pcie-ipq8064 21 - qcom,pcie-ipq8064-v2 22 - qcom,pcie-apq8064 23 - qcom,pcie-apq8084 24 - qcom,pcie-msm8996 25 - qcom,pcie-ipq4019 26 - qcom,pcie-ipq8074 27 - qcom,pcie-qcs404 28 - qcom,pcie-sa8540p 29 - qcom,pcie-sc7280 30 - qcom,pcie-sc8180x 31 - qcom,pcie-sc8280xp 32 - qcom,pcie-sdm845 33 - qcom,pcie-sm8150 34 - qcom,pcie-sm8250 35 - qcom,pcie-sm8450-pcie0 36 - qcom,pcie-sm8450-pcie1 37 - qcom,pcie-ipq6018 38 39 reg: 40 minItems: 4 41 maxItems: 5 42 43 reg-names: 44 minItems: 4 45 maxItems: 5 46 47 interrupts: 48 minItems: 1 49 maxItems: 8 50 51 interrupt-names: 52 minItems: 1 53 maxItems: 8 54 55 # Common definitions for clocks, clock-names and reset. 56 # Platform constraints are described later. 57 clocks: 58 minItems: 3 59 maxItems: 12 60 61 clock-names: 62 minItems: 3 63 maxItems: 12 64 65 resets: 66 minItems: 1 67 maxItems: 12 68 69 resets-names: 70 minItems: 1 71 maxItems: 12 72 73 vdda-supply: 74 description: A phandle to the core analog power supply 75 76 vdda_phy-supply: 77 description: A phandle to the core analog power supply for PHY 78 79 vdda_refclk-supply: 80 description: A phandle to the core analog power supply for IC which generates reference clock 81 82 vddpe-3v3-supply: 83 description: A phandle to the PCIe endpoint power supply 84 85 phys: 86 maxItems: 1 87 88 phy-names: 89 items: 90 - const: pciephy 91 92 power-domains: 93 maxItems: 1 94 95 perst-gpios: 96 description: GPIO controlled connection to PERST# signal 97 maxItems: 1 98 99 wake-gpios: 100 description: GPIO controlled connection to WAKE# signal 101 maxItems: 1 102 103required: 104 - compatible 105 - reg 106 - reg-names 107 - interrupts 108 - interrupt-names 109 - "#interrupt-cells" 110 - interrupt-map-mask 111 - interrupt-map 112 - clocks 113 - clock-names 114 115allOf: 116 - $ref: /schemas/pci/pci-bus.yaml# 117 - if: 118 properties: 119 compatible: 120 contains: 121 enum: 122 - qcom,pcie-apq8064 123 - qcom,pcie-ipq4019 124 - qcom,pcie-ipq8064 125 - qcom,pcie-ipq8064v2 126 - qcom,pcie-ipq8074 127 - qcom,pcie-qcs404 128 then: 129 properties: 130 reg: 131 minItems: 4 132 maxItems: 4 133 reg-names: 134 items: 135 - const: dbi # DesignWare PCIe registers 136 - const: elbi # External local bus interface registers 137 - const: parf # Qualcomm specific registers 138 - const: config # PCIe configuration space 139 140 - if: 141 properties: 142 compatible: 143 contains: 144 enum: 145 - qcom,pcie-ipq6018 146 then: 147 properties: 148 reg: 149 minItems: 5 150 maxItems: 5 151 reg-names: 152 items: 153 - const: dbi # DesignWare PCIe registers 154 - const: elbi # External local bus interface registers 155 - const: atu # ATU address space 156 - const: parf # Qualcomm specific registers 157 - const: config # PCIe configuration space 158 159 - if: 160 properties: 161 compatible: 162 contains: 163 enum: 164 - qcom,pcie-apq8084 165 - qcom,pcie-msm8996 166 - qcom,pcie-sdm845 167 then: 168 properties: 169 reg: 170 minItems: 4 171 maxItems: 4 172 reg-names: 173 items: 174 - const: parf # Qualcomm specific registers 175 - const: dbi # DesignWare PCIe registers 176 - const: elbi # External local bus interface registers 177 - const: config # PCIe configuration space 178 179 - if: 180 properties: 181 compatible: 182 contains: 183 enum: 184 - qcom,pcie-sc7280 185 - qcom,pcie-sc8180x 186 - qcom,pcie-sc8280xp 187 - qcom,pcie-sm8250 188 - qcom,pcie-sm8450-pcie0 189 - qcom,pcie-sm8450-pcie1 190 then: 191 properties: 192 reg: 193 minItems: 5 194 maxItems: 5 195 reg-names: 196 items: 197 - const: parf # Qualcomm specific registers 198 - const: dbi # DesignWare PCIe registers 199 - const: elbi # External local bus interface registers 200 - const: atu # ATU address space 201 - const: config # PCIe configuration space 202 203 - if: 204 properties: 205 compatible: 206 contains: 207 enum: 208 - qcom,pcie-apq8064 209 - qcom,pcie-ipq8064 210 - qcom,pcie-ipq8064v2 211 then: 212 properties: 213 clocks: 214 minItems: 3 215 maxItems: 5 216 clock-names: 217 minItems: 3 218 items: 219 - const: core # Clocks the pcie hw block 220 - const: iface # Configuration AHB clock 221 - const: phy # Clocks the pcie PHY block 222 - const: aux # Clocks the pcie AUX block, not on apq8064 223 - const: ref # Clocks the pcie ref block, not on apq8064 224 resets: 225 minItems: 5 226 maxItems: 6 227 reset-names: 228 minItems: 5 229 items: 230 - const: axi # AXI reset 231 - const: ahb # AHB reset 232 - const: por # POR reset 233 - const: pci # PCI reset 234 - const: phy # PHY reset 235 - const: ext # EXT reset, not on apq8064 236 required: 237 - vdda-supply 238 - vdda_phy-supply 239 - vdda_refclk-supply 240 241 - if: 242 properties: 243 compatible: 244 contains: 245 enum: 246 - qcom,pcie-apq8084 247 then: 248 properties: 249 clocks: 250 minItems: 4 251 maxItems: 4 252 clock-names: 253 items: 254 - const: iface # Configuration AHB clock 255 - const: master_bus # Master AXI clock 256 - const: slave_bus # Slave AXI clock 257 - const: aux # Auxiliary (AUX) clock 258 resets: 259 maxItems: 1 260 reset-names: 261 items: 262 - const: core # Core reset 263 264 - if: 265 properties: 266 compatible: 267 contains: 268 enum: 269 - qcom,pcie-ipq4019 270 then: 271 properties: 272 clocks: 273 minItems: 3 274 maxItems: 3 275 clock-names: 276 items: 277 - const: aux # Auxiliary (AUX) clock 278 - const: master_bus # Master AXI clock 279 - const: slave_bus # Slave AXI clock 280 resets: 281 minItems: 12 282 maxItems: 12 283 reset-names: 284 items: 285 - const: axi_m # AXI master reset 286 - const: axi_s # AXI slave reset 287 - const: pipe # PIPE reset 288 - const: axi_m_vmid # VMID reset 289 - const: axi_s_xpu # XPU reset 290 - const: parf # PARF reset 291 - const: phy # PHY reset 292 - const: axi_m_sticky # AXI sticky reset 293 - const: pipe_sticky # PIPE sticky reset 294 - const: pwr # PWR reset 295 - const: ahb # AHB reset 296 - const: phy_ahb # PHY AHB reset 297 298 - if: 299 properties: 300 compatible: 301 contains: 302 enum: 303 - qcom,pcie-msm8996 304 then: 305 oneOf: 306 - properties: 307 clock-names: 308 items: 309 - const: pipe # Pipe Clock driving internal logic 310 - const: aux # Auxiliary (AUX) clock 311 - const: cfg # Configuration clock 312 - const: bus_master # Master AXI clock 313 - const: bus_slave # Slave AXI clock 314 - properties: 315 clock-names: 316 items: 317 - const: pipe # Pipe Clock driving internal logic 318 - const: bus_master # Master AXI clock 319 - const: bus_slave # Slave AXI clock 320 - const: cfg # Configuration clock 321 - const: aux # Auxiliary (AUX) clock 322 properties: 323 clocks: 324 minItems: 5 325 maxItems: 5 326 resets: false 327 reset-names: false 328 329 - if: 330 properties: 331 compatible: 332 contains: 333 enum: 334 - qcom,pcie-ipq8074 335 then: 336 properties: 337 clocks: 338 minItems: 5 339 maxItems: 5 340 clock-names: 341 items: 342 - const: iface # PCIe to SysNOC BIU clock 343 - const: axi_m # AXI Master clock 344 - const: axi_s # AXI Slave clock 345 - const: ahb # AHB clock 346 - const: aux # Auxiliary clock 347 resets: 348 minItems: 7 349 maxItems: 7 350 reset-names: 351 items: 352 - const: pipe # PIPE reset 353 - const: sleep # Sleep reset 354 - const: sticky # Core Sticky reset 355 - const: axi_m # AXI Master reset 356 - const: axi_s # AXI Slave reset 357 - const: ahb # AHB Reset 358 - const: axi_m_sticky # AXI Master Sticky reset 359 360 - if: 361 properties: 362 compatible: 363 contains: 364 enum: 365 - qcom,pcie-ipq6018 366 then: 367 properties: 368 clocks: 369 minItems: 5 370 maxItems: 5 371 clock-names: 372 items: 373 - const: iface # PCIe to SysNOC BIU clock 374 - const: axi_m # AXI Master clock 375 - const: axi_s # AXI Slave clock 376 - const: axi_bridge # AXI bridge clock 377 - const: rchng 378 resets: 379 minItems: 8 380 maxItems: 8 381 reset-names: 382 items: 383 - const: pipe # PIPE reset 384 - const: sleep # Sleep reset 385 - const: sticky # Core Sticky reset 386 - const: axi_m # AXI Master reset 387 - const: axi_s # AXI Slave reset 388 - const: ahb # AHB Reset 389 - const: axi_m_sticky # AXI Master Sticky reset 390 - const: axi_s_sticky # AXI Slave Sticky reset 391 392 - if: 393 properties: 394 compatible: 395 contains: 396 enum: 397 - qcom,pcie-qcs404 398 then: 399 properties: 400 clocks: 401 minItems: 4 402 maxItems: 4 403 clock-names: 404 items: 405 - const: iface # AHB clock 406 - const: aux # Auxiliary clock 407 - const: master_bus # AXI Master clock 408 - const: slave_bus # AXI Slave clock 409 resets: 410 minItems: 6 411 maxItems: 6 412 reset-names: 413 items: 414 - const: axi_m # AXI Master reset 415 - const: axi_s # AXI Slave reset 416 - const: axi_m_sticky # AXI Master Sticky reset 417 - const: pipe_sticky # PIPE sticky reset 418 - const: pwr # PWR reset 419 - const: ahb # AHB reset 420 421 - if: 422 properties: 423 compatible: 424 contains: 425 enum: 426 - qcom,pcie-sc7280 427 then: 428 properties: 429 clocks: 430 minItems: 11 431 maxItems: 11 432 clock-names: 433 items: 434 - const: pipe # PIPE clock 435 - const: pipe_mux # PIPE MUX 436 - const: phy_pipe # PIPE output clock 437 - const: ref # REFERENCE clock 438 - const: aux # Auxiliary clock 439 - const: cfg # Configuration clock 440 - const: bus_master # Master AXI clock 441 - const: bus_slave # Slave AXI clock 442 - const: slave_q2a # Slave Q2A clock 443 - const: tbu # PCIe TBU clock 444 - const: ddrss_sf_tbu # PCIe SF TBU clock 445 resets: 446 maxItems: 1 447 reset-names: 448 items: 449 - const: pci # PCIe core reset 450 451 - if: 452 properties: 453 compatible: 454 contains: 455 enum: 456 - qcom,pcie-sdm845 457 then: 458 oneOf: 459 # Unfortunately the "optional" ref clock is used in the middle of the list 460 - properties: 461 clocks: 462 minItems: 8 463 maxItems: 8 464 clock-names: 465 items: 466 - const: pipe # PIPE clock 467 - const: aux # Auxiliary clock 468 - const: cfg # Configuration clock 469 - const: bus_master # Master AXI clock 470 - const: bus_slave # Slave AXI clock 471 - const: slave_q2a # Slave Q2A clock 472 - const: ref # REFERENCE clock 473 - const: tbu # PCIe TBU clock 474 - properties: 475 clocks: 476 minItems: 7 477 maxItems: 7 478 clock-names: 479 items: 480 - const: pipe # PIPE clock 481 - const: aux # Auxiliary clock 482 - const: cfg # Configuration clock 483 - const: bus_master # Master AXI clock 484 - const: bus_slave # Slave AXI clock 485 - const: slave_q2a # Slave Q2A clock 486 - const: tbu # PCIe TBU clock 487 properties: 488 resets: 489 maxItems: 1 490 reset-names: 491 items: 492 - const: pci # PCIe core reset 493 494 - if: 495 properties: 496 compatible: 497 contains: 498 enum: 499 - qcom,pcie-sc8180x 500 - qcom,pcie-sm8150 501 - qcom,pcie-sm8250 502 then: 503 oneOf: 504 # Unfortunately the "optional" ref clock is used in the middle of the list 505 - properties: 506 clocks: 507 minItems: 9 508 maxItems: 9 509 clock-names: 510 items: 511 - const: pipe # PIPE clock 512 - const: aux # Auxiliary clock 513 - const: cfg # Configuration clock 514 - const: bus_master # Master AXI clock 515 - const: bus_slave # Slave AXI clock 516 - const: slave_q2a # Slave Q2A clock 517 - const: ref # REFERENCE clock 518 - const: tbu # PCIe TBU clock 519 - const: ddrss_sf_tbu # PCIe SF TBU clock 520 - properties: 521 clocks: 522 minItems: 8 523 maxItems: 8 524 clock-names: 525 items: 526 - const: pipe # PIPE clock 527 - const: aux # Auxiliary clock 528 - const: cfg # Configuration clock 529 - const: bus_master # Master AXI clock 530 - const: bus_slave # Slave AXI clock 531 - const: slave_q2a # Slave Q2A clock 532 - const: tbu # PCIe TBU clock 533 - const: ddrss_sf_tbu # PCIe SF TBU clock 534 properties: 535 resets: 536 maxItems: 1 537 reset-names: 538 items: 539 - const: pci # PCIe core reset 540 541 - if: 542 properties: 543 compatible: 544 contains: 545 enum: 546 - qcom,pcie-sm8450-pcie0 547 then: 548 properties: 549 clocks: 550 minItems: 12 551 maxItems: 12 552 clock-names: 553 items: 554 - const: pipe # PIPE clock 555 - const: pipe_mux # PIPE MUX 556 - const: phy_pipe # PIPE output clock 557 - const: ref # REFERENCE clock 558 - const: aux # Auxiliary clock 559 - const: cfg # Configuration clock 560 - const: bus_master # Master AXI clock 561 - const: bus_slave # Slave AXI clock 562 - const: slave_q2a # Slave Q2A clock 563 - const: ddrss_sf_tbu # PCIe SF TBU clock 564 - const: aggre0 # Aggre NoC PCIe0 AXI clock 565 - const: aggre1 # Aggre NoC PCIe1 AXI clock 566 resets: 567 maxItems: 1 568 reset-names: 569 items: 570 - const: pci # PCIe core reset 571 572 - if: 573 properties: 574 compatible: 575 contains: 576 enum: 577 - qcom,pcie-sm8450-pcie1 578 then: 579 properties: 580 clocks: 581 minItems: 11 582 maxItems: 11 583 clock-names: 584 items: 585 - const: pipe # PIPE clock 586 - const: pipe_mux # PIPE MUX 587 - const: phy_pipe # PIPE output clock 588 - const: ref # REFERENCE clock 589 - const: aux # Auxiliary clock 590 - const: cfg # Configuration clock 591 - const: bus_master # Master AXI clock 592 - const: bus_slave # Slave AXI clock 593 - const: slave_q2a # Slave Q2A clock 594 - const: ddrss_sf_tbu # PCIe SF TBU clock 595 - const: aggre1 # Aggre NoC PCIe1 AXI clock 596 resets: 597 maxItems: 1 598 reset-names: 599 items: 600 - const: pci # PCIe core reset 601 602 - if: 603 properties: 604 compatible: 605 contains: 606 enum: 607 - qcom,pcie-sa8540p 608 - qcom,pcie-sc8280xp 609 then: 610 properties: 611 clocks: 612 minItems: 8 613 maxItems: 9 614 clock-names: 615 minItems: 8 616 items: 617 - const: aux # Auxiliary clock 618 - const: cfg # Configuration clock 619 - const: bus_master # Master AXI clock 620 - const: bus_slave # Slave AXI clock 621 - const: slave_q2a # Slave Q2A clock 622 - const: ddrss_sf_tbu # PCIe SF TBU clock 623 - const: noc_aggr_4 # NoC aggregate 4 clock 624 - const: noc_aggr_south_sf # NoC aggregate South SF clock 625 - const: cnoc_qx # Configuration NoC QX clock 626 resets: 627 maxItems: 1 628 reset-names: 629 items: 630 - const: pci # PCIe core reset 631 632 - if: 633 not: 634 properties: 635 compatible: 636 contains: 637 enum: 638 - qcom,pcie-apq8064 639 - qcom,pcie-ipq4019 640 - qcom,pcie-ipq8064 641 - qcom,pcie-ipq8064v2 642 - qcom,pcie-ipq8074 643 - qcom,pcie-qcs404 644 then: 645 required: 646 - power-domains 647 648 - if: 649 not: 650 properties: 651 compatible: 652 contains: 653 enum: 654 - qcom,pcie-msm8996 655 then: 656 required: 657 - resets 658 - reset-names 659 660 - if: 661 properties: 662 compatible: 663 contains: 664 enum: 665 - qcom,pcie-msm8996 666 - qcom,pcie-sc7280 667 - qcom,pcie-sc8180x 668 - qcom,pcie-sdm845 669 - qcom,pcie-sm8150 670 - qcom,pcie-sm8250 671 - qcom,pcie-sm8450-pcie0 672 - qcom,pcie-sm8450-pcie1 673 then: 674 oneOf: 675 - properties: 676 interrupts: 677 maxItems: 1 678 interrupt-names: 679 items: 680 - const: msi 681 - properties: 682 interrupts: 683 minItems: 8 684 interrupt-names: 685 items: 686 - const: msi0 687 - const: msi1 688 - const: msi2 689 - const: msi3 690 - const: msi4 691 - const: msi5 692 - const: msi6 693 - const: msi7 694 695 - if: 696 properties: 697 compatible: 698 contains: 699 enum: 700 - qcom,pcie-sc8280xp 701 then: 702 properties: 703 interrupts: 704 minItems: 4 705 maxItems: 4 706 interrupt-names: 707 items: 708 - const: msi0 709 - const: msi1 710 - const: msi2 711 - const: msi3 712 713 - if: 714 properties: 715 compatible: 716 contains: 717 enum: 718 - qcom,pcie-apq8064 719 - qcom,pcie-apq8084 720 - qcom,pcie-ipq4019 721 - qcom,pcie-ipq6018 722 - qcom,pcie-ipq8064 723 - qcom,pcie-ipq8064-v2 724 - qcom,pcie-ipq8074 725 - qcom,pcie-qcs404 726 - qcom,pcie-sa8540p 727 then: 728 properties: 729 interrupts: 730 maxItems: 1 731 interrupt-names: 732 items: 733 - const: msi 734 735unevaluatedProperties: false 736 737examples: 738 - | 739 #include <dt-bindings/interrupt-controller/arm-gic.h> 740 pcie@1b500000 { 741 compatible = "qcom,pcie-ipq8064"; 742 reg = <0x1b500000 0x1000>, 743 <0x1b502000 0x80>, 744 <0x1b600000 0x100>, 745 <0x0ff00000 0x100000>; 746 reg-names = "dbi", "elbi", "parf", "config"; 747 device_type = "pci"; 748 linux,pci-domain = <0>; 749 bus-range = <0x00 0xff>; 750 num-lanes = <1>; 751 #address-cells = <3>; 752 #size-cells = <2>; 753 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, 754 <0x82000000 0 0 0x08000000 0 0x07e00000>; 755 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 756 interrupt-names = "msi"; 757 #interrupt-cells = <1>; 758 interrupt-map-mask = <0 0 0 0x7>; 759 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, 760 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, 761 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, 762 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; 763 clocks = <&gcc 41>, 764 <&gcc 43>, 765 <&gcc 44>, 766 <&gcc 42>, 767 <&gcc 248>; 768 clock-names = "core", "iface", "phy", "aux", "ref"; 769 resets = <&gcc 27>, 770 <&gcc 26>, 771 <&gcc 25>, 772 <&gcc 24>, 773 <&gcc 23>, 774 <&gcc 22>; 775 reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; 776 pinctrl-0 = <&pcie_pins_default>; 777 pinctrl-names = "default"; 778 vdda-supply = <&pm8921_s3>; 779 vdda_phy-supply = <&pm8921_lvs6>; 780 vdda_refclk-supply = <&ext_3p3v>; 781 }; 782 - | 783 #include <dt-bindings/interrupt-controller/arm-gic.h> 784 #include <dt-bindings/gpio/gpio.h> 785 pcie@fc520000 { 786 compatible = "qcom,pcie-apq8084"; 787 reg = <0xfc520000 0x2000>, 788 <0xff000000 0x1000>, 789 <0xff001000 0x1000>, 790 <0xff002000 0x2000>; 791 reg-names = "parf", "dbi", "elbi", "config"; 792 device_type = "pci"; 793 linux,pci-domain = <0>; 794 bus-range = <0x00 0xff>; 795 num-lanes = <1>; 796 #address-cells = <3>; 797 #size-cells = <2>; 798 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, 799 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; 800 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 801 interrupt-names = "msi"; 802 #interrupt-cells = <1>; 803 interrupt-map-mask = <0 0 0 0x7>; 804 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, 805 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, 806 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, 807 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; 808 clocks = <&gcc 324>, 809 <&gcc 325>, 810 <&gcc 327>, 811 <&gcc 323>; 812 clock-names = "iface", "master_bus", "slave_bus", "aux"; 813 resets = <&gcc 81>; 814 reset-names = "core"; 815 power-domains = <&gcc 1>; 816 vdda-supply = <&pma8084_l3>; 817 phys = <&pciephy0>; 818 phy-names = "pciephy"; 819 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; 820 pinctrl-0 = <&pcie0_pins_default>; 821 pinctrl-names = "default"; 822 }; 823... 824