1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PCI express root complex 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Stanimir Varbanov <svarbanov@mm-sol.com> 12 13description: | 14 Qualcomm PCIe root complex controller is bansed on the Synopsys DesignWare 15 PCIe IP. 16 17properties: 18 compatible: 19 enum: 20 - qcom,pcie-ipq8064 21 - qcom,pcie-ipq8064-v2 22 - qcom,pcie-apq8064 23 - qcom,pcie-apq8084 24 - qcom,pcie-msm8996 25 - qcom,pcie-ipq4019 26 - qcom,pcie-ipq8074 27 - qcom,pcie-qcs404 28 - qcom,pcie-sc8180x 29 - qcom,pcie-sdm845 30 - qcom,pcie-sm8150 31 - qcom,pcie-sm8250 32 - qcom,pcie-sm8450-pcie0 33 - qcom,pcie-sm8450-pcie1 34 - qcom,pcie-ipq6018 35 36 reg: 37 minItems: 4 38 maxItems: 5 39 40 reg-names: 41 minItems: 4 42 maxItems: 5 43 items: 44 enum: 45 - parf # Qualcomm specific registers 46 - dbi # DesignWare PCIe registers 47 - elbi # External local bus interface registers 48 - config # PCIe configuration space 49 - atu # ATU address space (optional) 50 51 interrupts: 52 maxItems: 1 53 54 interrupt-names: 55 items: 56 - const: msi 57 58 # Common definitions for clocks, clock-names and reset. 59 # Platform constraints are described later. 60 clocks: 61 minItems: 3 62 maxItems: 12 63 64 clock-names: 65 minItems: 3 66 maxItems: 12 67 68 resets: 69 minItems: 1 70 maxItems: 12 71 72 resets-names: 73 minItems: 1 74 maxItems: 12 75 76 vdda-supply: 77 description: A phandle to the core analog power supply 78 79 vdda_phy-supply: 80 description: A phandle to the core analog power supply for PHY 81 82 vdda_refclk-supply: 83 description: A phandle to the core analog power supply for IC which generates reference clock 84 85 vddpe-3v3-supply: 86 description: A phandle to the PCIe endpoint power supply 87 88 phys: 89 maxItems: 1 90 91 phy-names: 92 items: 93 - const: pciephy 94 95 power-domains: 96 maxItems: 1 97 98 perst-gpios: 99 description: GPIO controlled connection to PERST# signal 100 maxItems: 1 101 102 wake-gpios: 103 description: GPIO controlled connection to WAKE# signal 104 maxItems: 1 105 106required: 107 - compatible 108 - reg 109 - reg-names 110 - interrupts 111 - interrupt-names 112 - "#interrupt-cells" 113 - interrupt-map-mask 114 - interrupt-map 115 - clocks 116 - clock-names 117 118allOf: 119 - $ref: /schemas/pci/pci-bus.yaml# 120 - if: 121 properties: 122 compatible: 123 contains: 124 enum: 125 - qcom,pcie-apq8064 126 - qcom,pcie-ipq8064 127 - qcom,pcie-ipq8064v2 128 then: 129 properties: 130 clocks: 131 minItems: 3 132 maxItems: 5 133 clock-names: 134 minItems: 3 135 items: 136 - const: core # Clocks the pcie hw block 137 - const: iface # Configuration AHB clock 138 - const: phy # Clocks the pcie PHY block 139 - const: aux # Clocks the pcie AUX block, not on apq8064 140 - const: ref # Clocks the pcie ref block, not on apq8064 141 resets: 142 minItems: 5 143 maxItems: 6 144 reset-names: 145 minItems: 5 146 items: 147 - const: axi # AXI reset 148 - const: ahb # AHB reset 149 - const: por # POR reset 150 - const: pci # PCI reset 151 - const: phy # PHY reset 152 - const: ext # EXT reset, not on apq8064 153 required: 154 - vdda-supply 155 - vdda_phy-supply 156 - vdda_refclk-supply 157 158 - if: 159 properties: 160 compatible: 161 contains: 162 enum: 163 - qcom,pcie-apq8084 164 then: 165 properties: 166 clocks: 167 minItems: 4 168 maxItems: 4 169 clock-names: 170 items: 171 - const: iface # Configuration AHB clock 172 - const: master_bus # Master AXI clock 173 - const: slave_bus # Slave AXI clock 174 - const: aux # Auxiliary (AUX) clock 175 resets: 176 maxItems: 1 177 reset-names: 178 items: 179 - const: core # Core reset 180 181 - if: 182 properties: 183 compatible: 184 contains: 185 enum: 186 - qcom,pcie-ipq4019 187 then: 188 properties: 189 clocks: 190 minItems: 3 191 maxItems: 3 192 clock-names: 193 items: 194 - const: aux # Auxiliary (AUX) clock 195 - const: master_bus # Master AXI clock 196 - const: slave_bus # Slave AXI clock 197 resets: 198 minItems: 12 199 maxItems: 12 200 reset-names: 201 items: 202 - const: axi_m # AXI master reset 203 - const: axi_s # AXI slave reset 204 - const: pipe # PIPE reset 205 - const: axi_m_vmid # VMID reset 206 - const: axi_s_xpu # XPU reset 207 - const: parf # PARF reset 208 - const: phy # PHY reset 209 - const: axi_m_sticky # AXI sticky reset 210 - const: pipe_sticky # PIPE sticky reset 211 - const: pwr # PWR reset 212 - const: ahb # AHB reset 213 - const: phy_ahb # PHY AHB reset 214 215 - if: 216 properties: 217 compatible: 218 contains: 219 enum: 220 - qcom,pcie-msm8996 221 then: 222 oneOf: 223 - properties: 224 clock-names: 225 items: 226 - const: pipe # Pipe Clock driving internal logic 227 - const: aux # Auxiliary (AUX) clock 228 - const: cfg # Configuration clock 229 - const: bus_master # Master AXI clock 230 - const: bus_slave # Slave AXI clock 231 - properties: 232 clock-names: 233 items: 234 - const: pipe # Pipe Clock driving internal logic 235 - const: bus_master # Master AXI clock 236 - const: bus_slave # Slave AXI clock 237 - const: cfg # Configuration clock 238 - const: aux # Auxiliary (AUX) clock 239 properties: 240 clocks: 241 minItems: 5 242 maxItems: 5 243 resets: false 244 reset-names: false 245 246 - if: 247 properties: 248 compatible: 249 contains: 250 enum: 251 - qcom,pcie-ipq8074 252 then: 253 properties: 254 clocks: 255 minItems: 5 256 maxItems: 5 257 clock-names: 258 items: 259 - const: iface # PCIe to SysNOC BIU clock 260 - const: axi_m # AXI Master clock 261 - const: axi_s # AXI Slave clock 262 - const: ahb # AHB clock 263 - const: aux # Auxiliary clock 264 resets: 265 minItems: 7 266 maxItems: 7 267 reset-names: 268 items: 269 - const: pipe # PIPE reset 270 - const: sleep # Sleep reset 271 - const: sticky # Core Sticky reset 272 - const: axi_m # AXI Master reset 273 - const: axi_s # AXI Slave reset 274 - const: ahb # AHB Reset 275 - const: axi_m_sticky # AXI Master Sticky reset 276 277 - if: 278 properties: 279 compatible: 280 contains: 281 enum: 282 - qcom,pcie-ipq6018 283 then: 284 properties: 285 clocks: 286 minItems: 5 287 maxItems: 5 288 clock-names: 289 items: 290 - const: iface # PCIe to SysNOC BIU clock 291 - const: axi_m # AXI Master clock 292 - const: axi_s # AXI Slave clock 293 - const: axi_bridge # AXI bridge clock 294 - const: rchng 295 resets: 296 minItems: 8 297 maxItems: 8 298 reset-names: 299 items: 300 - const: pipe # PIPE reset 301 - const: sleep # Sleep reset 302 - const: sticky # Core Sticky reset 303 - const: axi_m # AXI Master reset 304 - const: axi_s # AXI Slave reset 305 - const: ahb # AHB Reset 306 - const: axi_m_sticky # AXI Master Sticky reset 307 - const: axi_s_sticky # AXI Slave Sticky reset 308 309 - if: 310 properties: 311 compatible: 312 contains: 313 enum: 314 - qcom,pcie-qcs404 315 then: 316 properties: 317 clocks: 318 minItems: 4 319 maxItems: 4 320 clock-names: 321 items: 322 - const: iface # AHB clock 323 - const: aux # Auxiliary clock 324 - const: master_bus # AXI Master clock 325 - const: slave_bus # AXI Slave clock 326 resets: 327 minItems: 6 328 maxItems: 6 329 reset-names: 330 items: 331 - const: axi_m # AXI Master reset 332 - const: axi_s # AXI Slave reset 333 - const: axi_m_sticky # AXI Master Sticky reset 334 - const: pipe_sticky # PIPE sticky reset 335 - const: pwr # PWR reset 336 - const: ahb # AHB reset 337 338 - if: 339 properties: 340 compatible: 341 contains: 342 enum: 343 - qcom,pcie-sdm845 344 then: 345 oneOf: 346 # Unfortunately the "optional" ref clock is used in the middle of the list 347 - properties: 348 clocks: 349 minItems: 8 350 maxItems: 8 351 clock-names: 352 items: 353 - const: pipe # PIPE clock 354 - const: aux # Auxiliary clock 355 - const: cfg # Configuration clock 356 - const: bus_master # Master AXI clock 357 - const: bus_slave # Slave AXI clock 358 - const: slave_q2a # Slave Q2A clock 359 - const: ref # REFERENCE clock 360 - const: tbu # PCIe TBU clock 361 - properties: 362 clocks: 363 minItems: 7 364 maxItems: 7 365 clock-names: 366 items: 367 - const: pipe # PIPE clock 368 - const: aux # Auxiliary clock 369 - const: cfg # Configuration clock 370 - const: bus_master # Master AXI clock 371 - const: bus_slave # Slave AXI clock 372 - const: slave_q2a # Slave Q2A clock 373 - const: tbu # PCIe TBU clock 374 properties: 375 resets: 376 maxItems: 1 377 reset-names: 378 items: 379 - const: pci # PCIe core reset 380 381 - if: 382 properties: 383 compatible: 384 contains: 385 enum: 386 - qcom,pcie-sc8180x 387 - qcom,pcie-sm8150 388 - qcom,pcie-sm8250 389 then: 390 oneOf: 391 # Unfortunately the "optional" ref clock is used in the middle of the list 392 - properties: 393 clocks: 394 minItems: 9 395 maxItems: 9 396 clock-names: 397 items: 398 - const: pipe # PIPE clock 399 - const: aux # Auxiliary clock 400 - const: cfg # Configuration clock 401 - const: bus_master # Master AXI clock 402 - const: bus_slave # Slave AXI clock 403 - const: slave_q2a # Slave Q2A clock 404 - const: ref # REFERENCE clock 405 - const: tbu # PCIe TBU clock 406 - const: ddrss_sf_tbu # PCIe SF TBU clock 407 - properties: 408 clocks: 409 minItems: 8 410 maxItems: 8 411 clock-names: 412 items: 413 - const: pipe # PIPE clock 414 - const: aux # Auxiliary clock 415 - const: cfg # Configuration clock 416 - const: bus_master # Master AXI clock 417 - const: bus_slave # Slave AXI clock 418 - const: slave_q2a # Slave Q2A clock 419 - const: tbu # PCIe TBU clock 420 - const: ddrss_sf_tbu # PCIe SF TBU clock 421 properties: 422 resets: 423 maxItems: 1 424 reset-names: 425 items: 426 - const: pci # PCIe core reset 427 428 - if: 429 properties: 430 compatible: 431 contains: 432 enum: 433 - qcom,pcie-sm8450-pcie0 434 then: 435 properties: 436 clocks: 437 minItems: 12 438 maxItems: 12 439 clock-names: 440 items: 441 - const: pipe # PIPE clock 442 - const: pipe_mux # PIPE MUX 443 - const: phy_pipe # PIPE output clock 444 - const: ref # REFERENCE clock 445 - const: aux # Auxiliary clock 446 - const: cfg # Configuration clock 447 - const: bus_master # Master AXI clock 448 - const: bus_slave # Slave AXI clock 449 - const: slave_q2a # Slave Q2A clock 450 - const: ddrss_sf_tbu # PCIe SF TBU clock 451 - const: aggre0 # Aggre NoC PCIe0 AXI clock 452 - const: aggre1 # Aggre NoC PCIe1 AXI clock 453 resets: 454 maxItems: 1 455 reset-names: 456 items: 457 - const: pci # PCIe core reset 458 459 - if: 460 properties: 461 compatible: 462 contains: 463 enum: 464 - qcom,pcie-sm8450-pcie1 465 then: 466 properties: 467 clocks: 468 minItems: 11 469 maxItems: 11 470 clock-names: 471 items: 472 - const: pipe # PIPE clock 473 - const: pipe_mux # PIPE MUX 474 - const: phy_pipe # PIPE output clock 475 - const: ref # REFERENCE clock 476 - const: aux # Auxiliary clock 477 - const: cfg # Configuration clock 478 - const: bus_master # Master AXI clock 479 - const: bus_slave # Slave AXI clock 480 - const: slave_q2a # Slave Q2A clock 481 - const: ddrss_sf_tbu # PCIe SF TBU clock 482 - const: aggre1 # Aggre NoC PCIe1 AXI clock 483 resets: 484 maxItems: 1 485 reset-names: 486 items: 487 - const: pci # PCIe core reset 488 489 - if: 490 not: 491 properties: 492 compatible: 493 contains: 494 enum: 495 - qcom,pcie-apq8064 496 - qcom,pcie-ipq4019 497 - qcom,pcie-ipq8064 498 - qcom,pcie-ipq8064v2 499 - qcom,pcie-ipq8074 500 - qcom,pcie-qcs404 501 then: 502 required: 503 - power-domains 504 505 - if: 506 not: 507 properties: 508 compatibles: 509 contains: 510 enum: 511 - qcom,pcie-msm8996 512 then: 513 required: 514 - resets 515 - reset-names 516 517unevaluatedProperties: false 518 519examples: 520 - | 521 #include <dt-bindings/interrupt-controller/arm-gic.h> 522 pcie@1b500000 { 523 compatible = "qcom,pcie-ipq8064"; 524 reg = <0x1b500000 0x1000>, 525 <0x1b502000 0x80>, 526 <0x1b600000 0x100>, 527 <0x0ff00000 0x100000>; 528 reg-names = "dbi", "elbi", "parf", "config"; 529 device_type = "pci"; 530 linux,pci-domain = <0>; 531 bus-range = <0x00 0xff>; 532 num-lanes = <1>; 533 #address-cells = <3>; 534 #size-cells = <2>; 535 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, 536 <0x82000000 0 0 0x08000000 0 0x07e00000>; 537 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 538 interrupt-names = "msi"; 539 #interrupt-cells = <1>; 540 interrupt-map-mask = <0 0 0 0x7>; 541 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, 542 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, 543 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, 544 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; 545 clocks = <&gcc 41>, 546 <&gcc 43>, 547 <&gcc 44>, 548 <&gcc 42>, 549 <&gcc 248>; 550 clock-names = "core", "iface", "phy", "aux", "ref"; 551 resets = <&gcc 27>, 552 <&gcc 26>, 553 <&gcc 25>, 554 <&gcc 24>, 555 <&gcc 23>, 556 <&gcc 22>; 557 reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; 558 pinctrl-0 = <&pcie_pins_default>; 559 pinctrl-names = "default"; 560 vdda-supply = <&pm8921_s3>; 561 vdda_phy-supply = <&pm8921_lvs6>; 562 vdda_refclk-supply = <&ext_3p3v>; 563 }; 564 - | 565 #include <dt-bindings/interrupt-controller/arm-gic.h> 566 #include <dt-bindings/gpio/gpio.h> 567 pcie@fc520000 { 568 compatible = "qcom,pcie-apq8084"; 569 reg = <0xfc520000 0x2000>, 570 <0xff000000 0x1000>, 571 <0xff001000 0x1000>, 572 <0xff002000 0x2000>; 573 reg-names = "parf", "dbi", "elbi", "config"; 574 device_type = "pci"; 575 linux,pci-domain = <0>; 576 bus-range = <0x00 0xff>; 577 num-lanes = <1>; 578 #address-cells = <3>; 579 #size-cells = <2>; 580 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, 581 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; 582 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 583 interrupt-names = "msi"; 584 #interrupt-cells = <1>; 585 interrupt-map-mask = <0 0 0 0x7>; 586 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, 587 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, 588 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, 589 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; 590 clocks = <&gcc 324>, 591 <&gcc 325>, 592 <&gcc 327>, 593 <&gcc 323>; 594 clock-names = "iface", "master_bus", "slave_bus", "aux"; 595 resets = <&gcc 81>; 596 reset-names = "core"; 597 power-domains = <&gcc 1>; 598 vdda-supply = <&pma8084_l3>; 599 phys = <&pciephy0>; 600 phy-names = "pciephy"; 601 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; 602 pinctrl-0 = <&pcie0_pins_default>; 603 pinctrl-names = "default"; 604 }; 605... 606