1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm PCI express root complex
8
9maintainers:
10  - Bjorn Andersson <bjorn.andersson@linaro.org>
11  - Stanimir Varbanov <svarbanov@mm-sol.com>
12
13description: |
14  Qualcomm PCIe root complex controller is based on the Synopsys DesignWare
15  PCIe IP.
16
17properties:
18  compatible:
19    enum:
20      - qcom,pcie-ipq8064
21      - qcom,pcie-ipq8064-v2
22      - qcom,pcie-apq8064
23      - qcom,pcie-apq8084
24      - qcom,pcie-msm8996
25      - qcom,pcie-ipq4019
26      - qcom,pcie-ipq8074
27      - qcom,pcie-qcs404
28      - qcom,pcie-sc7280
29      - qcom,pcie-sc8180x
30      - qcom,pcie-sdm845
31      - qcom,pcie-sm8150
32      - qcom,pcie-sm8250
33      - qcom,pcie-sm8450-pcie0
34      - qcom,pcie-sm8450-pcie1
35      - qcom,pcie-ipq6018
36
37  reg:
38    minItems: 4
39    maxItems: 5
40
41  reg-names:
42    minItems: 4
43    maxItems: 5
44
45  interrupts:
46    minItems: 1
47    maxItems: 8
48
49  interrupt-names:
50    minItems: 1
51    maxItems: 8
52
53  # Common definitions for clocks, clock-names and reset.
54  # Platform constraints are described later.
55  clocks:
56    minItems: 3
57    maxItems: 13
58
59  clock-names:
60    minItems: 3
61    maxItems: 13
62
63  resets:
64    minItems: 1
65    maxItems: 12
66
67  resets-names:
68    minItems: 1
69    maxItems: 12
70
71  vdda-supply:
72    description: A phandle to the core analog power supply
73
74  vdda_phy-supply:
75    description: A phandle to the core analog power supply for PHY
76
77  vdda_refclk-supply:
78    description: A phandle to the core analog power supply for IC which generates reference clock
79
80  vddpe-3v3-supply:
81    description: A phandle to the PCIe endpoint power supply
82
83  phys:
84    maxItems: 1
85
86  phy-names:
87    items:
88      - const: pciephy
89
90  power-domains:
91    maxItems: 1
92
93  perst-gpios:
94    description: GPIO controlled connection to PERST# signal
95    maxItems: 1
96
97  wake-gpios:
98    description: GPIO controlled connection to WAKE# signal
99    maxItems: 1
100
101required:
102  - compatible
103  - reg
104  - reg-names
105  - interrupts
106  - interrupt-names
107  - "#interrupt-cells"
108  - interrupt-map-mask
109  - interrupt-map
110  - clocks
111  - clock-names
112
113allOf:
114  - $ref: /schemas/pci/pci-bus.yaml#
115  - if:
116      properties:
117        compatible:
118          contains:
119            enum:
120              - qcom,pcie-apq8064
121              - qcom,pcie-ipq4019
122              - qcom,pcie-ipq8064
123              - qcom,pcie-ipq8064v2
124              - qcom,pcie-ipq8074
125              - qcom,pcie-qcs404
126    then:
127      properties:
128        reg:
129          minItems: 4
130          maxItems: 4
131        reg-names:
132          items:
133            - const: dbi # DesignWare PCIe registers
134            - const: elbi # External local bus interface registers
135            - const: parf # Qualcomm specific registers
136            - const: config # PCIe configuration space
137
138  - if:
139      properties:
140        compatible:
141          contains:
142            enum:
143              - qcom,pcie-ipq6018
144    then:
145      properties:
146        reg:
147          minItems: 5
148          maxItems: 5
149        reg-names:
150          items:
151            - const: dbi # DesignWare PCIe registers
152            - const: elbi # External local bus interface registers
153            - const: atu # ATU address space
154            - const: parf # Qualcomm specific registers
155            - const: config # PCIe configuration space
156
157  - if:
158      properties:
159        compatible:
160          contains:
161            enum:
162              - qcom,pcie-apq8084
163              - qcom,pcie-msm8996
164              - qcom,pcie-sdm845
165    then:
166      properties:
167        reg:
168          minItems: 4
169          maxItems: 4
170        reg-names:
171          items:
172            - const: parf # Qualcomm specific registers
173            - const: dbi # DesignWare PCIe registers
174            - const: elbi # External local bus interface registers
175            - const: config # PCIe configuration space
176
177  - if:
178      properties:
179        compatible:
180          contains:
181            enum:
182              - qcom,pcie-sc7280
183              - qcom,pcie-sc8180x
184              - qcom,pcie-sm8250
185              - qcom,pcie-sm8450-pcie0
186              - qcom,pcie-sm8450-pcie1
187    then:
188      properties:
189        reg:
190          minItems: 5
191          maxItems: 5
192        reg-names:
193          items:
194            - const: parf # Qualcomm specific registers
195            - const: dbi # DesignWare PCIe registers
196            - const: elbi # External local bus interface registers
197            - const: atu # ATU address space
198            - const: config # PCIe configuration space
199
200  - if:
201      properties:
202        compatible:
203          contains:
204            enum:
205              - qcom,pcie-apq8064
206              - qcom,pcie-ipq8064
207              - qcom,pcie-ipq8064v2
208    then:
209      properties:
210        clocks:
211          minItems: 3
212          maxItems: 5
213        clock-names:
214          minItems: 3
215          items:
216            - const: core # Clocks the pcie hw block
217            - const: iface # Configuration AHB clock
218            - const: phy # Clocks the pcie PHY block
219            - const: aux # Clocks the pcie AUX block, not on apq8064
220            - const: ref # Clocks the pcie ref block, not on apq8064
221        resets:
222          minItems: 5
223          maxItems: 6
224        reset-names:
225          minItems: 5
226          items:
227            - const: axi # AXI reset
228            - const: ahb # AHB reset
229            - const: por # POR reset
230            - const: pci # PCI reset
231            - const: phy # PHY reset
232            - const: ext # EXT reset, not on apq8064
233      required:
234        - vdda-supply
235        - vdda_phy-supply
236        - vdda_refclk-supply
237
238  - if:
239      properties:
240        compatible:
241          contains:
242            enum:
243              - qcom,pcie-apq8084
244    then:
245      properties:
246        clocks:
247          minItems: 4
248          maxItems: 4
249        clock-names:
250          items:
251            - const: iface # Configuration AHB clock
252            - const: master_bus # Master AXI clock
253            - const: slave_bus # Slave AXI clock
254            - const: aux # Auxiliary (AUX) clock
255        resets:
256          maxItems: 1
257        reset-names:
258          items:
259            - const: core # Core reset
260
261  - if:
262      properties:
263        compatible:
264          contains:
265            enum:
266              - qcom,pcie-ipq4019
267    then:
268      properties:
269        clocks:
270          minItems: 3
271          maxItems: 3
272        clock-names:
273          items:
274            - const: aux # Auxiliary (AUX) clock
275            - const: master_bus # Master AXI clock
276            - const: slave_bus # Slave AXI clock
277        resets:
278          minItems: 12
279          maxItems: 12
280        reset-names:
281          items:
282            - const: axi_m # AXI master reset
283            - const: axi_s # AXI slave reset
284            - const: pipe # PIPE reset
285            - const: axi_m_vmid # VMID reset
286            - const: axi_s_xpu # XPU reset
287            - const: parf # PARF reset
288            - const: phy # PHY reset
289            - const: axi_m_sticky # AXI sticky reset
290            - const: pipe_sticky # PIPE sticky reset
291            - const: pwr # PWR reset
292            - const: ahb # AHB reset
293            - const: phy_ahb # PHY AHB reset
294
295  - if:
296      properties:
297        compatible:
298          contains:
299            enum:
300              - qcom,pcie-msm8996
301    then:
302      oneOf:
303        - properties:
304            clock-names:
305              items:
306                - const: pipe # Pipe Clock driving internal logic
307                - const: aux # Auxiliary (AUX) clock
308                - const: cfg # Configuration clock
309                - const: bus_master # Master AXI clock
310                - const: bus_slave # Slave AXI clock
311        - properties:
312            clock-names:
313              items:
314                - const: pipe # Pipe Clock driving internal logic
315                - const: bus_master # Master AXI clock
316                - const: bus_slave # Slave AXI clock
317                - const: cfg # Configuration clock
318                - const: aux # Auxiliary (AUX) clock
319      properties:
320        clocks:
321          minItems: 5
322          maxItems: 5
323        resets: false
324        reset-names: false
325
326  - if:
327      properties:
328        compatible:
329          contains:
330            enum:
331              - qcom,pcie-ipq8074
332    then:
333      properties:
334        clocks:
335          minItems: 5
336          maxItems: 5
337        clock-names:
338          items:
339            - const: iface # PCIe to SysNOC BIU clock
340            - const: axi_m # AXI Master clock
341            - const: axi_s # AXI Slave clock
342            - const: ahb # AHB clock
343            - const: aux # Auxiliary clock
344        resets:
345          minItems: 7
346          maxItems: 7
347        reset-names:
348          items:
349            - const: pipe # PIPE reset
350            - const: sleep # Sleep reset
351            - const: sticky # Core Sticky reset
352            - const: axi_m # AXI Master reset
353            - const: axi_s # AXI Slave reset
354            - const: ahb # AHB Reset
355            - const: axi_m_sticky # AXI Master Sticky reset
356
357  - if:
358      properties:
359        compatible:
360          contains:
361            enum:
362              - qcom,pcie-ipq6018
363    then:
364      properties:
365        clocks:
366          minItems: 5
367          maxItems: 5
368        clock-names:
369          items:
370            - const: iface # PCIe to SysNOC BIU clock
371            - const: axi_m # AXI Master clock
372            - const: axi_s # AXI Slave clock
373            - const: axi_bridge # AXI bridge clock
374            - const: rchng
375        resets:
376          minItems: 8
377          maxItems: 8
378        reset-names:
379          items:
380            - const: pipe # PIPE reset
381            - const: sleep # Sleep reset
382            - const: sticky # Core Sticky reset
383            - const: axi_m # AXI Master reset
384            - const: axi_s # AXI Slave reset
385            - const: ahb # AHB Reset
386            - const: axi_m_sticky # AXI Master Sticky reset
387            - const: axi_s_sticky # AXI Slave Sticky reset
388
389  - if:
390      properties:
391        compatible:
392          contains:
393            enum:
394              - qcom,pcie-qcs404
395    then:
396      properties:
397        clocks:
398          minItems: 4
399          maxItems: 4
400        clock-names:
401          items:
402            - const: iface # AHB clock
403            - const: aux # Auxiliary clock
404            - const: master_bus # AXI Master clock
405            - const: slave_bus # AXI Slave clock
406        resets:
407          minItems: 6
408          maxItems: 6
409        reset-names:
410          items:
411            - const: axi_m # AXI Master reset
412            - const: axi_s # AXI Slave reset
413            - const: axi_m_sticky # AXI Master Sticky reset
414            - const: pipe_sticky # PIPE sticky reset
415            - const: pwr # PWR reset
416            - const: ahb # AHB reset
417
418  - if:
419      properties:
420        compatible:
421          contains:
422            enum:
423              - qcom,pcie-sc7280
424    then:
425      properties:
426        clocks:
427          minItems: 13
428          maxItems: 13
429        clock-names:
430          items:
431            - const: pipe # PIPE clock
432            - const: pipe_mux # PIPE MUX
433            - const: phy_pipe # PIPE output clock
434            - const: ref # REFERENCE clock
435            - const: aux # Auxiliary clock
436            - const: cfg # Configuration clock
437            - const: bus_master # Master AXI clock
438            - const: bus_slave # Slave AXI clock
439            - const: slave_q2a # Slave Q2A clock
440            - const: tbu # PCIe TBU clock
441            - const: ddrss_sf_tbu # PCIe SF TBU clock
442            - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock
443            - const: aggre1 # Aggre NoC PCIe1 AXI clock
444        resets:
445          maxItems: 1
446        reset-names:
447          items:
448            - const: pci # PCIe core reset
449
450  - if:
451      properties:
452        compatible:
453          contains:
454            enum:
455              - qcom,pcie-sdm845
456    then:
457      oneOf:
458          # Unfortunately the "optional" ref clock is used in the middle of the list
459        - properties:
460            clocks:
461              minItems: 8
462              maxItems: 8
463            clock-names:
464              items:
465                - const: pipe # PIPE clock
466                - const: aux # Auxiliary clock
467                - const: cfg # Configuration clock
468                - const: bus_master # Master AXI clock
469                - const: bus_slave # Slave AXI clock
470                - const: slave_q2a # Slave Q2A clock
471                - const: ref # REFERENCE clock
472                - const: tbu # PCIe TBU clock
473        - properties:
474            clocks:
475              minItems: 7
476              maxItems: 7
477            clock-names:
478              items:
479                - const: pipe # PIPE clock
480                - const: aux # Auxiliary clock
481                - const: cfg # Configuration clock
482                - const: bus_master # Master AXI clock
483                - const: bus_slave # Slave AXI clock
484                - const: slave_q2a # Slave Q2A clock
485                - const: tbu # PCIe TBU clock
486      properties:
487        resets:
488          maxItems: 1
489        reset-names:
490          items:
491            - const: pci # PCIe core reset
492
493  - if:
494      properties:
495        compatible:
496          contains:
497            enum:
498              - qcom,pcie-sc8180x
499              - qcom,pcie-sm8150
500              - qcom,pcie-sm8250
501    then:
502      oneOf:
503          # Unfortunately the "optional" ref clock is used in the middle of the list
504        - properties:
505            clocks:
506              minItems: 9
507              maxItems: 9
508            clock-names:
509              items:
510                - const: pipe # PIPE clock
511                - const: aux # Auxiliary clock
512                - const: cfg # Configuration clock
513                - const: bus_master # Master AXI clock
514                - const: bus_slave # Slave AXI clock
515                - const: slave_q2a # Slave Q2A clock
516                - const: ref # REFERENCE clock
517                - const: tbu # PCIe TBU clock
518                - const: ddrss_sf_tbu # PCIe SF TBU clock
519        - properties:
520            clocks:
521              minItems: 8
522              maxItems: 8
523            clock-names:
524              items:
525                - const: pipe # PIPE clock
526                - const: aux # Auxiliary clock
527                - const: cfg # Configuration clock
528                - const: bus_master # Master AXI clock
529                - const: bus_slave # Slave AXI clock
530                - const: slave_q2a # Slave Q2A clock
531                - const: tbu # PCIe TBU clock
532                - const: ddrss_sf_tbu # PCIe SF TBU clock
533      properties:
534        resets:
535          maxItems: 1
536        reset-names:
537          items:
538            - const: pci # PCIe core reset
539
540  - if:
541      properties:
542        compatible:
543          contains:
544            enum:
545              - qcom,pcie-sm8450-pcie0
546    then:
547      properties:
548        clocks:
549          minItems: 12
550          maxItems: 12
551        clock-names:
552          items:
553            - const: pipe # PIPE clock
554            - const: pipe_mux # PIPE MUX
555            - const: phy_pipe # PIPE output clock
556            - const: ref # REFERENCE clock
557            - const: aux # Auxiliary clock
558            - const: cfg # Configuration clock
559            - const: bus_master # Master AXI clock
560            - const: bus_slave # Slave AXI clock
561            - const: slave_q2a # Slave Q2A clock
562            - const: ddrss_sf_tbu # PCIe SF TBU clock
563            - const: aggre0 # Aggre NoC PCIe0 AXI clock
564            - const: aggre1 # Aggre NoC PCIe1 AXI clock
565        resets:
566          maxItems: 1
567        reset-names:
568          items:
569            - const: pci # PCIe core reset
570
571  - if:
572      properties:
573        compatible:
574          contains:
575            enum:
576              - qcom,pcie-sm8450-pcie1
577    then:
578      properties:
579        clocks:
580          minItems: 11
581          maxItems: 11
582        clock-names:
583          items:
584            - const: pipe # PIPE clock
585            - const: pipe_mux # PIPE MUX
586            - const: phy_pipe # PIPE output clock
587            - const: ref # REFERENCE clock
588            - const: aux # Auxiliary clock
589            - const: cfg # Configuration clock
590            - const: bus_master # Master AXI clock
591            - const: bus_slave # Slave AXI clock
592            - const: slave_q2a # Slave Q2A clock
593            - const: ddrss_sf_tbu # PCIe SF TBU clock
594            - const: aggre1 # Aggre NoC PCIe1 AXI clock
595        resets:
596          maxItems: 1
597        reset-names:
598          items:
599            - const: pci # PCIe core reset
600
601  - if:
602      not:
603        properties:
604          compatible:
605            contains:
606              enum:
607                - qcom,pcie-apq8064
608                - qcom,pcie-ipq4019
609                - qcom,pcie-ipq8064
610                - qcom,pcie-ipq8064v2
611                - qcom,pcie-ipq8074
612                - qcom,pcie-qcs404
613    then:
614      required:
615        - power-domains
616
617  - if:
618      not:
619        properties:
620          compatible:
621            contains:
622              enum:
623                - qcom,pcie-msm8996
624    then:
625      required:
626        - resets
627        - reset-names
628
629    # Newer chipsets support either 1 or 8 MSI vectors
630    # On older chipsets it's always 1 MSI vector
631  - if:
632      properties:
633        compatible:
634          contains:
635            enum:
636              - qcom,pcie-msm8996
637              - qcom,pcie-sc7280
638              - qcom,pcie-sc8180x
639              - qcom,pcie-sdm845
640              - qcom,pcie-sm8150
641              - qcom,pcie-sm8250
642              - qcom,pcie-sm8450-pcie0
643              - qcom,pcie-sm8450-pcie1
644    then:
645      oneOf:
646        - properties:
647            interrupts:
648              maxItems: 1
649            interrupt-names:
650              items:
651                - const: msi
652        - properties:
653            interrupts:
654              minItems: 8
655            interrupt-names:
656              items:
657                - const: msi0
658                - const: msi1
659                - const: msi2
660                - const: msi3
661                - const: msi4
662                - const: msi5
663                - const: msi6
664                - const: msi7
665    else:
666      properties:
667        interrupts:
668          maxItems: 1
669        interrupt-names:
670          items:
671            - const: msi
672
673unevaluatedProperties: false
674
675examples:
676  - |
677    #include <dt-bindings/interrupt-controller/arm-gic.h>
678    pcie@1b500000 {
679      compatible = "qcom,pcie-ipq8064";
680      reg = <0x1b500000 0x1000>,
681            <0x1b502000 0x80>,
682            <0x1b600000 0x100>,
683            <0x0ff00000 0x100000>;
684      reg-names = "dbi", "elbi", "parf", "config";
685      device_type = "pci";
686      linux,pci-domain = <0>;
687      bus-range = <0x00 0xff>;
688      num-lanes = <1>;
689      #address-cells = <3>;
690      #size-cells = <2>;
691      ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>,
692               <0x82000000 0 0 0x08000000 0 0x07e00000>;
693      interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
694      interrupt-names = "msi";
695      #interrupt-cells = <1>;
696      interrupt-map-mask = <0 0 0 0x7>;
697      interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
698                      <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>,
699                      <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>,
700                      <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>;
701      clocks = <&gcc 41>,
702               <&gcc 43>,
703               <&gcc 44>,
704               <&gcc 42>,
705               <&gcc 248>;
706      clock-names = "core", "iface", "phy", "aux", "ref";
707      resets = <&gcc 27>,
708               <&gcc 26>,
709               <&gcc 25>,
710               <&gcc 24>,
711               <&gcc 23>,
712               <&gcc 22>;
713      reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
714      pinctrl-0 = <&pcie_pins_default>;
715      pinctrl-names = "default";
716      vdda-supply = <&pm8921_s3>;
717      vdda_phy-supply = <&pm8921_lvs6>;
718      vdda_refclk-supply = <&ext_3p3v>;
719    };
720  - |
721    #include <dt-bindings/interrupt-controller/arm-gic.h>
722    #include <dt-bindings/gpio/gpio.h>
723    pcie@fc520000 {
724      compatible = "qcom,pcie-apq8084";
725      reg = <0xfc520000 0x2000>,
726            <0xff000000 0x1000>,
727            <0xff001000 0x1000>,
728            <0xff002000 0x2000>;
729      reg-names = "parf", "dbi", "elbi", "config";
730      device_type = "pci";
731      linux,pci-domain = <0>;
732      bus-range = <0x00 0xff>;
733      num-lanes = <1>;
734      #address-cells = <3>;
735      #size-cells = <2>;
736      ranges = <0x81000000 0 0          0xff200000 0 0x00100000>,
737               <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>;
738      interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
739      interrupt-names = "msi";
740      #interrupt-cells = <1>;
741      interrupt-map-mask = <0 0 0 0x7>;
742      interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>,
743                      <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>,
744                      <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>,
745                      <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>;
746      clocks = <&gcc 324>,
747               <&gcc 325>,
748               <&gcc 327>,
749               <&gcc 323>;
750      clock-names = "iface", "master_bus", "slave_bus", "aux";
751      resets = <&gcc 81>;
752      reset-names = "core";
753      power-domains = <&gcc 1>;
754      vdda-supply = <&pma8084_l3>;
755      phys = <&pciephy0>;
756      phy-names = "pciephy";
757      perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>;
758      pinctrl-0 = <&pcie0_pins_default>;
759      pinctrl-names = "default";
760    };
761...
762