1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PCI express root complex 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Stanimir Varbanov <svarbanov@mm-sol.com> 12 13description: | 14 Qualcomm PCIe root complex controller is based on the Synopsys DesignWare 15 PCIe IP. 16 17properties: 18 compatible: 19 enum: 20 - qcom,pcie-ipq8064 21 - qcom,pcie-ipq8064-v2 22 - qcom,pcie-apq8064 23 - qcom,pcie-apq8084 24 - qcom,pcie-msm8996 25 - qcom,pcie-ipq4019 26 - qcom,pcie-ipq8074 27 - qcom,pcie-qcs404 28 - qcom,pcie-sa8540p 29 - qcom,pcie-sc7280 30 - qcom,pcie-sc8180x 31 - qcom,pcie-sc8280xp 32 - qcom,pcie-sdm845 33 - qcom,pcie-sm8150 34 - qcom,pcie-sm8250 35 - qcom,pcie-sm8450-pcie0 36 - qcom,pcie-sm8450-pcie1 37 - qcom,pcie-ipq6018 38 39 reg: 40 minItems: 4 41 maxItems: 5 42 43 reg-names: 44 minItems: 4 45 maxItems: 5 46 47 interrupts: 48 minItems: 1 49 maxItems: 8 50 51 interrupt-names: 52 minItems: 1 53 maxItems: 8 54 55 # Common definitions for clocks, clock-names and reset. 56 # Platform constraints are described later. 57 clocks: 58 minItems: 3 59 maxItems: 13 60 61 clock-names: 62 minItems: 3 63 maxItems: 13 64 65 interconnects: 66 maxItems: 2 67 68 interconnect-names: 69 items: 70 - const: pcie-mem 71 - const: cpu-pcie 72 73 resets: 74 minItems: 1 75 maxItems: 12 76 77 resets-names: 78 minItems: 1 79 maxItems: 12 80 81 vdda-supply: 82 description: A phandle to the core analog power supply 83 84 vdda_phy-supply: 85 description: A phandle to the core analog power supply for PHY 86 87 vdda_refclk-supply: 88 description: A phandle to the core analog power supply for IC which generates reference clock 89 90 vddpe-3v3-supply: 91 description: A phandle to the PCIe endpoint power supply 92 93 phys: 94 maxItems: 1 95 96 phy-names: 97 items: 98 - const: pciephy 99 100 power-domains: 101 maxItems: 1 102 103 perst-gpios: 104 description: GPIO controlled connection to PERST# signal 105 maxItems: 1 106 107 wake-gpios: 108 description: GPIO controlled connection to WAKE# signal 109 maxItems: 1 110 111required: 112 - compatible 113 - reg 114 - reg-names 115 - interrupts 116 - interrupt-names 117 - "#interrupt-cells" 118 - interrupt-map-mask 119 - interrupt-map 120 - clocks 121 - clock-names 122 123allOf: 124 - $ref: /schemas/pci/pci-bus.yaml# 125 - if: 126 properties: 127 compatible: 128 contains: 129 enum: 130 - qcom,pcie-apq8064 131 - qcom,pcie-ipq4019 132 - qcom,pcie-ipq8064 133 - qcom,pcie-ipq8064v2 134 - qcom,pcie-ipq8074 135 - qcom,pcie-qcs404 136 then: 137 properties: 138 reg: 139 minItems: 4 140 maxItems: 4 141 reg-names: 142 items: 143 - const: dbi # DesignWare PCIe registers 144 - const: elbi # External local bus interface registers 145 - const: parf # Qualcomm specific registers 146 - const: config # PCIe configuration space 147 148 - if: 149 properties: 150 compatible: 151 contains: 152 enum: 153 - qcom,pcie-ipq6018 154 then: 155 properties: 156 reg: 157 minItems: 5 158 maxItems: 5 159 reg-names: 160 items: 161 - const: dbi # DesignWare PCIe registers 162 - const: elbi # External local bus interface registers 163 - const: atu # ATU address space 164 - const: parf # Qualcomm specific registers 165 - const: config # PCIe configuration space 166 167 - if: 168 properties: 169 compatible: 170 contains: 171 enum: 172 - qcom,pcie-apq8084 173 - qcom,pcie-msm8996 174 - qcom,pcie-sdm845 175 then: 176 properties: 177 reg: 178 minItems: 4 179 maxItems: 4 180 reg-names: 181 items: 182 - const: parf # Qualcomm specific registers 183 - const: dbi # DesignWare PCIe registers 184 - const: elbi # External local bus interface registers 185 - const: config # PCIe configuration space 186 187 - if: 188 properties: 189 compatible: 190 contains: 191 enum: 192 - qcom,pcie-sc7280 193 - qcom,pcie-sc8180x 194 - qcom,pcie-sc8280xp 195 - qcom,pcie-sm8250 196 - qcom,pcie-sm8450-pcie0 197 - qcom,pcie-sm8450-pcie1 198 then: 199 properties: 200 reg: 201 minItems: 5 202 maxItems: 5 203 reg-names: 204 items: 205 - const: parf # Qualcomm specific registers 206 - const: dbi # DesignWare PCIe registers 207 - const: elbi # External local bus interface registers 208 - const: atu # ATU address space 209 - const: config # PCIe configuration space 210 211 - if: 212 properties: 213 compatible: 214 contains: 215 enum: 216 - qcom,pcie-apq8064 217 - qcom,pcie-ipq8064 218 - qcom,pcie-ipq8064v2 219 then: 220 properties: 221 clocks: 222 minItems: 3 223 maxItems: 5 224 clock-names: 225 minItems: 3 226 items: 227 - const: core # Clocks the pcie hw block 228 - const: iface # Configuration AHB clock 229 - const: phy # Clocks the pcie PHY block 230 - const: aux # Clocks the pcie AUX block, not on apq8064 231 - const: ref # Clocks the pcie ref block, not on apq8064 232 resets: 233 minItems: 5 234 maxItems: 6 235 reset-names: 236 minItems: 5 237 items: 238 - const: axi # AXI reset 239 - const: ahb # AHB reset 240 - const: por # POR reset 241 - const: pci # PCI reset 242 - const: phy # PHY reset 243 - const: ext # EXT reset, not on apq8064 244 required: 245 - vdda-supply 246 - vdda_phy-supply 247 - vdda_refclk-supply 248 249 - if: 250 properties: 251 compatible: 252 contains: 253 enum: 254 - qcom,pcie-apq8084 255 then: 256 properties: 257 clocks: 258 minItems: 4 259 maxItems: 4 260 clock-names: 261 items: 262 - const: iface # Configuration AHB clock 263 - const: master_bus # Master AXI clock 264 - const: slave_bus # Slave AXI clock 265 - const: aux # Auxiliary (AUX) clock 266 resets: 267 maxItems: 1 268 reset-names: 269 items: 270 - const: core # Core reset 271 272 - if: 273 properties: 274 compatible: 275 contains: 276 enum: 277 - qcom,pcie-ipq4019 278 then: 279 properties: 280 clocks: 281 minItems: 3 282 maxItems: 3 283 clock-names: 284 items: 285 - const: aux # Auxiliary (AUX) clock 286 - const: master_bus # Master AXI clock 287 - const: slave_bus # Slave AXI clock 288 resets: 289 minItems: 12 290 maxItems: 12 291 reset-names: 292 items: 293 - const: axi_m # AXI master reset 294 - const: axi_s # AXI slave reset 295 - const: pipe # PIPE reset 296 - const: axi_m_vmid # VMID reset 297 - const: axi_s_xpu # XPU reset 298 - const: parf # PARF reset 299 - const: phy # PHY reset 300 - const: axi_m_sticky # AXI sticky reset 301 - const: pipe_sticky # PIPE sticky reset 302 - const: pwr # PWR reset 303 - const: ahb # AHB reset 304 - const: phy_ahb # PHY AHB reset 305 306 - if: 307 properties: 308 compatible: 309 contains: 310 enum: 311 - qcom,pcie-msm8996 312 then: 313 oneOf: 314 - properties: 315 clock-names: 316 items: 317 - const: pipe # Pipe Clock driving internal logic 318 - const: aux # Auxiliary (AUX) clock 319 - const: cfg # Configuration clock 320 - const: bus_master # Master AXI clock 321 - const: bus_slave # Slave AXI clock 322 - properties: 323 clock-names: 324 items: 325 - const: pipe # Pipe Clock driving internal logic 326 - const: bus_master # Master AXI clock 327 - const: bus_slave # Slave AXI clock 328 - const: cfg # Configuration clock 329 - const: aux # Auxiliary (AUX) clock 330 properties: 331 clocks: 332 minItems: 5 333 maxItems: 5 334 resets: false 335 reset-names: false 336 337 - if: 338 properties: 339 compatible: 340 contains: 341 enum: 342 - qcom,pcie-ipq8074 343 then: 344 properties: 345 clocks: 346 minItems: 5 347 maxItems: 5 348 clock-names: 349 items: 350 - const: iface # PCIe to SysNOC BIU clock 351 - const: axi_m # AXI Master clock 352 - const: axi_s # AXI Slave clock 353 - const: ahb # AHB clock 354 - const: aux # Auxiliary clock 355 resets: 356 minItems: 7 357 maxItems: 7 358 reset-names: 359 items: 360 - const: pipe # PIPE reset 361 - const: sleep # Sleep reset 362 - const: sticky # Core Sticky reset 363 - const: axi_m # AXI Master reset 364 - const: axi_s # AXI Slave reset 365 - const: ahb # AHB Reset 366 - const: axi_m_sticky # AXI Master Sticky reset 367 368 - if: 369 properties: 370 compatible: 371 contains: 372 enum: 373 - qcom,pcie-ipq6018 374 then: 375 properties: 376 clocks: 377 minItems: 5 378 maxItems: 5 379 clock-names: 380 items: 381 - const: iface # PCIe to SysNOC BIU clock 382 - const: axi_m # AXI Master clock 383 - const: axi_s # AXI Slave clock 384 - const: axi_bridge # AXI bridge clock 385 - const: rchng 386 resets: 387 minItems: 8 388 maxItems: 8 389 reset-names: 390 items: 391 - const: pipe # PIPE reset 392 - const: sleep # Sleep reset 393 - const: sticky # Core Sticky reset 394 - const: axi_m # AXI Master reset 395 - const: axi_s # AXI Slave reset 396 - const: ahb # AHB Reset 397 - const: axi_m_sticky # AXI Master Sticky reset 398 - const: axi_s_sticky # AXI Slave Sticky reset 399 400 - if: 401 properties: 402 compatible: 403 contains: 404 enum: 405 - qcom,pcie-qcs404 406 then: 407 properties: 408 clocks: 409 minItems: 4 410 maxItems: 4 411 clock-names: 412 items: 413 - const: iface # AHB clock 414 - const: aux # Auxiliary clock 415 - const: master_bus # AXI Master clock 416 - const: slave_bus # AXI Slave clock 417 resets: 418 minItems: 6 419 maxItems: 6 420 reset-names: 421 items: 422 - const: axi_m # AXI Master reset 423 - const: axi_s # AXI Slave reset 424 - const: axi_m_sticky # AXI Master Sticky reset 425 - const: pipe_sticky # PIPE sticky reset 426 - const: pwr # PWR reset 427 - const: ahb # AHB reset 428 429 - if: 430 properties: 431 compatible: 432 contains: 433 enum: 434 - qcom,pcie-sc7280 435 then: 436 properties: 437 clocks: 438 minItems: 13 439 maxItems: 13 440 clock-names: 441 items: 442 - const: pipe # PIPE clock 443 - const: pipe_mux # PIPE MUX 444 - const: phy_pipe # PIPE output clock 445 - const: ref # REFERENCE clock 446 - const: aux # Auxiliary clock 447 - const: cfg # Configuration clock 448 - const: bus_master # Master AXI clock 449 - const: bus_slave # Slave AXI clock 450 - const: slave_q2a # Slave Q2A clock 451 - const: tbu # PCIe TBU clock 452 - const: ddrss_sf_tbu # PCIe SF TBU clock 453 - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock 454 - const: aggre1 # Aggre NoC PCIe1 AXI clock 455 resets: 456 maxItems: 1 457 reset-names: 458 items: 459 - const: pci # PCIe core reset 460 461 - if: 462 properties: 463 compatible: 464 contains: 465 enum: 466 - qcom,pcie-sdm845 467 then: 468 oneOf: 469 # Unfortunately the "optional" ref clock is used in the middle of the list 470 - properties: 471 clocks: 472 minItems: 8 473 maxItems: 8 474 clock-names: 475 items: 476 - const: pipe # PIPE clock 477 - const: aux # Auxiliary clock 478 - const: cfg # Configuration clock 479 - const: bus_master # Master AXI clock 480 - const: bus_slave # Slave AXI clock 481 - const: slave_q2a # Slave Q2A clock 482 - const: ref # REFERENCE clock 483 - const: tbu # PCIe TBU clock 484 - properties: 485 clocks: 486 minItems: 7 487 maxItems: 7 488 clock-names: 489 items: 490 - const: pipe # PIPE clock 491 - const: aux # Auxiliary clock 492 - const: cfg # Configuration clock 493 - const: bus_master # Master AXI clock 494 - const: bus_slave # Slave AXI clock 495 - const: slave_q2a # Slave Q2A clock 496 - const: tbu # PCIe TBU clock 497 properties: 498 resets: 499 maxItems: 1 500 reset-names: 501 items: 502 - const: pci # PCIe core reset 503 504 - if: 505 properties: 506 compatible: 507 contains: 508 enum: 509 - qcom,pcie-sc8180x 510 - qcom,pcie-sm8150 511 - qcom,pcie-sm8250 512 then: 513 oneOf: 514 # Unfortunately the "optional" ref clock is used in the middle of the list 515 - properties: 516 clocks: 517 minItems: 9 518 maxItems: 9 519 clock-names: 520 items: 521 - const: pipe # PIPE clock 522 - const: aux # Auxiliary clock 523 - const: cfg # Configuration clock 524 - const: bus_master # Master AXI clock 525 - const: bus_slave # Slave AXI clock 526 - const: slave_q2a # Slave Q2A clock 527 - const: ref # REFERENCE clock 528 - const: tbu # PCIe TBU clock 529 - const: ddrss_sf_tbu # PCIe SF TBU clock 530 - properties: 531 clocks: 532 minItems: 8 533 maxItems: 8 534 clock-names: 535 items: 536 - const: pipe # PIPE clock 537 - const: aux # Auxiliary clock 538 - const: cfg # Configuration clock 539 - const: bus_master # Master AXI clock 540 - const: bus_slave # Slave AXI clock 541 - const: slave_q2a # Slave Q2A clock 542 - const: tbu # PCIe TBU clock 543 - const: ddrss_sf_tbu # PCIe SF TBU clock 544 properties: 545 resets: 546 maxItems: 1 547 reset-names: 548 items: 549 - const: pci # PCIe core reset 550 551 - if: 552 properties: 553 compatible: 554 contains: 555 enum: 556 - qcom,pcie-sm8450-pcie0 557 then: 558 properties: 559 clocks: 560 minItems: 12 561 maxItems: 12 562 clock-names: 563 items: 564 - const: pipe # PIPE clock 565 - const: pipe_mux # PIPE MUX 566 - const: phy_pipe # PIPE output clock 567 - const: ref # REFERENCE clock 568 - const: aux # Auxiliary clock 569 - const: cfg # Configuration clock 570 - const: bus_master # Master AXI clock 571 - const: bus_slave # Slave AXI clock 572 - const: slave_q2a # Slave Q2A clock 573 - const: ddrss_sf_tbu # PCIe SF TBU clock 574 - const: aggre0 # Aggre NoC PCIe0 AXI clock 575 - const: aggre1 # Aggre NoC PCIe1 AXI clock 576 resets: 577 maxItems: 1 578 reset-names: 579 items: 580 - const: pci # PCIe core reset 581 582 - if: 583 properties: 584 compatible: 585 contains: 586 enum: 587 - qcom,pcie-sm8450-pcie1 588 then: 589 properties: 590 clocks: 591 minItems: 11 592 maxItems: 11 593 clock-names: 594 items: 595 - const: pipe # PIPE clock 596 - const: pipe_mux # PIPE MUX 597 - const: phy_pipe # PIPE output clock 598 - const: ref # REFERENCE clock 599 - const: aux # Auxiliary clock 600 - const: cfg # Configuration clock 601 - const: bus_master # Master AXI clock 602 - const: bus_slave # Slave AXI clock 603 - const: slave_q2a # Slave Q2A clock 604 - const: ddrss_sf_tbu # PCIe SF TBU clock 605 - const: aggre1 # Aggre NoC PCIe1 AXI clock 606 resets: 607 maxItems: 1 608 reset-names: 609 items: 610 - const: pci # PCIe core reset 611 612 - if: 613 properties: 614 compatible: 615 contains: 616 enum: 617 - qcom,pcie-sa8540p 618 - qcom,pcie-sc8280xp 619 then: 620 properties: 621 clocks: 622 minItems: 8 623 maxItems: 9 624 clock-names: 625 minItems: 8 626 items: 627 - const: aux # Auxiliary clock 628 - const: cfg # Configuration clock 629 - const: bus_master # Master AXI clock 630 - const: bus_slave # Slave AXI clock 631 - const: slave_q2a # Slave Q2A clock 632 - const: ddrss_sf_tbu # PCIe SF TBU clock 633 - const: noc_aggr_4 # NoC aggregate 4 clock 634 - const: noc_aggr_south_sf # NoC aggregate South SF clock 635 - const: cnoc_qx # Configuration NoC QX clock 636 resets: 637 maxItems: 1 638 reset-names: 639 items: 640 - const: pci # PCIe core reset 641 642 - if: 643 properties: 644 compatible: 645 contains: 646 enum: 647 - qcom,pcie-sa8540p 648 - qcom,pcie-sc8280xp 649 then: 650 required: 651 - interconnects 652 - interconnect-names 653 654 - if: 655 not: 656 properties: 657 compatible: 658 contains: 659 enum: 660 - qcom,pcie-apq8064 661 - qcom,pcie-ipq4019 662 - qcom,pcie-ipq8064 663 - qcom,pcie-ipq8064v2 664 - qcom,pcie-ipq8074 665 - qcom,pcie-qcs404 666 then: 667 required: 668 - power-domains 669 670 - if: 671 not: 672 properties: 673 compatible: 674 contains: 675 enum: 676 - qcom,pcie-msm8996 677 then: 678 required: 679 - resets 680 - reset-names 681 682 - if: 683 properties: 684 compatible: 685 contains: 686 enum: 687 - qcom,pcie-msm8996 688 - qcom,pcie-sc7280 689 - qcom,pcie-sc8180x 690 - qcom,pcie-sdm845 691 - qcom,pcie-sm8150 692 - qcom,pcie-sm8250 693 - qcom,pcie-sm8450-pcie0 694 - qcom,pcie-sm8450-pcie1 695 then: 696 oneOf: 697 - properties: 698 interrupts: 699 maxItems: 1 700 interrupt-names: 701 items: 702 - const: msi 703 - properties: 704 interrupts: 705 minItems: 8 706 interrupt-names: 707 items: 708 - const: msi0 709 - const: msi1 710 - const: msi2 711 - const: msi3 712 - const: msi4 713 - const: msi5 714 - const: msi6 715 - const: msi7 716 717 - if: 718 properties: 719 compatible: 720 contains: 721 enum: 722 - qcom,pcie-sc8280xp 723 then: 724 properties: 725 interrupts: 726 minItems: 4 727 maxItems: 4 728 interrupt-names: 729 items: 730 - const: msi0 731 - const: msi1 732 - const: msi2 733 - const: msi3 734 735 - if: 736 properties: 737 compatible: 738 contains: 739 enum: 740 - qcom,pcie-apq8064 741 - qcom,pcie-apq8084 742 - qcom,pcie-ipq4019 743 - qcom,pcie-ipq6018 744 - qcom,pcie-ipq8064 745 - qcom,pcie-ipq8064-v2 746 - qcom,pcie-ipq8074 747 - qcom,pcie-qcs404 748 - qcom,pcie-sa8540p 749 then: 750 properties: 751 interrupts: 752 maxItems: 1 753 interrupt-names: 754 items: 755 - const: msi 756 757unevaluatedProperties: false 758 759examples: 760 - | 761 #include <dt-bindings/interrupt-controller/arm-gic.h> 762 pcie@1b500000 { 763 compatible = "qcom,pcie-ipq8064"; 764 reg = <0x1b500000 0x1000>, 765 <0x1b502000 0x80>, 766 <0x1b600000 0x100>, 767 <0x0ff00000 0x100000>; 768 reg-names = "dbi", "elbi", "parf", "config"; 769 device_type = "pci"; 770 linux,pci-domain = <0>; 771 bus-range = <0x00 0xff>; 772 num-lanes = <1>; 773 #address-cells = <3>; 774 #size-cells = <2>; 775 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, 776 <0x82000000 0 0 0x08000000 0 0x07e00000>; 777 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 778 interrupt-names = "msi"; 779 #interrupt-cells = <1>; 780 interrupt-map-mask = <0 0 0 0x7>; 781 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, 782 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, 783 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, 784 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; 785 clocks = <&gcc 41>, 786 <&gcc 43>, 787 <&gcc 44>, 788 <&gcc 42>, 789 <&gcc 248>; 790 clock-names = "core", "iface", "phy", "aux", "ref"; 791 resets = <&gcc 27>, 792 <&gcc 26>, 793 <&gcc 25>, 794 <&gcc 24>, 795 <&gcc 23>, 796 <&gcc 22>; 797 reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; 798 pinctrl-0 = <&pcie_pins_default>; 799 pinctrl-names = "default"; 800 vdda-supply = <&pm8921_s3>; 801 vdda_phy-supply = <&pm8921_lvs6>; 802 vdda_refclk-supply = <&ext_3p3v>; 803 }; 804 - | 805 #include <dt-bindings/interrupt-controller/arm-gic.h> 806 #include <dt-bindings/gpio/gpio.h> 807 pcie@fc520000 { 808 compatible = "qcom,pcie-apq8084"; 809 reg = <0xfc520000 0x2000>, 810 <0xff000000 0x1000>, 811 <0xff001000 0x1000>, 812 <0xff002000 0x2000>; 813 reg-names = "parf", "dbi", "elbi", "config"; 814 device_type = "pci"; 815 linux,pci-domain = <0>; 816 bus-range = <0x00 0xff>; 817 num-lanes = <1>; 818 #address-cells = <3>; 819 #size-cells = <2>; 820 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, 821 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; 822 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 823 interrupt-names = "msi"; 824 #interrupt-cells = <1>; 825 interrupt-map-mask = <0 0 0 0x7>; 826 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, 827 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, 828 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, 829 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; 830 clocks = <&gcc 324>, 831 <&gcc 325>, 832 <&gcc 327>, 833 <&gcc 323>; 834 clock-names = "iface", "master_bus", "slave_bus", "aux"; 835 resets = <&gcc 81>; 836 reset-names = "core"; 837 power-domains = <&gcc 1>; 838 vdda-supply = <&pma8084_l3>; 839 phys = <&pciephy0>; 840 phy-names = "pciephy"; 841 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; 842 pinctrl-0 = <&pcie0_pins_default>; 843 pinctrl-names = "default"; 844 }; 845... 846