| /openbmc/qemu/hw/intc/ |
| H A D | riscv_imsic.c | 93 target_ulong wr_mask) in riscv_imsic_eidelivery_rmw() argument
101 wr_mask &= 0x1; in riscv_imsic_eidelivery_rmw()
102 imsic->eidelivery[page] = (old_val & ~wr_mask) | (new_val & wr_mask); in riscv_imsic_eidelivery_rmw()
111 target_ulong wr_mask) in riscv_imsic_eithreshold_rmw() argument
119 wr_mask &= IMSIC_MAX_ID; in riscv_imsic_eithreshold_rmw()
120 imsic->eithreshold[page] = (old_val & ~wr_mask) | (new_val & wr_mask); in riscv_imsic_eithreshold_rmw()
128 target_ulong wr_mask) in riscv_imsic_topei_rmw() argument
138 if (topei && wr_mask) { in riscv_imsic_topei_rmw()
153 target_ulong new_val, target_ulong wr_mask) in riscv_imsic_eix_rmw() argument
182 if (wr_mask & mask) { in riscv_imsic_eix_rmw()
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| /openbmc/qemu/target/riscv/ |
| H A D | csr.c | 1783 uint64_t new_val, uint64_t wr_mask) in rmw_mideleg64() argument
1785 uint64_t mask = wr_mask & delegable_ints; in rmw_mideleg64()
1802 target_ulong new_val, target_ulong wr_mask) in rmw_mideleg() argument
1807 ret = rmw_mideleg64(env, csrno, &rval, new_val, wr_mask); in rmw_mideleg()
1818 target_ulong wr_mask) in rmw_midelegh() argument
1824 ((uint64_t)new_val) << 32, ((uint64_t)wr_mask) << 32); in rmw_midelegh()
1834 uint64_t new_val, uint64_t wr_mask) in rmw_mie64() argument
1836 uint64_t mask = wr_mask & all_ints; in rmw_mie64()
1853 target_ulong new_val, target_ulong wr_mask) in rmw_mie() argument
1858 ret = rmw_mie64(env, csrno, &rval, new_val, wr_mask); in rmw_mie()
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| /openbmc/linux/arch/riscv/kvm/ |
| H A D | aia.c | 213 unsigned long wr_mask) in kvm_riscv_vcpu_aia_rmw_topei() argument
224 val, new_val, wr_mask); in kvm_riscv_vcpu_aia_rmw_topei()
334 unsigned long wr_mask) in aia_rmw_iprio() argument
357 if (wr_mask) { in aia_rmw_iprio()
358 new_val = (old_val & ~wr_mask) | (new_val & wr_mask); in aia_rmw_iprio()
371 unsigned long wr_mask) in kvm_riscv_vcpu_aia_rmw_ireg() argument
382 return aia_rmw_iprio(vcpu, isel, val, new_val, wr_mask); in kvm_riscv_vcpu_aia_rmw_ireg()
386 wr_mask); in kvm_riscv_vcpu_aia_rmw_ireg()
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| H A D | vcpu_insn.c | 213 unsigned long wr_mask);
257 ulong val = 0, wr_mask = 0, new_val = 0; in csr_insn() local
262 wr_mask = -1UL; in csr_insn()
266 wr_mask = rs1_val; in csr_insn()
270 wr_mask = rs1_val; in csr_insn()
274 wr_mask = -1UL; in csr_insn()
278 wr_mask = rs1_num; in csr_insn()
282 wr_mask = rs1_num; in csr_insn()
296 run->riscv_csr.write_mask = wr_mask; in csr_insn()
311 rc = cfn->func(vcpu, csr_num, &val, new_val, wr_mask); in csr_insn()
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| H A D | aia_imsic.c | 218 unsigned long wr_mask) in imsic_mrif_atomic_rmw() argument
229 : "r" (~wr_mask), "r" (new_val & wr_mask) in imsic_mrif_atomic_rmw()
311 unsigned long new_val, unsigned long wr_mask) in imsic_mrif_rmw() argument
320 new_val, wr_mask & 0x1); in imsic_mrif_rmw()
324 new_val, wr_mask & (IMSIC_MAX_ID - 1)); in imsic_mrif_rmw()
350 wr_mask &= ~BIT(0); in imsic_mrif_rmw()
352 old_val = imsic_mrif_atomic_rmw(mrif, ei, new_val, wr_mask); in imsic_mrif_rmw()
843 unsigned long wr_mask) in kvm_riscv_vcpu_aia_imsic_rmw() argument
858 if (topei && wr_mask) { in kvm_riscv_vcpu_aia_imsic_rmw()
869 val, new_val, wr_mask); in kvm_riscv_vcpu_aia_imsic_rmw()
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| H A D | vcpu_pmu.c | 280 unsigned long wr_mask) in kvm_riscv_vcpu_pmu_read_hpm() argument
302 if (wr_mask) in kvm_riscv_vcpu_pmu_read_hpm()
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| /openbmc/linux/drivers/thermal/intel/ |
| H A D | intel_quark_dts_thermal.c | 326 int wr_mask; in alloc_soc_dts() local
342 wr_mask = QRK_DTS_WR_MASK_CLR; in alloc_soc_dts()
345 wr_mask = QRK_DTS_WR_MASK_SET; in alloc_soc_dts()
374 wr_mask, in alloc_soc_dts()
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| /openbmc/linux/arch/riscv/include/asm/ |
| H A D | kvm_aia.h | 99 unsigned long wr_mask);
143 unsigned long wr_mask);
146 unsigned long wr_mask);
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| H A D | kvm_vcpu_pmu.h | 71 unsigned long wr_mask);
98 unsigned long wr_mask) in kvm_riscv_vcpu_pmu_read_legacy() argument
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| /openbmc/linux/drivers/dma/dw-edma/ |
| H A D | dw-edma-core.h | 93 u32 wr_mask; member
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| H A D | dw-edma-core.c | 762 irq->wr_mask |= BIT(chan->id); in dw_edma_channel_setup()
835 u32 wr_mask = 1; in dw_edma_irq_request() local
873 dw_edma_add_irq_mask(&wr_mask, *wr_alloc, dw->wr_ch_cnt); in dw_edma_irq_request()
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| H A D | dw-hdma-v0-core.c | 126 mask = dw_irq->wr_mask; in dw_hdma_v0_core_handle_int()
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| H A D | dw-edma-v0-core.c | 247 mask = dw_irq->wr_mask; in dw_edma_v0_core_handle_int()
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| /openbmc/linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-pci-defs.h | 2029 uint64_t wr_mask:8; member
2031 uint64_t wr_mask:8;
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| H A D | cvmx-npei-defs.h | 3904 uint64_t wr_mask:8; member
3906 uint64_t wr_mask:8;
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