/openbmc/qemu/target/arm/tcg/ |
H A D | gengvec.c | 38 void gen_gvec_sqdmulh_qc(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, in gen_gvec_sqdmulh_qc() argument 44 tcg_debug_assert(vece >= 1 && vece <= 2); in gen_gvec_sqdmulh_qc() 45 gen_gvec_fn3_qc(rd_ofs, rn_ofs, rm_ofs, opr_sz, max_sz, fns[vece - 1]); in gen_gvec_sqdmulh_qc() 48 void gen_gvec_sqrdmulh_qc(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, in gen_gvec_sqrdmulh_qc() argument 54 tcg_debug_assert(vece >= 1 && vece <= 2); in gen_gvec_sqrdmulh_qc() 55 gen_gvec_fn3_qc(rd_ofs, rn_ofs, rm_ofs, opr_sz, max_sz, fns[vece - 1]); in gen_gvec_sqrdmulh_qc() 58 void gen_gvec_sqrdmlah_qc(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, in gen_gvec_sqrdmlah_qc() argument 64 tcg_debug_assert(vece >= 1 && vece <= 2); in gen_gvec_sqrdmlah_qc() 65 gen_gvec_fn3_qc(rd_ofs, rn_ofs, rm_ofs, opr_sz, max_sz, fns[vece - 1]); in gen_gvec_sqrdmlah_qc() 68 void gen_gvec_sqrdmlsh_qc(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, in gen_gvec_sqrdmlsh_qc() argument [all …]
|
H A D | gengvec64.c | 31 static void gen_rax1_vec(unsigned vece, TCGv_vec d, TCGv_vec n, TCGv_vec m) in gen_rax1_vec() argument 33 tcg_gen_rotli_vec(vece, d, m, 1); in gen_rax1_vec() 34 tcg_gen_xor_vec(vece, d, d, n); in gen_rax1_vec() 37 void gen_gvec_rax1(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, in gen_gvec_rax1() argument 46 .vece = MO_64, in gen_gvec_rax1() 89 static void gen_xar_vec(unsigned vece, TCGv_vec d, TCGv_vec n, in gen_xar_vec() argument 92 tcg_gen_xor_vec(vece, d, n, m); in gen_xar_vec() 93 tcg_gen_rotri_vec(vece, d, d, sh); in gen_xar_vec() 96 void gen_gvec_xar(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, in gen_gvec_xar() argument 106 .vece = MO_8 }, in gen_gvec_xar() [all …]
|
H A D | translate.h | 437 void gen_gvec_ceq0(unsigned vece, uint32_t rd_ofs, uint32_t rm_ofs, 439 void gen_gvec_clt0(unsigned vece, uint32_t rd_ofs, uint32_t rm_ofs, 441 void gen_gvec_cgt0(unsigned vece, uint32_t rd_ofs, uint32_t rm_ofs, 443 void gen_gvec_cle0(unsigned vece, uint32_t rd_ofs, uint32_t rm_ofs, 445 void gen_gvec_cge0(unsigned vece, uint32_t rd_ofs, uint32_t rm_ofs, 448 void gen_gvec_mla(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, 450 void gen_gvec_mls(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, 453 void gen_gvec_cmtst(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, 455 void gen_gvec_sshl(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, 457 void gen_gvec_ushl(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, [all …]
|
H A D | translate-sve.c | 580 static void gen_bsl(unsigned vece, uint32_t d, uint32_t n, uint32_t m, in TRANS_FEAT() 584 tcg_gen_gvec_bitsel(vece, d, a, n, m, oprsz, maxsz); in TRANS_FEAT() 596 static void gen_bsl1n_vec(unsigned vece, TCGv_vec d, TCGv_vec n, in gen_bsl1n_vec() argument 600 tcg_gen_not_vec(vece, n, n); in gen_bsl1n_vec() 601 tcg_gen_bitsel_vec(vece, d, k, n, m); in gen_bsl1n_vec() 603 tcg_gen_andc_vec(vece, n, k, n); in gen_bsl1n_vec() 604 tcg_gen_andc_vec(vece, m, m, k); in gen_bsl1n_vec() 605 tcg_gen_or_vec(vece, d, n, m); in gen_bsl1n_vec() 609 static void gen_bsl1n(unsigned vece, uint32_t d, uint32_t n, uint32_t m, in gen_bsl1n() argument 616 .vece = MO_64, in gen_bsl1n() [all …]
|
H A D | translate-a64.h | 191 void gen_gvec_rax1(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, 193 void gen_gvec_xar(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, 196 void gen_gvec_eor3(unsigned vece, uint32_t d, uint32_t n, uint32_t m, 198 void gen_gvec_bcax(unsigned vece, uint32_t d, uint32_t n, uint32_t m, 204 void gen_gvec_suqadd_qc(unsigned vece, uint32_t rd_ofs, 211 void gen_gvec_usqadd_qc(unsigned vece, uint32_t rd_ofs,
|
H A D | translate-mve.c | 1517 static void gen_gvec_vmovi(unsigned vece, uint32_t dofs, uint32_t aofs, in gen_gvec_vmovi() argument 1520 tcg_gen_gvec_dup_imm(vece, dofs, oprsz, maxsz, c); in gen_gvec_vmovi() 1610 static void do_gvec_shri_s(unsigned vece, uint32_t dofs, uint32_t aofs, in do_gvec_shri_s() argument 1618 if (shift == (8 << vece)) { in do_gvec_shri_s() 1621 tcg_gen_gvec_sari(vece, dofs, aofs, shift, oprsz, maxsz); in do_gvec_shri_s() 1624 static void do_gvec_shri_u(unsigned vece, uint32_t dofs, uint32_t aofs, in do_gvec_shri_u() argument 1632 if (shift == (8 << vece)) { in do_gvec_shri_u() 1633 tcg_gen_gvec_dup_imm(vece, dofs, oprsz, maxsz, 0); in do_gvec_shri_u() 1635 tcg_gen_gvec_shri(vece, dofs, aofs, shift, oprsz, maxsz); in do_gvec_shri_u() 1729 static void do_gvec_vshllbs(unsigned vece, uint32_t dofs, uint32_t aofs, [all …]
|
H A D | translate-neon.c | 837 static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ in DO_3SAME() 841 tcg_gen_gvec_bitsel(vece, rd_ofs, O1, O2, O3, oprsz, maxsz); \ in DO_3SAME() 883 static void gen_##INSN##_3s(unsigned vece, uint32_t rd_ofs, \ 887 tcg_gen_gvec_cmp(COND, vece, rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz); \ 898 static void WRAPNAME(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, \ 978 static void WRAPNAME(unsigned vece, uint32_t rd_ofs, \ 1451 static void gen_VMOV_1r(unsigned vece, uint32_t dofs, uint32_t aofs, in gen_VMOV_1r() argument 3133 static void WRAPNAME(unsigned vece, uint32_t rd_ofs, \ 3142 static void WRAPNAME(unsigned vece, uint32_t rd_ofs, \ 3265 static void gen_VABS_F(unsigned vece, uint32_t rd_ofs, uint32_t rm_ofs, in gen_VABS_F() argument [all …]
|
/openbmc/qemu/tcg/ |
H A D | tcg-op-vec.c | 61 TCGType type, unsigned vece) in tcg_can_emit_vecop_list() argument 91 if (tcg_can_emit_vec_op(opc, type, vece)) { in tcg_can_emit_vecop_list() 102 if (tcg_can_emit_vec_op(INDEX_op_sub_vec, type, vece)) { in tcg_can_emit_vecop_list() 107 if (tcg_can_emit_vec_op(INDEX_op_sub_vec, type, vece) in tcg_can_emit_vecop_list() 108 && (tcg_can_emit_vec_op(INDEX_op_smax_vec, type, vece) > 0 in tcg_can_emit_vecop_list() 109 || tcg_can_emit_vec_op(INDEX_op_sari_vec, type, vece) > 0 in tcg_can_emit_vecop_list() 110 || tcg_can_emit_vec_op(INDEX_op_cmp_vec, type, vece))) { in tcg_can_emit_vecop_list() 115 if (tcg_can_emit_vec_op(INDEX_op_umin_vec, type, vece) || in tcg_can_emit_vecop_list() 116 tcg_can_emit_vec_op(INDEX_op_cmp_vec, type, vece)) { in tcg_can_emit_vecop_list() 121 if (tcg_can_emit_vec_op(INDEX_op_umax_vec, type, vece) || in tcg_can_emit_vecop_list() [all …]
|
H A D | tcg-op-gvec.c | 385 uint64_t (dup_const)(unsigned vece, uint64_t c) in uint64_t() 387 switch (vece) { in uint64_t() 402 void tcg_gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in) in tcg_gen_dup_i32() argument 404 switch (vece) { in tcg_gen_dup_i32() 420 void tcg_gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in) in tcg_gen_dup_i64() argument 422 switch (vece) { in tcg_gen_dup_i64() 448 static TCGType choose_vector_type(const TCGOpcode *list, unsigned vece, in choose_vector_type() argument 461 tcg_can_emit_vecop_list(list, TCG_TYPE_V256, vece) && in choose_vector_type() 464 tcg_can_emit_vecop_list(list, TCG_TYPE_V128, vece))) && in choose_vector_type() 467 tcg_can_emit_vecop_list(list, TCG_TYPE_V64, vece)))) { in choose_vector_type() [all …]
|
H A D | tcg.c | 135 static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, 137 static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece, 139 static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece, 142 unsigned vecl, unsigned vece, 146 static inline bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, in tcg_out_dup_vec() argument 151 static inline bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece, in tcg_out_dupm_vec() argument 156 static inline void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece, in tcg_out_dupi_vec() argument 162 unsigned vecl, unsigned vece, in tcg_out_vec_op() argument 177 TCGType type, TCGCond cond, int vece); 1901 TCGv_vec tcg_constant_vec(TCGType type, unsigned vece, int64_t val) in tcg_constant_vec() argument [all …]
|
H A D | tcg-internal.h | 105 void vec_gen_6(TCGOpcode opc, TCGType type, unsigned vece, TCGArg r,
|
/openbmc/qemu/include/tcg/ |
H A D | tcg-op-gvec-common.h | 97 uint8_t vece; member 118 uint8_t vece; member 139 uint8_t vece; member 160 uint8_t vece; member 181 uint8_t vece; member 204 uint8_t vece; member 225 uint8_t vece; member 249 void tcg_gen_gvec_mov(unsigned vece, uint32_t dofs, uint32_t aofs, 251 void tcg_gen_gvec_not(unsigned vece, uint32_t dofs, uint32_t aofs, 253 void tcg_gen_gvec_neg(unsigned vece, uint32_t dofs, uint32_t aofs, [all …]
|
H A D | tcg-op-common.h | 17 TCGv_vec tcg_constant_vec(TCGType type, unsigned vece, int64_t val); 18 TCGv_vec tcg_constant_vec_matching(TCGv_vec match, unsigned vece, int64_t val); 156 void tcg_gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in); 264 void tcg_gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in); 412 void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32); 413 void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64); 414 void tcg_gen_dup_mem_vec(unsigned vece, TCGv_vec, TCGv_ptr, tcg_target_long); 415 void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t); 416 void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); 417 void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b); [all …]
|
/openbmc/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_vec.c.inc | 506 static void gen_vaddwev_s(unsigned vece, TCGv_vec t, TCGv_vec a, TCGv_vec b) 510 int halfbits = 4 << vece; 516 tcg_gen_shli_vec(vece, t1, a, halfbits); 517 tcg_gen_sari_vec(vece, t1, t1, halfbits); 520 tcg_gen_shli_vec(vece, t2, b, halfbits); 521 tcg_gen_sari_vec(vece, t2, t2, halfbits); 523 tcg_gen_add_vec(vece, t, t1, t2); 548 static void do_vaddwev_s(unsigned vece, uint32_t vd_ofs, uint32_t vj_ofs, 559 .vece = MO_16 566 .vece = MO_32 [all …]
|
/openbmc/qemu/target/ppc/translate/ |
H A D | vmx-impl.c.inc | 201 #define GEN_VXFORM_V(name, vece, tcg_op, opc2, opc3) \ 209 tcg_op(vece, \ 680 static bool do_vector_gvec3_VX(DisasContext *ctx, arg_VX *a, int vece, 686 gen_gvec(vece, avr_full_offset(a->vrt), avr_full_offset(a->vra), 743 static TCGv_vec do_vrl_mask_vec(unsigned vece, TCGv_vec vrb) 748 ones = tcg_constant_vec_matching(vrb, vece, -1); 751 tcg_gen_dupi_vec(vece, t2, (8 << vece) - 1); 753 tcg_gen_shri_vec(vece, t0, vrb, 16); 754 tcg_gen_and_vec(vece, t0, t0, t2); 756 tcg_gen_shri_vec(vece, t1, vrb, 8); [all …]
|
H A D | vsx-impl.c.inc | 693 static void xv_msb_op1(unsigned vece, TCGv_vec t, TCGv_vec b, 696 uint64_t msb = (vece == MO_32) ? SGN_MASK_SP : SGN_MASK_DP; 697 tcg_gen_op_vec(vece, t, b, tcg_constant_vec_matching(t, vece, msb)); 700 static void do_xvabs_vec(unsigned vece, TCGv_vec t, TCGv_vec b) 702 xv_msb_op1(vece, t, b, tcg_gen_andc_vec); 705 static void do_xvnabs_vec(unsigned vece, TCGv_vec t, TCGv_vec b) 707 xv_msb_op1(vece, t, b, tcg_gen_or_vec); 710 static void do_xvneg_vec(unsigned vece, TCGv_vec t, TCGv_vec b) 712 xv_msb_op1(vece, t, b, tcg_gen_xor_vec); 715 static bool do_vsx_msb_op(DisasContext *ctx, arg_XX2 *a, unsigned vece, [all …]
|
/openbmc/qemu/tcg/i386/ |
H A D | tcg-target.c.inc | 195 TCGType type, TCGCond cond, int vece) 952 static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, 956 tcg_out_vex_modrm_type(s, avx2_dup_insn[vece], r, 0, a, type); 958 switch (vece) { 983 static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece, 988 tcg_out_vex_modrm_offset(s, avx2_dup_insn[vece] + vex_l, 991 switch (vece) { 1001 tcg_out_dup_vec(s, type, vece, r, r); 1006 tcg_out_dup_vec(s, type, vece, r, r); 1015 static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece, [all …]
|
/openbmc/qemu/tcg/aarch64/ |
H A D | tcg-target.c.inc | 289 TCGType type, TCGCond cond, int vece) 942 static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece, 949 if (vece == MO_8) { 976 if (vece == MO_16) { 995 } else if (vece == MO_32) { 1045 static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, 1049 tcg_out_insn(s, 3605, DUP, is_q, rd, rs, 1 << vece, 0); 1053 static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece, 1078 tcg_out_insn(s, 3303, LD1R, type == TCG_TYPE_V128, r, base, vece); 2515 unsigned vecl, unsigned vece, [all …]
|
/openbmc/qemu/tcg/arm/ |
H A D | tcg-target.c.inc | 505 TCGType type, TCGCond cond, int vece) 1302 static void tcg_out_vreg2(TCGContext *s, ARMInsn insn, int q, int vece, 1305 tcg_out32(s, insn | (vece << 18) | (q << 6) | 1309 static void tcg_out_vreg3(TCGContext *s, ARMInsn insn, int q, int vece, 1312 tcg_out32(s, insn | (vece << 20) | (q << 6) | 2444 static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, 2449 if (vece == MO_64) { 2456 int b = (vece == MO_8); 2457 int e = (vece == MO_16); 2461 int imm4 = 1 << vece; [all …]
|
/openbmc/qemu/tcg/loongarch64/ |
H A D | tcg-target.c.inc | 187 TCGType type, TCGCond cond, int vece) 210 int64_t vec_val = sextract64(val, 0, 8 << vece); 1690 static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, 1701 tcg_debug_assert(vece <= MO_64); 1702 tcg_out32(s, encode_vdj_insn(repl_insn[lasx][vece], rd, rs)); 1706 static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece, 1713 (offset & ((1 << vece) - 1)) != 0) { 1718 offset >>= vece; 1720 switch (vece) { 1755 static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece, [all …]
|
/openbmc/qemu/tcg/s390x/ |
H A D | tcg-target.c.inc | 555 TCGType type, TCGCond cond, int vece) 2768 static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, 2774 if (vece == MO_64) { 2784 tcg_out_insn(s, VRIc, VREP, dst, (8 >> vece) - 1, src, vece); 2788 static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece, 2791 tcg_out_vrx_mem(s, VRX_VLREP, dst, base, TCG_REG_NONE, offset, vece); 2795 static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece, 2801 if (vece <= MO_16 || 2802 (vece == MO_32 ? (int32_t)val : val) == (int16_t)val) { 2803 tcg_out_insn(s, VRIa, VREPI, dst, val, vece); [all …]
|
/openbmc/qemu/tcg/ppc/ |
H A D | tcg-target.c.inc | 291 TCGType type, TCGCond cond, int vece) 1269 static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece, 1276 switch (vece) { 3542 int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece) 3566 return vece <= MO_32 || have_isa_2_07; 3571 return vece <= MO_32; 3576 return vece <= MO_32 || have_isa_2_07 ? -1 : 0; 3579 return vece <= MO_32 || have_isa_2_07 ? 1 : 0; 3581 return vece >= MO_32 && have_isa_3_00; 3583 switch (vece) { [all …]
|
/openbmc/qemu/tcg/riscv/ |
H A D | tcg-target.c.inc | 382 TCGType type, TCGCond cond, int vece) 392 val >>= (-8 << vece) & 63; 1150 static bool tcg_out_dup_vec(TCGContext *s, TCGType type, unsigned vece, 1153 set_vtype_len_sew(s, type, vece); 1158 static bool tcg_out_dupm_vec(TCGContext *s, TCGType type, unsigned vece, 1162 return tcg_out_dup_vec(s, type, vece, dst, TCG_REG_TMP0); 1165 static void tcg_out_dupi_vec(TCGContext *s, TCGType type, unsigned vece, 1169 arg >>= (-8 << vece) & 63; 1175 set_vtype_len_sew(s, type, vece); 1181 tcg_out_dup_vec(s, type, vece, dst, TCG_REG_TMP0); [all …]
|
/openbmc/qemu/target/sparc/ |
H A D | translate.c | 937 static void gen_vec_fchksm16(unsigned vece, TCGv_vec dst, in gen_vec_fchksm16() argument 943 tcg_gen_add_vec(vece, a, src1, src2); in gen_vec_fchksm16() 944 tcg_gen_cmp_vec(TCG_COND_LTU, vece, c, a, src1); in gen_vec_fchksm16() 946 tcg_gen_sub_vec(vece, dst, a, c); in gen_vec_fchksm16() 949 static void gen_op_fchksm16(unsigned vece, uint32_t dofs, uint32_t aofs, in gen_op_fchksm16() argument 959 .vece = MO_16, in gen_op_fchksm16() 964 static void gen_vec_fmean16(unsigned vece, TCGv_vec dst, in gen_vec_fmean16() argument 969 tcg_gen_or_vec(vece, t, src1, src2); in gen_vec_fmean16() 970 tcg_gen_and_vec(vece, t, t, tcg_constant_vec_matching(dst, vece, 1)); in gen_vec_fmean16() 971 tcg_gen_sari_vec(vece, src1, src1, 1); in gen_vec_fmean16() [all …]
|
/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_rvv.c.inc | 1332 static void gen_rsub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b) 1334 tcg_gen_sub_vec(vece, r, b, a); 1337 static void tcg_gen_gvec_rsubs(unsigned vece, uint32_t dofs, uint32_t aofs, 1346 .vece = MO_8 }, 1351 .vece = MO_16 }, 1356 .vece = MO_32 }, 1362 .vece = MO_64 }, 1365 tcg_debug_assert(vece <= MO_64); 1366 tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, c, &rsub_op[vece]); 1459 static void tcg_gen_gvec_rsubi(unsigned vece, uint32_t dofs, uint32_t aofs, [all …]
|