Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0 |
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4977ce19 |
| 01-May-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-tcg-20240501' of https://gitlab.com/rth7680/qemu into staging
plugins: Rewrite plugin tcg expansion
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Merge tag 'pull-tcg-20240501' of https://gitlab.com/rth7680/qemu into staging
plugins: Rewrite plugin tcg expansion
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* tag 'pull-tcg-20240501' of https://gitlab.com/rth7680/qemu: plugins: Update the documentation block for plugin-gen.c plugins: Inline plugin_gen_empty_callback plugins: Merge qemu_plugin_tb_insn_get to plugin-gen.c plugins: Split out common cb expanders plugins: Replace pr_ops with a proper debug dump flag plugins: Introduce PLUGIN_CB_MEM_REGULAR plugins: Simplify callback queues tcg: Remove INDEX_op_plugin_cb_{start,end} tcg: Remove TCG_CALL_PLUGIN plugins: Remove plugin helpers plugins: Use emit_before_op for PLUGIN_GEN_FROM_MEM plugins: Use emit_before_op for PLUGIN_GEN_FROM_INSN plugins: Add PLUGIN_GEN_AFTER_TB plugins: Use emit_before_op for PLUGIN_GEN_FROM_TB plugins: Use emit_before_op for PLUGIN_GEN_AFTER_INSN plugins: Create TCGHelperInfo for all out-of-line callbacks plugins: Move function pointer in qemu_plugin_dyn_cb plugins: Zero new qemu_plugin_dyn_cb entries tcg: Pass function pointer to tcg_gen_call* tcg: Make tcg/helper-info.h self-contained
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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36ab4306 |
| 14-Mar-2024 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Remove INDEX_op_plugin_cb_{start,end}
These opcodes are no longer used.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.o
tcg: Remove INDEX_op_plugin_cb_{start,end}
These opcodes are no longer used.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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8a2927f2 |
| 14-Mar-2024 |
Richard Henderson <richard.henderson@linaro.org> |
plugins: Use emit_before_op for PLUGIN_GEN_FROM_MEM
Introduce a new plugin_mem_cb op to hold the address temp and meminfo computed by tcg-op-ldst.c. Because this now has its own opcode, we no longe
plugins: Use emit_before_op for PLUGIN_GEN_FROM_MEM
Introduce a new plugin_mem_cb op to hold the address temp and meminfo computed by tcg-op-ldst.c. Because this now has its own opcode, we no longer need PLUGIN_GEN_FROM_MEM.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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a0948bb7 |
| 14-Mar-2024 |
Richard Henderson <richard.henderson@linaro.org> |
plugins: Use emit_before_op for PLUGIN_GEN_AFTER_INSN
Introduce a new plugin_cb op and migrate one operation. By using emit_before_op, we do not need to emit opcodes early and modify them later -- w
plugins: Use emit_before_op for PLUGIN_GEN_AFTER_INSN
Introduce a new plugin_cb op and migrate one operation. By using emit_before_op, we do not need to emit opcodes early and modify them later -- we can simply emit the final set of opcodes once.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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74949263 |
| 06-Nov-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-tcg-20231106' of https://gitlab.com/rth7680/qemu into staging
util: Add cpuinfo for loongarch64 tcg/loongarch64: Use cpuinfo.h tcg/loongarch64: Improve register allocation for INDEX_
Merge tag 'pull-tcg-20231106' of https://gitlab.com/rth7680/qemu into staging
util: Add cpuinfo for loongarch64 tcg/loongarch64: Use cpuinfo.h tcg/loongarch64: Improve register allocation for INDEX_op_qemu_ld_a*_i128 host/include/loongarch64: Add atomic16 load and store tcg: Move expanders out of line tcg/mips: Always implement movcond tcg/mips: Implement neg opcodes tcg/loongarch64: Implement neg opcodes tcg: Make movcond and neg required opcodes tcg: Optimize env memory operations tcg: Canonicalize sub of immediate to add tcg/sparc64: Implement tcg_out_extrl_i64_i32
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* tag 'pull-tcg-20231106' of https://gitlab.com/rth7680/qemu: (35 commits) tcg/sparc64: Implement tcg_out_extrl_i64_i32 tcg/optimize: Canonicalize sub2 with constants to add2 tcg/optimize: Canonicalize subi to addi during optimization tcg: Canonicalize subi to addi during opcode generation tcg/optimize: Split out arg_new_constant tcg: Eliminate duplicate env store operations tcg/optimize: Optimize env memory operations tcg/optimize: Split out cmp_better_copy tcg/optimize: Pipe OptContext into reset_ts tcg: Don't free vector results tcg: Remove TCG_TARGET_HAS_neg_{i32,i64} tcg/loongarch64: Implement neg opcodes tcg/mips: Implement neg opcodes tcg: Remove TCG_TARGET_HAS_movcond_{i32,i64} tcg/mips: Always implement movcond tcg/mips: Split out tcg_out_setcond_int tcg: Move tcg_temp_free_* out of line tcg: Move tcg_temp_new_*, tcg_global_mem_new_* out of line tcg: Move tcg_constant_* out of line tcg: Unexport tcg_gen_op*_{i32,i64} ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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4643f3e0 |
| 29-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move tcg_temp_new_*, tcg_global_mem_new_* out of line
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-11-richard.henderson@linaro.org>
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16edaee7 |
| 29-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move tcg_constant_* out of line
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-10-richard.henderson@linaro.org>
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17b9fadb |
| 29-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Unexport tcg_gen_op*_{i32,i64}
These functions are no longer used outside tcg-op.c. There are several that are completely unused, so remove them.
Signed-off-by: Richard Henderson <richard.hend
tcg: Unexport tcg_gen_op*_{i32,i64}
These functions are no longer used outside tcg-op.c. There are several that are completely unused, so remove them.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-9-richard.henderson@linaro.org>
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1d67bf54 |
| 29-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move tcg_gen_opN declarations to tcg-internal.h
These are used within tcg-op.c and tcg-op-ldst.c. There are no uses outside tcg/.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org
tcg: Move tcg_gen_opN declarations to tcg-internal.h
These are used within tcg-op.c and tcg-op-ldst.c. There are no uses outside tcg/.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-8-richard.henderson@linaro.org>
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27c758fd |
| 29-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move vec_gen_* declarations to tcg-internal.h
These are used within tcg-op-vec.c and tcg/host/tcg-target.c.inc. There are no uses outside tcg/.
Signed-off-by: Richard Henderson <richard.hender
tcg: Move vec_gen_* declarations to tcg-internal.h
These are used within tcg-op-vec.c and tcg/host/tcg-target.c.inc. There are no uses outside tcg/.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-7-richard.henderson@linaro.org>
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e0de2f55 |
| 29-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move 64-bit expanders out of line
This one is more complicated, combining 32-bit and 64-bit expansion with C if instead of preprocessor #if.
Signed-off-by: Richard Henderson <richard.henderson
tcg: Move 64-bit expanders out of line
This one is more complicated, combining 32-bit and 64-bit expansion with C if instead of preprocessor #if.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-6-richard.henderson@linaro.org>
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09607d35 |
| 29-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move 32-bit expanders out of line
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-5-richard.henderson@linaro.org>
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01bbb6e3 |
| 29-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move generic expanders out of line
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-4-richard.henderson@linaro.org>
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6fc75d50 |
| 29-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Move tcg_gen_op* out of line
In addition to moving out of line, with CONFIG_DEBUG_TCG mark them all noinline.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231
tcg: Move tcg_gen_op* out of line
In addition to moving out of line, with CONFIG_DEBUG_TCG mark them all noinline.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231029210848.78234-3-richard.henderson@linaro.org>
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a9526048 |
| 23-Oct-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu into staging
tcg: Drop unused tcg_temp_free define tcg: Introduce tcg_use_softmmu tcg: Optimize past conditional branches tcg: Use co
Merge tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu into staging
tcg: Drop unused tcg_temp_free define tcg: Introduce tcg_use_softmmu tcg: Optimize past conditional branches tcg: Use constant zero when expanding with divu2 tcg: Add negsetcondi tcg: Define MO_TL tcg: Export tcg_gen_ext_{i32,i64,tl} target/*: Use tcg_gen_ext_* tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB tcg/ppc: Use ADDPCIS for power9 tcg/ppc: Use prefixed instructions for power10 tcg/ppc: Disable TCG_REG_TB for Power9/Power10 tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB tcg/ppc: Use ADDPCIS for power9 tcg/ppc: Use prefixed instructions for power10 tcg/ppc: Disable TCG_REG_TB for Power9/Power10
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* tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu: (38 commits) target/xtensa: Use tcg_gen_sextract_i32 target/tricore: Use tcg_gen_*extract_tl target/rx: Use tcg_gen_ext_i32 target/m68k: Use tcg_gen_ext_i32 target/i386: Use tcg_gen_ext_tl target/arm: Use tcg_gen_ext_i64 tcg: Define MO_TL tcg: Export tcg_gen_ext_{i32,i64,tl} tcg: add negsetcondi target/i386: Use i128 for 128 and 256-bit loads and stores tcg: Add tcg_gen_{ld,st}_i128 tcg: Optimize past conditional branches tcg: Use constant zero when expanding with divu2 tcg: drop unused tcg_temp_free define tcg/s390x: Use tcg_use_softmmu tcg/riscv: Use tcg_use_softmmu tcg/riscv: Do not reserve TCG_GUEST_BASE_REG for guest_base zero tcg/ppc: Use tcg_use_softmmu tcg/mips: Use tcg_use_softmmu tcg/loongarch64: Use tcg_use_softmmu ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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f1c29532 |
| 19-Oct-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Export tcg_gen_ext_{i32,i64,tl}
The two concrete type functions already existed, merely needing a bit of hardening to invalid inputs.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Si
tcg: Export tcg_gen_ext_{i32,i64,tl}
The two concrete type functions already existed, merely needing a bit of hardening to invalid inputs.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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93c86ecd |
| 19-Oct-2023 |
Paolo Bonzini <pbonzini@redhat.com> |
tcg: add negsetcondi
This can be useful to write a shift bit extraction that does not depend on TARGET_LONG_BITS.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20231019104648.3899
tcg: add negsetcondi
This can be useful to write a shift bit extraction that does not depend on TARGET_LONG_BITS.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20231019104648.389942-15-pbonzini@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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a01d9792 |
| 24-Aug-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Add tcg_gen_{ld,st}_i128
Do not require the translators to jump through concat and extract of i64 in order to move values to and from env.
Tested-by: Song Gao <gaosong@loongson.cn> Reviewed-by
tcg: Add tcg_gen_{ld,st}_i128
Do not require the translators to jump through concat and extract of i64 in order to move values to and from env.
Tested-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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1527c6b6 |
| 09-Oct-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* util/log: re-allow switching away from stderr log file * finish audio configuration rework * cleanup HVF stubs * remove mor
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* util/log: re-allow switching away from stderr log file * finish audio configuration rework * cleanup HVF stubs * remove more mentions of softmmu
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (25 commits) audio, qtest: get rid of QEMU_AUDIO_DRV audio: reintroduce default audio backend for VNC audio: do not use first -audiodev as default audio device audio: extend -audio to allow creating a default backend audio: extract audio_define_default audio: disable default backends if -audio/-audiodev is used audio: error hints need a trailing \n cutils: squelch compiler warnings with custom paths configure: change $softmmu to $system system: Rename softmmu/ directory as system/ meson: Rename target_softmmu_arch -> target_system_arch meson: Rename softmmu_mods -> system_mods target/i386: Rename i386_softmmu_kvm_ss -> i386_kvm_ss semihosting: Rename softmmu_FOO_user() -> uaccess_FOO_user() gdbstub: Rename 'softmmu' -> 'system' accel: Rename accel_softmmu* -> accel_system* tcg: Correct invalid mentions of 'softmmu' by 'system-mode' fuzz: Correct invalid mentions of 'softmmu' by 'system' cpu: Correct invalid mentions of 'softmmu' by 'system-mode' travis-ci: Correct invalid mentions of 'softmmu' by 'system' ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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7893e42d |
| 04-Oct-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
tcg: Correct invalid mentions of 'softmmu' by 'system-mode'
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004090629.37473-6-philmd@linaro.org> Signed-off-by: Paolo Bonz
tcg: Correct invalid mentions of 'softmmu' by 'system-mode'
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231004090629.37473-6-philmd@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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f5fe7c17 |
| 28-Aug-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-tcg-20230823-2' of https://gitlab.com/rth7680/qemu into staging
accel/*: Widen pc/saved_insn for *_sw_breakpoint accel/tcg: Replace remaining target_ulong in system-mode accel tcg: s
Merge tag 'pull-tcg-20230823-2' of https://gitlab.com/rth7680/qemu into staging
accel/*: Widen pc/saved_insn for *_sw_breakpoint accel/tcg: Replace remaining target_ulong in system-mode accel tcg: spelling fixes tcg: Document bswap, hswap, wswap byte patterns tcg: Introduce negsetcond opcodes tcg: Fold deposit with zero to and tcg: Unify TCG_TARGET_HAS_extr[lh]_i64_i32 tcg/i386: Drop BYTEH deposits for 64-bit tcg/i386: Allow immediate as input to deposit target/*: Use tcg_gen_negsetcond_*
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* tag 'pull-tcg-20230823-2' of https://gitlab.com/rth7680/qemu: (48 commits) tcg: spelling fixes docs/devel/tcg-ops: fix missing newlines in "Host vector operations" target/cris: Fix a typo in gen_swapr() tcg/tcg-op: Document wswap_i64() byte pattern tcg/tcg-op: Document hswap_i32/64() byte pattern tcg/tcg-op: Document bswap64_i64() byte pattern tcg/tcg-op: Document bswap32_i64() byte pattern tcg/tcg-op: Document bswap32_i32() byte pattern tcg/tcg-op: Document bswap16_i64() byte pattern tcg/tcg-op: Document bswap16_i32() byte pattern tcg/i386: Implement negsetcond_* tcg/i386: Use shift in tcg_out_setcond tcg/i386: Clear dest first in tcg_out_setcond if possible tcg/i386: Use CMP+SBB in tcg_out_setcond tcg/i386: Merge tcg_out_movcond{32,64} tcg/i386: Merge tcg_out_setcond{32,64} tcg/i386: Merge tcg_out_brcond{32,64} tcg/sparc64: Implement negsetcond_* tcg/s390x: Implement negsetcond_* tcg/riscv: Implement negsetcond_* ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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3635502d |
| 04-Aug-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Introduce negsetcond opcodes
Introduce a new opcode for negative setcond.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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369081c4 |
| 05-Jun-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-tcg-20230605' of https://gitlab.com/rth7680/qemu into staging
Build tcg/ once for system and once for user. Unmap perf_marker. Remove left over _link_error() definitions.
# -----BEG
Merge tag 'pull-tcg-20230605' of https://gitlab.com/rth7680/qemu into staging
Build tcg/ once for system and once for user. Unmap perf_marker. Remove left over _link_error() definitions.
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* tag 'pull-tcg-20230605' of https://gitlab.com/rth7680/qemu: (52 commits) tcg/tcg-op-vec: Remove left over _link_error() definitions accel/tcg: Unmap perf_marker tcg: Build once for system and once for user-only exec/poison: Do not poison CONFIG_SOFTMMU plugins: Drop unused headers from exec/plugin-gen.h plugins: Move plugin_insn_append to translator.c tcg: Remove target-specific headers from tcg.[ch] tcg: Move env defines out of NEED_CPU_H in helper-head.h tcg: Fix PAGE/PROT confusion accel/tcg: Tidy includes for translator.[ch] target/arm: Add missing include of exec/exec-all.h target/*: Add missing includes of exec/translation-block.h target/mips: Tidy helpers for translation target/arm: Tidy helpers for translation accel/tcg: Move translator_fake_ldb out of line target/ppc: Inline gen_icount_io_start() accel/tcg: Introduce translator_io_start accel/tcg: Move most of gen-icount.h into translator.c include/exec: Remove CODE_GEN_AVG_BLOCK_SIZE tcg: Spit out exec/translation-block.h ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v8.0.0 |
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c213ee2d |
| 31-Mar-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split helper-proto.h
Create helper-proto-common.h without the target specific portion. Use that in tcg-op-common.h. Include helper-proto.h in target/arm and target/hexagon before helper-info.c
tcg: Split helper-proto.h
Create helper-proto-common.h without the target specific portion. Use that in tcg-op-common.h. Include helper-proto.h in target/arm and target/hexagon before helper-info.c.inc; all other targets are already correct in this regard.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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e4eff8e4 |
| 31-Mar-2023 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Split helper-gen.h
Create helper-gen-common.h without the target specific portion. Use that in tcg-op-common.h. Reorg headers in target/arm to ensure that helper-gen.h is included before helpe
tcg: Split helper-gen.h
Create helper-gen-common.h without the target specific portion. Use that in tcg-op-common.h. Reorg headers in target/arm to ensure that helper-gen.h is included before helper-info.c.inc. All other targets are already correct in this regard.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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