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Searched refs:tcg_gen_deposit_i32 (Results 1 – 18 of 18) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dtranslate-m-nocp.c390 tcg_gen_deposit_i32(control, control, sfpa, in gen_M_fp_sysreg_write()
413 tcg_gen_deposit_i32(vpr, vpr, tmp, in gen_M_fp_sysreg_write()
H A Dtranslate-mve.c1333 tcg_gen_deposit_i32(vpr, vpr, in gen_vpst()
1342 tcg_gen_deposit_i32(vpr, vpr, in gen_vpst()
H A Dgengvec.c693 tcg_gen_deposit_i32(d, d, a, 0, 32 - shift); in gen_shr32_ins_i32()
782 tcg_gen_deposit_i32(d, d, a, shift, 32 - shift); in gen_shl32_ins_i32()
H A Dtranslate.c5685 tcg_gen_deposit_i32(t_rd, t_rd, t_in, lsb, width); in trans_BFCI()
5824 tcg_gen_deposit_i32(tn, tn, tm, 0, 16); in DO_PAR_ADDSUB_GE()
5828 tcg_gen_deposit_i32(tn, tm, tn, 0, 16); in DO_PAR_ADDSUB_GE()
H A Dtranslate-vfp.c3393 tcg_gen_deposit_i32(rd, rd, rm, 16, 16); in trans_VINS()
H A Dtranslate-a64.c2205 tcg_gen_deposit_i32(nzcv, nzcv, tmp, 30, 1); in gen_get_nzcv()
2207 tcg_gen_deposit_i32(nzcv, nzcv, cpu_CF, 29, 1); in gen_get_nzcv()
2210 tcg_gen_deposit_i32(nzcv, nzcv, tmp, 28, 1); in gen_get_nzcv()
10330 tcg_gen_deposit_i32(tcg_lo, tcg_lo, tcg_hi, 16, 16); in handle_2misc_narrow()
/openbmc/qemu/include/tcg/
H A Dtcg-op.h364 #define tcg_gen_deposit_tl tcg_gen_deposit_i32
H A Dtcg-op-common.h112 void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
/openbmc/qemu/tcg/
H A Dtcg-op.c881 void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2, in tcg_gen_deposit_i32() function
1130 tcg_gen_deposit_i32(ret, t0, ah, 32 - ofs, ofs); in tcg_gen_extract2_i32()
1873 tcg_gen_deposit_i32(TCGV_LOW(ret), TCGV_LOW(ret), in tcg_gen_shifti_i64()
1888 tcg_gen_deposit_i32(TCGV_HIGH(ret), t0, in tcg_gen_shifti_i64()
2641 tcg_gen_deposit_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), in tcg_gen_deposit_i64()
2647 tcg_gen_deposit_i32(TCGV_LOW(ret), TCGV_LOW(arg1), in tcg_gen_deposit_i64()
H A Dtcg-op-gvec.c410 tcg_gen_deposit_i32(out, in, in, 16, 16); in tcg_gen_dup_i32()
1911 tcg_gen_deposit_i32(d, t1, t2, 0, 16); in tcg_gen_vec_add16_i32()
2094 tcg_gen_deposit_i32(d, t1, t2, 0, 16); in tcg_gen_vec_sub16_i32()
/openbmc/qemu/target/microblaze/
H A Dtranslate.c394 tcg_gen_deposit_i32(out, out, ina, imm_s, width); in gen_bsifi()
422 tcg_gen_deposit_i32(out, out, lt, 31, 1); in DO_TYPEA0_CFG()
431 tcg_gen_deposit_i32(out, out, lt, 31, 1); in gen_cmpu()
/openbmc/qemu/target/xtensa/
H A Dtranslate.c397 tcg_gen_deposit_i32(cpu_SR[PS], cpu_SR[PS], in gen_callw_slot()
1345 tcg_gen_deposit_i32(arg[0].out, arg[0].out, in translate_all()
1441 tcg_gen_deposit_i32(arg[0].out, arg[0].out, tmp1, arg[0].imm, 1); in translate_boolean()
1513 tcg_gen_deposit_i32(arg[0].out, c, arg[0].in, 16, 16); in translate_const16()
1529 tcg_gen_deposit_i32(arg[1].out, arg[1].in, arg[0].in, in translate_depbits()
1582 tcg_gen_deposit_i32(cpu_SR[ATOMCTL], cpu_SR[ATOMCTL], arg[0].in, 8, 1); in translate_getex()
2026 tcg_gen_deposit_i32(tmp, tmp, cpu_R[0], 0, 30); in translate_retw()
2222 tcg_gen_deposit_i32(cpu_SR[ATOMCTL], cpu_SR[ATOMCTL], res, 8, 1); in translate_s32ex()
/openbmc/qemu/target/m68k/
H A Dtranslate.c687 tcg_gen_deposit_i32(reg, reg, val, 0, 8); in gen_partset_reg()
690 tcg_gen_deposit_i32(reg, reg, val, 0, 16); in gen_partset_reg()
2076 tcg_gen_deposit_i32(reg, reg, dbuf, (i - 1) * 8, 8); in DISAS_INSN()
3562 tcg_gen_deposit_i32(reg, reg, reg, 16, 16); in rotate()
4170 tcg_gen_deposit_i32(dst, dst, src, pos, len); in DISAS_INSN()
/openbmc/qemu/target/sh4/
H A Dtranslate.c676 tcg_gen_deposit_i32(REG(B11_8), REG(B7_4), low, 0, 16); in _decode_opc()
/openbmc/qemu/target/rx/
H A Dtranslate.c2016 tcg_gen_deposit_i32(val, val, bit, pos, 1); in BITOP()
/openbmc/qemu/target/sparc/
H A Dtranslate.c774 tcg_gen_deposit_i32(d, t[0], t[1], 16, 16); in gen_op_fpadds16s()
792 tcg_gen_deposit_i32(d, t[0], t[1], 16, 16); in gen_op_fpsubs16s()
/openbmc/qemu/target/i386/tcg/
H A Demit.c.inc3633 tcg_gen_deposit_i32(temp, temp, temp, 16, 16);
/openbmc/qemu/target/mips/tcg/
H A Dtranslate.c3915 tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32, in gen_loongson_multimedia()