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Searched refs:smmu (Results 1 – 25 of 90) sorted by relevance

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/openbmc/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu.c71 static inline int arm_smmu_rpm_get(struct arm_smmu_device *smmu) in arm_smmu_rpm_get() argument
73 if (pm_runtime_enabled(smmu->dev)) in arm_smmu_rpm_get()
74 return pm_runtime_resume_and_get(smmu->dev); in arm_smmu_rpm_get()
79 static inline void arm_smmu_rpm_put(struct arm_smmu_device *smmu) in arm_smmu_rpm_put() argument
81 if (pm_runtime_enabled(smmu->dev)) in arm_smmu_rpm_put()
82 pm_runtime_put_autosuspend(smmu->dev); in arm_smmu_rpm_put()
130 struct arm_smmu_device **smmu) in arm_smmu_register_legacy_master() argument
173 *smmu = dev_get_drvdata(smmu_dev); in arm_smmu_register_legacy_master()
181 struct arm_smmu_device **smmu) in arm_smmu_register_legacy_master() argument
193 static void __arm_smmu_tlb_sync(struct arm_smmu_device *smmu, int page, in __arm_smmu_tlb_sync() argument
[all …]
H A Darm-smmu-impl.c28 static u32 arm_smmu_read_ns(struct arm_smmu_device *smmu, int page, in arm_smmu_read_ns() argument
33 return readl_relaxed(arm_smmu_page(smmu, page) + offset); in arm_smmu_read_ns()
36 static void arm_smmu_write_ns(struct arm_smmu_device *smmu, int page, in arm_smmu_write_ns() argument
41 writel_relaxed(val, arm_smmu_page(smmu, page) + offset); in arm_smmu_write_ns()
52 struct arm_smmu_device smmu; member
56 static int cavium_cfg_probe(struct arm_smmu_device *smmu) in cavium_cfg_probe() argument
59 struct cavium_smmu *cs = container_of(smmu, struct cavium_smmu, smmu); in cavium_cfg_probe()
65 cs->id_base = atomic_fetch_add(smmu->num_context_banks, &context_count); in cavium_cfg_probe()
66 dev_notice(smmu->dev, "\tenabling workaround for Cavium erratum 27704\n"); in cavium_cfg_probe()
74 struct cavium_smmu *cs = container_of(smmu_domain->smmu, in cavium_init_context()
[all …]
H A Darm-smmu-qcom.c17 static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu) in to_qcom_smmu() argument
19 return container_of(smmu, struct qcom_smmu, smmu); in to_qcom_smmu()
22 static void qcom_smmu_tlb_sync(struct arm_smmu_device *smmu, int page, in qcom_smmu_tlb_sync() argument
28 arm_smmu_writel(smmu, page, sync, QCOM_DUMMY_VAL); in qcom_smmu_tlb_sync()
31 reg = arm_smmu_readl(smmu, page, status); in qcom_smmu_tlb_sync()
39 qcom_smmu_tlb_sync_debug(smmu); in qcom_smmu_tlb_sync()
42 static void qcom_adreno_smmu_write_sctlr(struct arm_smmu_device *smmu, int idx, in qcom_adreno_smmu_write_sctlr() argument
45 struct qcom_smmu *qsmmu = to_qcom_smmu(smmu); in qcom_adreno_smmu_write_sctlr()
56 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_SCTLR, reg); in qcom_adreno_smmu_write_sctlr()
64 struct arm_smmu_device *smmu = smmu_domain->smmu; in qcom_adreno_smmu_get_fault_info() local
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H A Darm-smmu-nvidia.c35 struct arm_smmu_device smmu; member
41 static inline struct nvidia_smmu *to_nvidia_smmu(struct arm_smmu_device *smmu) in to_nvidia_smmu() argument
43 return container_of(smmu, struct nvidia_smmu, smmu); in to_nvidia_smmu()
46 static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu, in nvidia_smmu_page() argument
51 nvidia_smmu = container_of(smmu, struct nvidia_smmu, smmu); in nvidia_smmu_page()
52 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page()
55 static u32 nvidia_smmu_read_reg(struct arm_smmu_device *smmu, in nvidia_smmu_read_reg() argument
58 void __iomem *reg = nvidia_smmu_page(smmu, 0, page) + offset; in nvidia_smmu_read_reg()
63 static void nvidia_smmu_write_reg(struct arm_smmu_device *smmu, in nvidia_smmu_write_reg() argument
66 struct nvidia_smmu *nvidia = to_nvidia_smmu(smmu); in nvidia_smmu_write_reg()
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H A Darm-smmu.h368 struct arm_smmu_device *smmu; member
380 struct arm_smmu_device *smmu; member
425 u32 (*read_reg)(struct arm_smmu_device *smmu, int page, int offset);
426 void (*write_reg)(struct arm_smmu_device *smmu, int page, int offset,
428 u64 (*read_reg64)(struct arm_smmu_device *smmu, int page, int offset);
429 void (*write_reg64)(struct arm_smmu_device *smmu, int page, int offset,
431 int (*cfg_probe)(struct arm_smmu_device *smmu);
432 int (*reset)(struct arm_smmu_device *smmu);
435 void (*tlb_sync)(struct arm_smmu_device *smmu, int page, int sync,
441 struct arm_smmu_device *smmu,
[all …]
H A Darm-smmu-qcom-debug.c13 void qcom_smmu_tlb_sync_debug(struct arm_smmu_device *smmu) in qcom_smmu_tlb_sync_debug() argument
17 struct qcom_smmu *qsmmu = container_of(smmu, struct qcom_smmu, smmu); in qcom_smmu_tlb_sync_debug()
23 dev_err(smmu->dev, "TLB sync timed out -- SMMU may be deadlocked\n"); in qcom_smmu_tlb_sync_debug()
29 ret = qcom_scm_io_readl(smmu->ioaddr + cfg->reg_offset[QCOM_SMMU_TBU_PWR_STATUS], in qcom_smmu_tlb_sync_debug()
32 dev_err(smmu->dev, in qcom_smmu_tlb_sync_debug()
35 ret = qcom_scm_io_readl(smmu->ioaddr + cfg->reg_offset[QCOM_SMMU_STATS_SYNC_INV_TBU_ACK], in qcom_smmu_tlb_sync_debug()
38 dev_err(smmu->dev, in qcom_smmu_tlb_sync_debug()
41 ret = qcom_scm_io_readl(smmu->ioaddr + cfg->reg_offset[QCOM_SMMU_MMU2QSS_AND_SAFE_WAIT_CNTR], in qcom_smmu_tlb_sync_debug()
44 dev_err(smmu->dev, in qcom_smmu_tlb_sync_debug()
47 dev_err(smmu->dev, in qcom_smmu_tlb_sync_debug()
H A DMakefile4 arm_smmu-objs += arm-smmu.o arm-smmu-impl.o arm-smmu-nvidia.o
5 arm_smmu-$(CONFIG_ARM_SMMU_QCOM) += arm-smmu-qcom.o
6 arm_smmu-$(CONFIG_ARM_SMMU_QCOM_DEBUG) += arm-smmu-qcom-debug.o
H A Darm-smmu-qcom.h10 struct arm_smmu_device smmu; member
34 void qcom_smmu_tlb_sync_debug(struct arm_smmu_device *smmu);
36 static inline void qcom_smmu_tlb_sync_debug(struct arm_smmu_device *smmu) { } in qcom_smmu_tlb_sync_debug() argument
/openbmc/linux/drivers/iommu/
H A Dtegra-smmu.c24 struct tegra_smmu *smmu; member
54 struct tegra_smmu *smmu; member
70 static inline void smmu_writel(struct tegra_smmu *smmu, u32 value, in smmu_writel() argument
73 writel(value, smmu->regs + offset); in smmu_writel()
76 static inline u32 smmu_readl(struct tegra_smmu *smmu, unsigned long offset) in smmu_readl() argument
78 return readl(smmu->regs + offset); in smmu_readl()
87 #define SMMU_TLB_CONFIG_ACTIVE_LINES(smmu) \ argument
88 ((smmu)->soc->num_tlb_lines & (smmu)->tlb_mask)
166 static bool smmu_dma_addr_valid(struct tegra_smmu *smmu, dma_addr_t addr) in smmu_dma_addr_valid() argument
169 return (addr & smmu->pfn_mask) == addr; in smmu_dma_addr_valid()
[all …]
/openbmc/linux/drivers/iommu/arm/arm-smmu-v3/
H A Darm-smmu-v3.c89 static void parse_driver_options(struct arm_smmu_device *smmu) in parse_driver_options() argument
94 if (of_property_read_bool(smmu->dev->of_node, in parse_driver_options()
96 smmu->options |= arm_smmu_options[i].opt; in parse_driver_options()
97 dev_notice(smmu->dev, "option %s\n", in parse_driver_options()
192 static void queue_poll_init(struct arm_smmu_device *smmu, in queue_poll_init() argument
197 qp->wfe = !!(smmu->features & ARM_SMMU_FEAT_SEV); in queue_poll_init()
348 static struct arm_smmu_cmdq *arm_smmu_get_cmdq(struct arm_smmu_device *smmu) in arm_smmu_get_cmdq() argument
350 return &smmu->cmdq; in arm_smmu_get_cmdq()
353 static void arm_smmu_cmdq_build_sync_cmd(u64 *cmd, struct arm_smmu_device *smmu, in arm_smmu_cmdq_build_sync_cmd() argument
364 if (smmu->options & ARM_SMMU_OPT_MSIPOLL) { in arm_smmu_cmdq_build_sync_cmd()
[all …]
H A Darm-smmu-v3-sva.c50 struct arm_smmu_device *smmu; in arm_smmu_share_asid() local
66 smmu = smmu_domain->smmu; in arm_smmu_share_asid()
69 XA_LIMIT(1, (1 << smmu->asid_bits) - 1), GFP_KERNEL); in arm_smmu_share_asid()
86 arm_smmu_tlb_inv_asid(smmu, asid); in arm_smmu_share_asid()
213 if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_RANGE_INV)) { in arm_smmu_mm_arch_invalidate_secondary_tlbs()
221 if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_BTM)) { in arm_smmu_mm_arch_invalidate_secondary_tlbs()
223 arm_smmu_tlb_inv_asid(smmu_domain->smmu, in arm_smmu_mm_arch_invalidate_secondary_tlbs()
252 arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_mn->cd->asid); in arm_smmu_mm_release()
339 arm_smmu_tlb_inv_asid(smmu_domain->smmu, cd->asid); in arm_smmu_mmu_notifier_put()
390 bool arm_smmu_sva_supported(struct arm_smmu_device *smmu) in arm_smmu_sva_supported() argument
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/openbmc/linux/drivers/memory/tegra/
H A Dtegra210.c20 .smmu = {
36 .smmu = {
52 .smmu = {
68 .smmu = {
84 .smmu = {
100 .smmu = {
116 .smmu = {
132 .smmu = {
148 .smmu = {
164 .smmu = {
[all …]
H A Dtegra114.c31 .smmu = {
47 .smmu = {
63 .smmu = {
79 .smmu = {
95 .smmu = {
111 .smmu = {
127 .smmu = {
143 .smmu = {
159 .smmu = {
175 .smmu = {
[all …]
H A Dtegra124.c32 .smmu = {
48 .smmu = {
64 .smmu = {
80 .smmu = {
96 .smmu = {
112 .smmu = {
128 .smmu = {
144 .smmu = {
160 .smmu = {
176 .smmu = {
[all …]
H A Dtegra30.c54 .smmu = {
71 .smmu = {
88 .smmu = {
105 .smmu = {
122 .smmu = {
139 .smmu = {
156 .smmu = {
173 .smmu = {
190 .smmu = {
207 .smmu = {
[all …]
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-8040.dtsi20 <0x0 &smmu 0x480 0x20>,
21 <0x100 &smmu 0x4a0 0x20>,
22 <0x200 &smmu 0x4c0 0x20>;
36 iommus = <&smmu 0x444>;
40 iommus = <&smmu 0x445>;
44 iommus = <&smmu 0x440>;
48 iommus = <&smmu 0x441>;
52 iommus = <&smmu 0x454>;
56 iommus = <&smmu 0x450>;
60 iommus = <&smmu 0x451>;
H A Darmada-7040.dtsi20 <0x0 &smmu 0x480 0x20>,
21 <0x100 &smmu 0x4a0 0x20>,
22 <0x200 &smmu 0x4c0 0x20>;
27 iommus = <&smmu 0x444>;
31 iommus = <&smmu 0x445>;
35 iommus = <&smmu 0x440>;
39 iommus = <&smmu 0x441>;
H A Dcn9130-crb-A.dts22 <0x0 &smmu 0x480 0x20>,
23 <0x100 &smmu 0x4a0 0x20>,
24 <0x200 &smmu 0x4c0 0x20>;
H A Dcn9130-crb-B.dts19 <0x0 &smmu 0x480 0x20>,
20 <0x100 &smmu 0x4a0 0x20>,
21 <0x200 &smmu 0x4c0 0x20>;
/openbmc/linux/drivers/acpi/arm64/
H A Diort.c412 struct acpi_iort_smmu_v3 *smmu; in iort_get_id_mapping_index() local
424 smmu = (struct acpi_iort_smmu_v3 *)node->node_data; in iort_get_id_mapping_index()
430 if (smmu->event_gsiv && smmu->pri_gsiv && in iort_get_id_mapping_index()
431 smmu->gerr_gsiv && smmu->sync_gsiv) in iort_get_id_mapping_index()
433 } else if (!(smmu->flags & ACPI_IORT_SMMU_V3_DEVICEID_VALID)) { in iort_get_id_mapping_index()
437 if (smmu->id_mapping_index >= node->mapping_count) { in iort_get_id_mapping_index()
443 return smmu->id_mapping_index; in iort_get_id_mapping_index()
888 struct acpi_iort_node *smmu, in iort_get_rmrs() argument
981 struct acpi_iort_node *smmu = NULL; in iort_node_get_rmr_info() local
1032 iort_get_rmrs(node, smmu, sids, num_sids, head); in iort_node_get_rmr_info()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp.dtsi290 iommus = <&smmu 0x14e8>;
302 iommus = <&smmu 0x14e9>;
314 iommus = <&smmu 0x14ea>;
326 iommus = <&smmu 0x14eb>;
338 iommus = <&smmu 0x14ec>;
350 iommus = <&smmu 0x14ed>;
362 iommus = <&smmu 0x14ee>;
374 iommus = <&smmu 0x14ef>;
400 iommus = <&smmu 0x868>;
412 iommus = <&smmu 0x869>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp.dtsi328 iommus = <&smmu 0x14e8>;
341 iommus = <&smmu 0x14e9>;
354 iommus = <&smmu 0x14ea>;
367 iommus = <&smmu 0x14eb>;
380 iommus = <&smmu 0x14ec>;
393 iommus = <&smmu 0x14ed>;
406 iommus = <&smmu 0x14ee>;
419 iommus = <&smmu 0x14ef>;
464 iommus = <&smmu 0x868>;
477 iommus = <&smmu 0x869>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iommu/
H A Dnvidia,tegra30-smmu.txt4 - compatible : "nvidia,tegra30-smmu"
13 smmu {
14 compatible = "nvidia,tegra30-smmu";
/openbmc/linux/include/soc/tegra/
H A Dmc.h50 } smmu; member
105 void tegra_smmu_remove(struct tegra_smmu *smmu);
114 static inline void tegra_smmu_remove(struct tegra_smmu *smmu) in tegra_smmu_remove() argument
209 const struct tegra_smmu_soc *smmu; member
227 struct tegra_smmu *smmu; member
/openbmc/linux/drivers/iommu/arm/
H A DMakefile2 obj-y += arm-smmu/ arm-smmu-v3/

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