Merge tag 'xilinx-for-v2019.04-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.04-rc2

xilinx:
- Start to use distro boot commands first
- Setup fdtfile on ZynqMP
- Move mac add

Merge tag 'xilinx-for-v2019.04-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.04-rc2

xilinx:
- Start to use distro boot commands first
- Setup fdtfile on ZynqMP
- Move mac addr eeprom read to common location
- Convert to OF_SEPARATE
- Switch all board to DM_I2C
- Some DT syncs

i2c:
- Remove !DM_I2C zynq driver

versal:
- Enable some more features
- Add mini configurations

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arm64: dts: Fix various entry-method properties to reflect documentation

The idle-states binding documentation[1] mentions that the
'entry-method' property is required on 64-bit platforms and must b

arm64: dts: Fix various entry-method properties to reflect documentation

The idle-states binding documentation[1] mentions that the
'entry-method' property is required on 64-bit platforms and must be
set to "psci".

Linux commit a13f18f59d26 ("Documentation: arm: Fix typo in the idle-states
bindings examples") attempted to fix this earlier but clearly more is
needed.

Linux docs:
Documentation/devicetree/bindings/arm/idle-states.txt (see
idle-states node)

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: Add reset-on-timeout for all boards and modify default timeout value

This patch adds reset-on-timeout to FPD WDT which will trigger an
interrupt to PMU when watchdog expiry happens an

arm64: zynqmp: Add reset-on-timeout for all boards and modify default timeout value

This patch adds reset-on-timeout to FPD WDT which will trigger an
interrupt to PMU when watchdog expiry happens and PMU takes the
necessary action. If this property is not enabled, reason will not be
known when watchdog expiry happens.
This patch also modifies the default timeout to 60 seconds. Reason is
that if u-boot enables WDT, it will set the timeout to 10 seconds and
this is not enough to boot till Linux and start the WDT application in
Linux. 60 seconds is the maximum safest value to boot till Linux and
start the WDT application.

Users need to change this timeout value to fit their needs.

Signed-off-by: Mounika Grace Akula <mounika.grace.akula@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge tag 'xilinx-for-v2019.04' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.04

tools:
- Fix zynqmpimage generation

zynq:
- Some configs/Kconfig/DT updates
- Enable REMAKE_ELF a

Merge tag 'xilinx-for-v2019.04' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.04

tools:
- Fix zynqmpimage generation

zynq:
- Some configs/Kconfig/DT updates
- Enable REMAKE_ELF and OF_SEPARATE
- Topic boards update
- i2c cleanups and conversion to DM_I2C

zynqmp:
- Some configs/Kconfig/DT updates
- Board config cleanup
- Move arch folder to mach-zynqmp

versal:
- Enable DM_I2C, CMD_DM

zynq-gem:
- Fix driver cache handling

i2c:
- Live tree simple update

phy:
- Fixed phy cleanup

travis:
- Wire Versal SoC

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arm64: zynqmp: Fix mmc node names to be in sync with kernel

This patches renames sd nodes in dts to be in line with
kernel. This patch also modifies the references for the same
in code.
It checks mm

arm64: zynqmp: Fix mmc node names to be in sync with kernel

This patches renames sd nodes in dts to be in line with
kernel. This patch also modifies the references for the same
in code.
It checks mmc first to have no time penalty for new DT node names based
on left-to-right expression evaluation.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.05-rc2

- Various DT changes and sync with mainline kernel
- Various defconfig updates
- Add SPL i

Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.05-rc2

- Various DT changes and sync with mainline kernel
- Various defconfig updates
- Add SPL init for zcu102 revA
- Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX
and zc1751-dc3
- Net fixes - xlnx,phy-type
- 64bit axi ethernet support
- arasan: Fix nand write issue
- fpga fixes
- Maintainer file updates

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arm64: zynqmp: Remove power domain description

This part hasn't been pushed to mainline yet that's why remove it.
The patch can be reverted in future when this is pushed there.

Reported-by: Alexand

arm64: zynqmp: Remove power domain description

This part hasn't been pushed to mainline yet that's why remove it.
The patch can be reverted in future when this is pushed there.

Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Alexander Graf <agraf@suse.de>

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arm64: zynqmp: Sync up license with mainline kernel

Mainline Linux kernel has adopted SPDX header license in a different
format then was used before. This patch is syncing it up.

Also update years

arm64: zynqmp: Sync up license with mainline kernel

Mainline Linux kernel has adopted SPDX header license in a different
format then was used before. This patch is syncing it up.

Also update years in License text and remove Nathalie's email because it
is no longer valid.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: Sync alignment with mainline

Sync pcie and lpd_dma nodes with mainline version.
Incorrect locations are causing diff in statistics that's why
synchronizations are needed.

Signed-off-

arm64: zynqmp: Sync alignment with mainline

Sync pcie and lpd_dma nodes with mainline version.
Incorrect locations are causing diff in statistics that's why
synchronizations are needed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge tag 'xilinx-for-v2018.01-rc2-v2' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.01-rc2-v2

fpga:
- Enable loading bitstream via fit image for !xilinx platforms

zynq:
- Fi

Merge tag 'xilinx-for-v2018.01-rc2-v2' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.01-rc2-v2

fpga:
- Enable loading bitstream via fit image for !xilinx platforms

zynq:
- Fix SPL SD boot mode

zynqmp:
- Not not reset in panic
- Do not use simple allocator because of fat changes
- Various dt chagnes
- modeboot variable setup
- Fix fpga loading on automotive devices
- Fix coverity issues

test:
- Fix env test for !hush case - Stephen's patch

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arm64: zynqmp: Add support for generic QSPI boot

This patch is enabling support for SPL QSPI boot.

First of all it is necessary to generate atf-spi.ub which is different
format than atf-uboot.ub (t

arm64: zynqmp: Add support for generic QSPI boot

This patch is enabling support for SPL QSPI boot.

First of all it is necessary to generate atf-spi.ub which is different
format than atf-uboot.ub (this can be made as legacy image too)

ADDR=`arm-xilinx-linux-gnueabi-readelf -a bl31.elf | grep "Entry point
address" | cut -d ':' -f 2 | sed -e 's/^[ \t]*//'`
aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin
./tools/mkimage -f auto -A arm64 -T firmware -C none -O u-boot -a $ADDR
-e $ADDR -n "atf1" -E -b arch/arm/dts/zynqmp-zcu102.dtb -d bl31.bin
atf-uboot.ub
./tools/mkimage -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR
-n "atf-for-qspi" -E -d bl31.bin atf-spi.ub

This patch is using this QSPI layout with offsets:
0 boot.bin
512k atf-ub
640k u-boot.bin
1280k u-boot.img

Which corresponding by writing these images(read from MMC)
mmcinfo
sf probe
load mmc 0 10000000 boot.bin
sf erase 0 +$filesize
sf write 10000000 0 $filesize
load mmc 0 10000000 atf-spi.ub
sf erase 0x80000 +$filesize
sf write 10000000 0x80000 $filesize
load mmc 0 10000000 u-boot.bin
sf erase 0xa0000 +$filesize
sf write 10000000 0xa0000 $filesize
load mmc 0 10000000 u-boot.img
sf erase 0x140000 +$filesize
sf write 10000000 0x140000 $filesize

For testing u-boot running in EL3 you can break atf-spi.ub like this:
sf probe
sf erase 0x80000 +4

Then u-boot.img is executed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: Add reference to pmu firmware node

This reference is needed for pinctrl driver where some signals can be
routed directly to platform management unit (PMU).

Signed-off-by: Michal Sime

arm64: zynqmp: Add reference to pmu firmware node

This reference is needed for pinctrl driver where some signals can be
routed directly to platform management unit (PMU).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.1

Zynq:
- Add support for Syzygy and cc108 boards
- Add support for mini u-boot configurations (c

Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.1

Zynq:
- Add support for Syzygy and cc108 boards
- Add support for mini u-boot configurations (cse)
- dts updates
- config/defconfig updates in connection to Kconfig changes
- Fix psu_init handling

ZynqMP:
- SPL fixes
- Remove slcr.c
- Fixing r5 startup sequence
- Add support for external pmufw
- Add support for new ZynqMP chips
- dts updates
- Add support for zcu102 rev1.0 board

Drivers:
- nand: Support external timing setting and board init
- ahci: Fix wording
- axi_emac: Wait for bit, non processor mode, readl/write conversion
- zynq_gem: Fix SGMII/PCS support

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arm64: zynqmp: usb: Correct IOMMU node for making SMMU work with USB

This patch makes SMMU work by moving the iommus node under the dwc3 child
entry from parent node.

Signed-off-by: Anurag Kumar Vu

arm64: zynqmp: usb: Correct IOMMU node for making SMMU work with USB

This patch makes SMMU work by moving the iommus node under the dwc3 child
entry from parent node.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: Remove clock setting from dtsi

clock setting is handled via clk dtsi file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm64: zynqmp: Uncomment snps,quirk-frame-length-adjustment flag in dwc3

This patch uncomments snps,quirk-frame-length-adjustment which has
the value to adjust the SOF/ITP generated from the control

arm64: zynqmp: Uncomment snps,quirk-frame-length-adjustment flag in dwc3

This patch uncomments snps,quirk-frame-length-adjustment which has
the value to adjust the SOF/ITP generated from the controller.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: Add USB OTG interrupts support in dt

This patch adds OTG interrupt support in device tree. It will add
an extra interrupt line number dedicated to OTG events. This will
enable OTG int

arm64: zynqmp: Add USB OTG interrupts support in dt

This patch adds OTG interrupt support in device tree. It will add
an extra interrupt line number dedicated to OTG events. This will
enable OTG interrupts to serve in DWC3 OTG driver.

Signed-off-by: Manish Narani <mnarani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: Enabled CCI support for USB

This patch adds CCI support for USB when CCI is enabled in design.
This patch also adds 'reg' property for Xilinx USB 3.0 IP. The 'reg'
property is added i

arm64: zynqmp: Enabled CCI support for USB

This patch adds CCI support for USB when CCI is enabled in design.
This patch also adds 'reg' property for Xilinx USB 3.0 IP. The 'reg'
property is added in order to modify a register in that to enable
coherency in Hardware.

Also add address to unit name to avoid dtc warning

Signed-off-by: Manish Narani <mnarani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: Add support reading SoC revision using nvmem driver in dwc3

This patch adds support for reading silicon revision using zynqmp nvmem
driver.

Signed-off-by: Anurag Kumar Vulisha <anura

arm64: zynqmp: Add support reading SoC revision using nvmem driver in dwc3

This patch adds support for reading silicon revision using zynqmp nvmem
driver.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: Move nodes which have no reg property out of bus

Nodes without reg properties shouldn't be placed in amba node.
Move them out.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm64: zynqmp: dt: Add AMS node

The AMS includes an ADC as well as on-chip sensors that can be used to
sample external voltages and monitor on-die operating conditions, such as
temperature and suppl

arm64: zynqmp: dt: Add AMS node

The AMS includes an ADC as well as on-chip sensors that can be used to
sample external voltages and monitor on-die operating conditions, such as
temperature and supply voltage levels.

Signed-off-by: Rajnikant Bhojani <rajnikant.bhojani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: sdhci: set host quirk2 for no 1.8V support for 1.0 silicon

This patch sets host quirk2 bit field for No 1.8V supported in case of
1.0 silicon. The 1.0 silicon doesn't have support for

arm64: zynqmp: sdhci: set host quirk2 for no 1.8V support for 1.0 silicon

This patch sets host quirk2 bit field for No 1.8V supported in case of
1.0 silicon. The 1.0 silicon doesn't have support for UHS-I modes. This
property will ensure the SD runs on High Speed mode.

Signed-off-by: Manish Narani <mnarani@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: Use reset controller framework for asserting/de-asserting reset

This patch modifies the phy_zynqmp.c driver to use reset-controller
framework for asserting/de-asserting reset for High

arm64: zynqmp: Use reset controller framework for asserting/de-asserting reset

This patch modifies the phy_zynqmp.c driver to use reset-controller
framework for asserting/de-asserting reset for High Speed modules.

Also fix documentation and dtsi.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: Add reset-controller support in serdes driver

This patch add the reset nodes in zynqmp.dtsi which are used by
reset-controller framework

Signed-off-by: Anurag Kumar Vulisha <anuragku

arm64: zynqmp: Add reset-controller support in serdes driver

This patch add the reset nodes in zynqmp.dtsi which are used by
reset-controller framework

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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arm64: zynqmp: Remove tx_termination_fix detection on silicon v1

Only silicon v1 requires this termination fix. With new nvmem soc
revision nvmem detection driver this can be autodetected at run tim

arm64: zynqmp: Remove tx_termination_fix detection on silicon v1

Only silicon v1 requires this termination fix. With new nvmem soc
revision nvmem detection driver this can be autodetected at run time and
this flag is not needed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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