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Searched refs:set_mask (Results 1 – 25 of 39) sorted by relevance

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/openbmc/linux/arch/arm64/mm/
H A Dpageattr.c17 pgprot_t set_mask; member
42 pte = set_pte_bit(pte, cdata->set_mask); in change_page_range()
52 pgprot_t set_mask, pgprot_t clear_mask) in __change_memory_common() argument
57 data.set_mask = set_mask; in __change_memory_common()
68 pgprot_t set_mask, pgprot_t clear_mask) in change_memory_common() argument
108 if (rodata_full && (pgprot_val(set_mask) == PTE_RDONLY || in change_memory_common()
112 PAGE_SIZE, set_mask, clear_mask); in change_memory_common()
122 return __change_memory_common(start, size, set_mask, clear_mask); in change_memory_common()
168 .set_mask = __pgprot(0), in set_direct_map_invalid_noflush()
183 .set_mask = __pgprot(PTE_VALID | PTE_WRITE), in set_direct_map_default_noflush()
/openbmc/linux/arch/arm/mm/
H A Dpageattr.c12 pgprot_t set_mask; member
22 pte = set_pte_bit(pte, cdata->set_mask); in change_page_range()
39 pgprot_t set_mask, pgprot_t clear_mask) in __change_memory_common() argument
44 data.set_mask = set_mask; in __change_memory_common()
55 pgprot_t set_mask, pgprot_t clear_mask) in change_memory_common() argument
70 return __change_memory_common(start, size, set_mask, clear_mask); in change_memory_common()
/openbmc/linux/drivers/hwmon/
H A Dlm75.c81 u8 set_mask; member
132 .set_mask = 3 << 5, /* 12-bit mode*/
141 .set_mask = 2 << 5, /* 11-bit mode */
150 .set_mask = 2 << 5, /* 11-bit mode */
159 .set_mask = 2 << 5, /* 11-bit mode */
171 .set_mask = 3 << 5, /* 12-bit mode*/
221 .set_mask = 3 << 5, /* 12-bit mode */
231 .set_mask = 3 << 5, /* 12-bit mode */
240 .set_mask = 3 << 5, /* 12-bit mode */
249 .set_mask = 3 << 5, /* 12-bit mode */
[all …]
H A Dmax31730.c60 static int max31730_write_config(struct max31730_data *data, u8 set_mask, in max31730_write_config() argument
67 value |= set_mask; in max31730_write_config()
/openbmc/linux/drivers/gpio/
H A Dgpio-mmio.c153 unsigned long set_mask = 0; in bgpio_get_set_multiple() local
158 set_mask = *mask & gc->bgpio_dir; in bgpio_get_set_multiple()
161 if (set_mask) in bgpio_get_set_multiple()
162 *bits |= gc->read_reg(gc->reg_set) & set_mask; in bgpio_get_set_multiple()
267 unsigned long *set_mask, in bgpio_multiple_get_masks() argument
272 *set_mask = 0; in bgpio_multiple_get_masks()
277 *set_mask |= bgpio_line2mask(gc, i); in bgpio_multiple_get_masks()
289 unsigned long set_mask, clear_mask; in bgpio_set_multiple_single_reg() local
293 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); in bgpio_set_multiple_single_reg()
295 gc->bgpio_data |= set_mask; in bgpio_set_multiple_single_reg()
[all …]
H A Dgpiolib.h111 unsigned long *set_mask; member
H A Dgpiolib.c3167 gpio_chip_set_multiple(array_info->chip, array_info->set_mask, in gpiod_set_array_value_complex()
3170 i = find_first_zero_bit(array_info->set_mask, array_size); in gpiod_set_array_value_complex()
3237 i = find_next_zero_bit(array_info->set_mask, in gpiod_set_array_value_complex()
4421 array_info->set_mask = array_info->get_mask + in gpiod_get_array()
4429 bitmap_set(array_info->set_mask, descs->ndescs, in gpiod_get_array()
4441 __clear_bit(descs->ndescs, array_info->set_mask); in gpiod_get_array()
4459 array_info->set_mask); in gpiod_get_array()
4466 array_info->set_mask); in gpiod_get_array()
4477 *array_info->get_mask, *array_info->set_mask, in gpiod_get_array()
/openbmc/linux/arch/arm64/kvm/hyp/nvhe/
H A Dsys_regs.c88 u64 set_mask = 0; in get_pvm_id_aa64pfr0() local
91 set_mask |= get_restricted_features_unsigned(id_aa64pfr0_el1_sys_val, in get_pvm_id_aa64pfr0()
94 return (id_aa64pfr0_el1_sys_val & allow_mask) | set_mask; in get_pvm_id_aa64pfr0()
189 u64 set_mask; in get_pvm_id_aa64mmfr0() local
191 set_mask = get_restricted_features_unsigned(id_aa64mmfr0_el1_sys_val, in get_pvm_id_aa64mmfr0()
194 return (id_aa64mmfr0_el1_sys_val & PVM_ID_AA64MMFR0_ALLOW) | set_mask; in get_pvm_id_aa64mmfr0()
/openbmc/linux/drivers/net/ethernet/microchip/
H A Dencx24j600-regmap.c195 unsigned int set_mask = mask & val; in regmap_encx24j600_reg_update_bits() local
201 if (set_mask & 0xff) in regmap_encx24j600_reg_update_bits()
202 ret = regmap_encx24j600_sfr_set_bits(ctx, reg, set_mask); in regmap_encx24j600_reg_update_bits()
204 set_mask = (set_mask & 0xff00) >> 8; in regmap_encx24j600_reg_update_bits()
206 if ((set_mask & 0xff) && (ret == 0)) in regmap_encx24j600_reg_update_bits()
207 ret = regmap_encx24j600_sfr_set_bits(ctx, reg + 1, set_mask); in regmap_encx24j600_reg_update_bits()
/openbmc/linux/sound/soc/bcm/
H A Dcygnus-pcm.c348 u32 set_mask; in disable_intr() local
355 set_mask = BIT(aio->portnum); in disable_intr()
359 writel(set_mask, aio->cygaud->audio + ESR0_MASK_SET_OFFSET); in disable_intr()
360 writel(set_mask, aio->cygaud->audio + ESR1_MASK_SET_OFFSET); in disable_intr()
361 writel(set_mask, aio->cygaud->audio + ESR3_MASK_SET_OFFSET); in disable_intr()
363 writel(set_mask, aio->cygaud->audio + ESR2_MASK_SET_OFFSET); in disable_intr()
364 writel(set_mask, aio->cygaud->audio + ESR4_MASK_SET_OFFSET); in disable_intr()
/openbmc/linux/arch/riscv/mm/
H A Dpageattr.c14 pgprot_t set_mask; member
24 new_val |= (pgprot_val(masks->set_mask)); in set_pageattr_masks()
262 static int __set_memory(unsigned long addr, int numpages, pgprot_t set_mask, in __set_memory() argument
271 .set_mask = set_mask, in __set_memory()
/openbmc/linux/drivers/mfd/
H A Dssbi.c94 static int ssbi_wait_mask(struct ssbi *ssbi, u32 set_mask, u32 clr_mask) in ssbi_wait_mask() argument
101 if (((val & set_mask) == set_mask) && ((val & clr_mask) == 0)) in ssbi_wait_mask()
/openbmc/linux/drivers/net/ethernet/ibm/
H A Dibmveth.h73 unsigned long reset_mask, unsigned long set_mask, in h_illan_attributes() argument
80 reset_mask, set_mask); in h_illan_attributes()
/openbmc/linux/drivers/mailbox/
H A Dpcc.c79 u64 set_mask; member
208 val |= reg->set_mask; in pcc_chan_reg_read_modify_write()
519 u64 preserve_mask, u64 set_mask, u64 status_mask, char *name) in pcc_chan_reg_init() argument
537 reg->set_mask = set_mask; in pcc_chan_reg_init()
/openbmc/linux/sound/pci/ice1712/
H A Dice1712.h354 void (*set_mask)(struct snd_ice1712 *ice, unsigned int data); member
407 ice->gpio.set_mask(ice, bits); in snd_ice1712_gpio_set_mask()
435 ice->gpio.set_mask(ice, ice->gpio.saved[1]); in snd_ice1712_restore_gpio_status()
H A Dquartet.c272 ice->gpio.set_mask(ice, ~GPIO_SPI_ALL); in qtet_akm_write()
314 ice->gpio.set_mask(ice, 0xffffff); in qtet_akm_write()
405 ice->gpio.set_mask(ice, ~(tmp)); in reg_write()
429 ice->gpio.set_mask(ice, 0xffffff); in reg_write()
/openbmc/ipmitool/include/ipmitool/
H A Dipmi_sensor.h73 uint8_t set_mask; /* threshold setting mask */ member
/openbmc/linux/drivers/net/phy/
H A Dbcm7xxx.c224 int set_mask, int clr_mask) in __phy_set_clr_bits() argument
233 v |= set_mask; in __phy_set_clr_bits()
243 int set_mask, int clr_mask) in phy_set_clr_bits() argument
248 ret = __phy_set_clr_bits(dev, location, set_mask, clr_mask); in phy_set_clr_bits()
/openbmc/qemu/hw/hyperv/
H A Dhyperv.c352 unsigned long *flags, set_mask; in hyperv_set_event_flag() local
363 set_mask = BIT_MASK(eventno); in hyperv_set_event_flag()
366 if ((qatomic_fetch_or(&flags[set_idx], set_mask) & set_mask) != set_mask) { in hyperv_set_event_flag()
/openbmc/u-boot/drivers/i2c/
H A Dmv_i2c.c95 static int i2c_isr_set_cleared(struct mv_i2c *base, unsigned long set_mask, in i2c_isr_set_cleared() argument
105 } while (((isr & set_mask) != set_mask) in i2c_isr_set_cleared()
/openbmc/qemu/contrib/plugins/
H A Dcache.c77 uint64_t set_mask; member
230 return (addr & cache->set_mask) >> cache->blksize_shift; in extract_set()
275 cache->set_mask = ((cache->num_sets - 1) << cache->blksize_shift); in cache_init()
276 cache->tag_mask = ~(cache->set_mask | blk_mask); in cache_init()
/openbmc/linux/arch/arm/mach-omap2/
H A Dcommon.h245 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
/openbmc/linux/drivers/crypto/intel/qat/qat_4xxx/
H A Dadf_4xxx_hw_data.c424 goto set_mask; in get_ring_to_svc_map()
455 set_mask: in get_ring_to_svc_map()
/openbmc/u-boot/include/
H A Dcros_ec.h186 int cros_ec_flash_protect(struct udevice *dev, uint32_t set_mask,
/openbmc/u-boot/cmd/aspeed/nettest/
H A Dphy.c188 void phy_clrset(MAC_ENGINE *eng, int adr, uint32_t clr_mask, uint32_t set_mask) in phy_clrset() argument
192 clr_mask, set_mask, eng->phy.Adr, eng->run.mdio_base); in phy_clrset()
196 adr, clr_mask, set_mask, eng->phy.Adr, in phy_clrset()
199 phy_write(eng, adr, ((phy_read(eng, adr) & (~clr_mask)) | set_mask)); in phy_clrset()

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