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Searched refs:pipe_mask (Results 1 – 25 of 25) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_device.c183 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
196 .__runtime_defaults.pipe_mask = BIT(PIPE_A), \
232 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
293 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
334 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
356 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
370 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
386 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
404 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
424 .__runtime_defaults.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
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H A Dintel_display_device.h41 #define HAS_DISPLAY(i915) (DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
70 #define INTEL_NUM_PIPES(i915) (hweight8(DISPLAY_RUNTIME_INFO(i915)->pipe_mask))
82 u8 pipe_mask; member
H A Dintel_dpll_mgr.c226 unsigned int pipe_mask = BIT(crtc->pipe); in intel_enable_shared_dpll() local
235 if (drm_WARN_ON(&dev_priv->drm, !(pll->state.pipe_mask & pipe_mask)) || in intel_enable_shared_dpll()
236 drm_WARN_ON(&dev_priv->drm, pll->active_mask & pipe_mask)) in intel_enable_shared_dpll()
239 pll->active_mask |= pipe_mask; in intel_enable_shared_dpll()
272 unsigned int pipe_mask = BIT(crtc->pipe); in intel_disable_shared_dpll() local
282 if (drm_WARN(&dev_priv->drm, !(pll->active_mask & pipe_mask), in intel_disable_shared_dpll()
295 pll->active_mask &= ~pipe_mask; in intel_disable_shared_dpll()
326 if (shared_dpll[i].pipe_mask == 0) { in intel_find_shared_dpll()
339 shared_dpll[i].pipe_mask, in intel_find_shared_dpll()
371 drm_WARN_ON(&i915->drm, (shared_dpll_state->pipe_mask & BIT(crtc->pipe)) != 0); in intel_reference_shared_dpll_crtc()
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H A Dintel_display_irq.h34 void gen8_irq_power_well_post_enable(struct drm_i915_private *i915, u8 pipe_mask);
35 void gen8_irq_power_well_pre_disable(struct drm_i915_private *i915, u8 pipe_mask);
H A Dintel_ddi.c758 u8 *pipe_mask, bool *is_dp_mst) in intel_ddi_get_encoder_pipes() argument
768 *pipe_mask = 0; in intel_ddi_get_encoder_pipes()
790 *pipe_mask = BIT(PIPE_A); in intel_ddi_get_encoder_pipes()
793 *pipe_mask = BIT(PIPE_B); in intel_ddi_get_encoder_pipes()
796 *pipe_mask = BIT(PIPE_C); in intel_ddi_get_encoder_pipes()
835 *pipe_mask |= BIT(p); in intel_ddi_get_encoder_pipes()
838 if (!*pipe_mask) in intel_ddi_get_encoder_pipes()
843 if (!mst_pipe_mask && hweight8(*pipe_mask) > 1) { in intel_ddi_get_encoder_pipes()
845 "Multiple pipes for [ENCODER:%d:%s] (pipe_mask %02x)\n", in intel_ddi_get_encoder_pipes()
847 *pipe_mask); in intel_ddi_get_encoder_pipes()
876 u8 pipe_mask; intel_ddi_get_hw_state() local
2031 u8 pipe_mask; intel_ddi_sanitize_encoder_pll_mapping() local
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H A Dintel_display.h224 for_each_if(DISPLAY_RUNTIME_INFO(__dev_priv)->pipe_mask & BIT(__p))
280 #define for_each_intel_crtc_in_pipe_mask(dev, intel_crtc, pipe_mask) \ argument
284 for_each_if((pipe_mask) & BIT(intel_crtc->pipe))
H A Dg4x_hdmi.c756 intel_encoder->pipe_mask = BIT(PIPE_C); in g4x_hdmi_init()
758 intel_encoder->pipe_mask = BIT(PIPE_A) | BIT(PIPE_B); in g4x_hdmi_init()
760 intel_encoder->pipe_mask = ~0; in g4x_hdmi_init()
H A Dintel_dpll_mgr.h241 u8 pipe_mask; member
H A Dintel_dp.h47 u8 *pipe_mask);
H A Dintel_dp.c4270 u8 *pipe_mask) in intel_dp_get_active_pipes() argument
4277 *pipe_mask = 0; in intel_dp_get_active_pipes()
4308 *pipe_mask |= BIT(crtc->pipe); in intel_dp_get_active_pipes()
4329 u8 pipe_mask; in intel_dp_retrain_link() local
4343 ret = intel_dp_get_active_pipes(intel_dp, ctx, &pipe_mask); in intel_dp_retrain_link()
4347 if (pipe_mask == 0) in intel_dp_retrain_link()
4356 for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, pipe_mask) { in intel_dp_retrain_link()
4367 for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, pipe_mask) { in intel_dp_retrain_link()
4386 for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, pipe_mask) { in intel_dp_retrain_link()
4404 u8 *pipe_mask) in intel_dp_prep_phy_test() argument
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H A Dintel_tc.c1614 u8 pipe_mask; in reset_link_commit() local
1621 ret = intel_dp_get_active_pipes(intel_dp, ctx, &pipe_mask); in reset_link_commit()
1625 if (!pipe_mask) in reset_link_commit()
1628 for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, pipe_mask) { in reset_link_commit()
H A Dintel_display_irq.c1484 u8 pipe_mask) in gen8_irq_power_well_post_enable() argument
1499 for_each_pipe_masked(dev_priv, pipe, pipe_mask) in gen8_irq_power_well_post_enable()
1508 u8 pipe_mask) in gen8_irq_power_well_pre_disable() argument
1520 for_each_pipe_masked(dev_priv, pipe, pipe_mask) in gen8_irq_power_well_pre_disable()
H A Dg4x_dp.c1362 intel_encoder->pipe_mask = BIT(PIPE_C); in g4x_dp_init()
1364 intel_encoder->pipe_mask = BIT(PIPE_A) | BIT(PIPE_B); in g4x_dp_init()
1366 intel_encoder->pipe_mask = ~0; in g4x_dp_init()
H A Dintel_lvds.c924 encoder->pipe_mask = BIT(PIPE_B); in intel_lvds_init()
926 encoder->pipe_mask = ~0; in intel_lvds_init()
H A Dintel_crt.c1053 crt->base.pipe_mask = BIT(PIPE_A); in intel_crt_init()
1055 crt->base.pipe_mask = ~0; in intel_crt_init()
H A Dvlv_dsi.c1827 intel_encoder->pipe_mask = ~0; in vlv_dsi_init()
1829 intel_encoder->pipe_mask = BIT(PIPE_A); in vlv_dsi_init()
1831 intel_encoder->pipe_mask = BIT(PIPE_B); in vlv_dsi_init()
H A Dintel_dvo.c523 encoder->pipe_mask = ~0; in intel_dvo_init()
H A Dintel_display_types.h161 u8 pipe_mask; member
H A Dintel_dp_mst.c1201 intel_encoder->pipe_mask = ~0; in intel_dp_create_fake_mst_encoder()
H A Dintel_display_debugfs.c658 pll->state.pipe_mask, pll->active_mask, in i915_shared_dplls_info()
H A Dintel_tv.c2019 intel_encoder->pipe_mask = ~0; in intel_tv_init()
H A Dicl_dsi.c1991 encoder->pipe_mask = ~0; in icl_dsi_init()
H A Dintel_sdvo.c3017 intel_sdvo->base.pipe_mask = ~0; in intel_sdvo_output_setup()
H A Dintel_display.c3381 return pipes & DISPLAY_RUNTIME_INFO(i915)->pipe_mask; in bigjoiner_pipes()
7400 for_each_intel_crtc_in_pipe_mask(dev, crtc, encoder->pipe_mask) in intel_encoder_possible_crtcs()
/openbmc/linux/drivers/usb/renesas_usbhs/
H A Dcommon.c276 u16 pipe_mask = (u16)GENMASK(usbhs_get_dparam(priv, pipe_size), 0); in usbhs_xxxsts_clear() local
278 usbhs_write(priv, sts_reg, ~(1 << bit) & pipe_mask); in usbhs_xxxsts_clear()