| /openbmc/u-boot/drivers/mmc/ |
| H A D | mv_sdhci.c | 67 int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks) in mv_sdh_init() argument
91 return add_sdhci(host, 0, min_clk); in mv_sdh_init()
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| H A D | kona_sdhci.c | 77 int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks) in kona_sdhci_init() argument
130 add_sdhci(host, 0, min_clk); in kona_sdhci_init()
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| H A D | atmel_sdhci.c | 21 u32 max_clk, min_clk = ATMEL_SDHC_MIN_FREQ; in atmel_sdhci_init() local
40 add_sdhci(host, 0, min_clk); in atmel_sdhci_init()
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| H A D | dw_mmc.c | 541 u32 max_clk, u32 min_clk) argument
547 cfg->f_min = min_clk;
572 int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk) argument
574 dwmci_setup_cfg(&host->cfg, host, max_clk, min_clk);
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| H A D | ftsdc010_mci.c | 372 uint caps, u32 max_clk, u32 min_clk) in ftsdc_setup_cfg() argument
375 cfg->f_min = min_clk; in ftsdc_setup_cfg()
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| /openbmc/u-boot/include/ |
| H A D | dwmmc.h | 270 u32 max_clk, u32 min_clk);
300 int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk);
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| /openbmc/u-boot/arch/arm/include/asm/kona-common/ |
| H A D | kona_sdhci.h | 9 int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks);
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| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_6_ppt.c | 795 uint32_t min_clk, max_clk; in smu_v13_0_6_print_clk_levels() local
819 min_clk = pstate_table->gfxclk_pstate.curr.min; in smu_v13_0_6_print_clk_levels()
822 if (!smu_v13_0_6_freqs_in_same_level(now, min_clk) && in smu_v13_0_6_print_clk_levels()
825 min_clk); in smu_v13_0_6_print_clk_levels()
832 min_clk, in smu_v13_0_6_print_clk_levels()
833 smu_v13_0_6_freqs_in_same_level(now, min_clk) ? "*" : ""); in smu_v13_0_6_print_clk_levels()
1484 uint32_t min_clk; in smu_v13_0_6_set_soft_freq_limited_range() local
1526 min_clk = dpm_context->dpm_tables.gfx_table.min; in smu_v13_0_6_set_soft_freq_limited_range()
1528 ret = smu_v13_0_6_set_gfx_soft_freq_limited_range(smu, min_clk, in smu_v13_0_6_set_soft_freq_limited_range()
1539 pstate_table->gfxclk_pstate.curr.min = min_clk; in smu_v13_0_6_set_soft_freq_limited_range()
[all …]
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| H A D | aldebaran_ppt.c | 754 uint32_t min_clk, max_clk; in aldebaran_print_clk_levels() local
786 min_clk = pstate_table->gfxclk_pstate.curr.min; in aldebaran_print_clk_levels()
789 freq_values[0] = min_clk; in aldebaran_print_clk_levels()
793 if (now > min_clk && now < max_clk) { in aldebaran_print_clk_levels()
1310 uint32_t min_clk; in aldebaran_set_soft_freq_limited_range() local
1351 min_clk = dpm_context->dpm_tables.gfx_table.min; in aldebaran_set_soft_freq_limited_range()
1353 ret = smu_v13_0_set_soft_freq_limited_range(smu, SMU_GFXCLK, min_clk, max_clk); in aldebaran_set_soft_freq_limited_range()
1363 pstate_table->gfxclk_pstate.curr.min = min_clk; in aldebaran_set_soft_freq_limited_range()
1378 uint32_t min_clk; in aldebaran_usr_edit_dpm_table() local
1424 min_clk = dpm_context->dpm_tables.gfx_table.min; in aldebaran_usr_edit_dpm_table()
[all …]
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| H A D | smu_v13_0_5_ppt.c | 835 uint32_t min_clk = min; in smu_v13_0_5_set_soft_freq_limited_range() local
858 min_clk = min << SMU_13_VCLK_SHIFT; in smu_v13_0_5_set_soft_freq_limited_range()
862 ret = smu_cmn_send_smc_msg_with_param(smu, msg_set_min, min_clk, NULL); in smu_v13_0_5_set_soft_freq_limited_range()
985 uint32_t *min_clk, in smu_v13_0_5_get_dpm_profile_freq() argument
1010 *min_clk = *max_clk = clk_limit; in smu_v13_0_5_get_dpm_profile_freq()
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| H A D | smu_v13_0_4_ppt.c | 859 uint32_t min_clk = min; in smu_v13_0_4_set_soft_freq_limited_range() local
890 min_clk = min << SMU_13_VCLK_SHIFT; in smu_v13_0_4_set_soft_freq_limited_range()
894 ret = smu_cmn_send_smc_msg_with_param(smu, msg_set_min, min_clk, NULL); in smu_v13_0_4_set_soft_freq_limited_range()
939 uint32_t *min_clk, in smu_v13_0_4_get_dpm_profile_freq() argument
976 *min_clk = *max_clk = clk_limit; in smu_v13_0_4_get_dpm_profile_freq()
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| H A D | yellow_carp_ppt.c | 969 uint32_t min_clk = min; in yellow_carp_set_soft_freq_limited_range() local
1001 min_clk = min << SMU_13_VCLK_SHIFT; in yellow_carp_set_soft_freq_limited_range()
1005 ret = smu_cmn_send_smc_msg_with_param(smu, msg_set_min, min_clk, NULL); in yellow_carp_set_soft_freq_limited_range()
1169 uint32_t *min_clk, in yellow_carp_get_dpm_profile_freq() argument
1205 *min_clk = *max_clk = clk_limit; in yellow_carp_get_dpm_profile_freq()
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| /openbmc/u-boot/arch/arm/mach-mvebu/include/mach/ |
| H A D | cpu.h | 144 int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
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