/openbmc/qemu/target/arm/tcg/ |
H A D | cpu-v7m.c | 62 cpu->isar.id_pfr0 = 0x00000030; in cortex_m0_initfn() 63 cpu->isar.id_pfr1 = 0x00000200; in cortex_m0_initfn() 64 cpu->isar.id_dfr0 = 0x00100000; in cortex_m0_initfn() 66 cpu->isar.id_mmfr0 = 0x00000030; in cortex_m0_initfn() 67 cpu->isar.id_mmfr1 = 0x00000000; in cortex_m0_initfn() 68 cpu->isar.id_mmfr2 = 0x00000000; in cortex_m0_initfn() 69 cpu->isar.id_mmfr3 = 0x00000000; in cortex_m0_initfn() 70 cpu->isar.id_isar0 = 0x01141110; in cortex_m0_initfn() 71 cpu->isar.id_isar1 = 0x02111000; in cortex_m0_initfn() 72 cpu->isar.id_isar2 = 0x21112231; in cortex_m0_initfn() [all …]
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H A D | cpu64.c | 51 cpu->isar.id_pfr0 = 0x00000131; in aarch64_a35_initfn() 52 cpu->isar.id_pfr1 = 0x00011011; in aarch64_a35_initfn() 53 cpu->isar.id_dfr0 = 0x03010066; in aarch64_a35_initfn() 55 cpu->isar.id_mmfr0 = 0x10201105; in aarch64_a35_initfn() 56 cpu->isar.id_mmfr1 = 0x40000000; in aarch64_a35_initfn() 57 cpu->isar.id_mmfr2 = 0x01260000; in aarch64_a35_initfn() 58 cpu->isar.id_mmfr3 = 0x02102211; in aarch64_a35_initfn() 59 cpu->isar.id_isar0 = 0x02101110; in aarch64_a35_initfn() 60 cpu->isar.id_isar1 = 0x13112111; in aarch64_a35_initfn() 61 cpu->isar.id_isar2 = 0x21232042; in aarch64_a35_initfn() [all …]
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H A D | cpu32.c | 28 t = cpu->isar.id_isar5; in aa32_max_features() 35 cpu->isar.id_isar5 = t; in aa32_max_features() 37 t = cpu->isar.id_isar6; in aa32_max_features() 45 cpu->isar.id_isar6 = t; in aa32_max_features() 47 t = cpu->isar.mvfr1; in aa32_max_features() 50 cpu->isar.mvfr1 = t; in aa32_max_features() 52 t = cpu->isar.mvfr2; in aa32_max_features() 55 cpu->isar.mvfr2 = t; in aa32_max_features() 57 t = cpu->isar.id_mmfr3; in aa32_max_features() 59 cpu->isar.id_mmfr3 = t; in aa32_max_features() [all …]
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H A D | translate.h | 26 const ARMISARegisters *isar; member 585 ({ DisasContext *ctx_ = (ctx); isar_feature_##name(ctx_->isar); })
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H A D | helper-a64.c | 768 &env_archcpu(env)->isar); in cpsr_write_from_spsr_elx() 853 spsr &= aarch64_pstate_valid_mask(&env_archcpu(env)->isar); in HELPER()
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H A D | op_helper.c | 543 mask = aarch32_cpsr_valid_mask(env->features, &env_archcpu(env)->isar); in HELPER()
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H A D | translate.c | 2638 mask &= aarch32_cpsr_valid_mask(s->features, s->isar); in msr_mask() 7521 dc->isar = &cpu->isar; in arm_tr_init_disas_context()
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H A D | translate-a64.c | 11679 dc->isar = &arm_cpu->isar; in aarch64_tr_init_disas_context()
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/openbmc/linux/drivers/isdn/hardware/mISDN/ |
H A D | mISDNisar.c | 37 waitforHIA(struct isar_hw *isar, int timeout) in waitforHIA() argument 40 u8 val = isar->read_reg(isar->hw, ISAR_HIA); in waitforHIA() 45 val = isar->read_reg(isar->hw, ISAR_HIA); in waitforHIA() 47 pr_debug("%s: HIA after %dus\n", isar->name, timeout - t); in waitforHIA() 56 send_mbox(struct isar_hw *isar, u8 his, u8 creg, u8 len, u8 *msg) in send_mbox() argument 58 if (!waitforHIA(isar, 1000)) in send_mbox() 61 isar->write_reg(isar->hw, ISAR_CTRL_H, creg); in send_mbox() 62 isar->write_reg(isar->hw, ISAR_CTRL_L, len); in send_mbox() 63 isar->write_reg(isar->hw, ISAR_WADR, 0); in send_mbox() 65 msg = isar->buf; in send_mbox() [all …]
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H A D | speedfax.c | 69 struct isar_hw isar; member 79 card->isar.ch[0].bch.debug = debug; in _set_debug() 80 card->isar.ch[1].bch.debug = debug; in _set_debug() 128 mISDNisar_irq(&sf->isar); in IOFUNC_IND() 251 err = sf->isar.open(&sf->isar, rq); in sfax_dctrl() 332 ASSIGN_FUNC(IND, ISAR, sf->isar); in setup_speedfax() 349 card->isar.release(&card->isar); in release_card() 375 card->isar.hwlock = &card->lock; in setup_instance() 376 card->isar.ctrl = (void *)&sfax_ctrl; in setup_instance() 378 card->isar.name = card->name; in setup_instance() [all …]
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/openbmc/qemu/target/arm/ |
H A D | cpu64.c | 117 cpu->isar.id_aa64zfr0 = 0; in arm_cpu_sve_finalize() 298 t = cpu->isar.id_aa64pfr0; in cpu_arm_set_sve() 300 cpu->isar.id_aa64pfr0 = t; in cpu_arm_set_sve() 312 cpu->isar.id_aa64smfr0 = 0; in arm_cpu_sme_finalize() 353 t = cpu->isar.id_aa64pfr1; in cpu_arm_set_sme() 355 cpu->isar.id_aa64pfr1 = t; in cpu_arm_set_sme() 370 t = cpu->isar.id_aa64smfr0; in cpu_arm_set_sme_fa64() 372 cpu->isar.id_aa64smfr0 = t; in cpu_arm_set_sme_fa64() 493 isar1 = cpu->isar.id_aa64isar1; in arm_cpu_pauth_finalize() 499 isar2 = cpu->isar.id_aa64isar2; in arm_cpu_pauth_finalize() [all …]
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H A D | cpu.c | 252 env->vfp.xregs[ARM_VFP_MVFR0] = cpu->isar.mvfr0; in arm_cpu_reset_hold() 253 env->vfp.xregs[ARM_VFP_MVFR1] = cpu->isar.mvfr1; in arm_cpu_reset_hold() 254 env->vfp.xregs[ARM_VFP_MVFR2] = cpu->isar.mvfr2; in arm_cpu_reset_hold() 2126 u = cpu->isar.mvfr0; in arm_cpu_realizefn() 2128 cpu->isar.mvfr0 = u; in arm_cpu_realizefn() 2135 t = cpu->isar.id_aa64isar1; in arm_cpu_realizefn() 2137 cpu->isar.id_aa64isar1 = t; in arm_cpu_realizefn() 2139 t = cpu->isar.id_aa64pfr0; in arm_cpu_realizefn() 2141 cpu->isar.id_aa64pfr0 = t; in arm_cpu_realizefn() 2143 u = cpu->isar.id_isar6; in arm_cpu_realizefn() [all …]
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H A D | kvm.c | 58 ARMISARegisters isar; member 310 err = read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64pfr0, in kvm_arm_get_host_cpu_features() 329 ahcf->isar.id_aa64pfr0 = 0x00000011; /* EL1&0, AArch64 only */ in kvm_arm_get_host_cpu_features() 332 err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64pfr1, in kvm_arm_get_host_cpu_features() 334 err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64smfr0, in kvm_arm_get_host_cpu_features() 336 err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64dfr0, in kvm_arm_get_host_cpu_features() 338 err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64dfr1, in kvm_arm_get_host_cpu_features() 340 err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64isar0, in kvm_arm_get_host_cpu_features() 342 err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64isar1, in kvm_arm_get_host_cpu_features() 344 err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64isar2, in kvm_arm_get_host_cpu_features() [all …]
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H A D | internals.h | 1036 return FIELD_EX64(cpu->isar.id_aa64dfr0, ID_AA64DFR0, BRPS) + 1; in arm_num_brps() 1038 return FIELD_EX32(cpu->isar.dbgdidr, DBGDIDR, BRPS) + 1; in arm_num_brps() 1050 return FIELD_EX64(cpu->isar.id_aa64dfr0, ID_AA64DFR0, WRPS) + 1; in arm_num_wrps() 1052 return FIELD_EX32(cpu->isar.dbgdidr, DBGDIDR, WRPS) + 1; in arm_num_wrps() 1064 return FIELD_EX64(cpu->isar.id_aa64dfr0, ID_AA64DFR0, CTX_CMPS) + 1; in arm_num_ctx_cmps() 1066 return FIELD_EX32(cpu->isar.dbgdidr, DBGDIDR, CTX_CMPS) + 1; in arm_num_ctx_cmps() 1663 return (cpu->isar.reset_pmcr_el0 & PMCRN_MASK) >> PMCRN_SHIFT; in pmu_num_counters()
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H A D | debug_helper.c | 1172 if (cpu->isar.dbgdidr != 0) { in define_debug_regs() 1177 .type = ARM_CP_CONST, .resetvalue = cpu->isar.dbgdidr, in define_debug_regs() 1192 if (extract32(cpu->isar.dbgdidr, 15, 1)) { in define_debug_regs() 1197 .type = ARM_CP_CONST, .resetvalue = cpu->isar.dbgdevid, in define_debug_regs() 1207 .type = ARM_CP_CONST, .resetvalue = cpu->isar.dbgdevid1, in define_debug_regs()
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H A D | gdbstub.c | 518 if (isar_feature_aa64_sve(&cpu->isar)) { in arm_cpu_register_gdb_regs_for_features() 534 if (isar_feature_aa64_pauth(&cpu->isar)) { in arm_cpu_register_gdb_regs_for_features()
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H A D | helper.c | 6930 if (a->feature && !a->feature(&cpu->isar)) { in define_arm_vh_e2h_redirects_aliases() 7614 .resetvalue = cpu->isar.reset_pmcr_el0, in define_pmu_regs() 7698 uint64_t pfr1 = cpu->isar.id_pfr1; in id_pfr1_read() 7709 uint64_t pfr0 = cpu->isar.id_aa64pfr0; in id_aa64pfr0_read() 8744 .resetvalue = cpu->isar.id_pfr0 }, in register_cp_regs_for_features() 8755 .resetvalue = cpu->isar.id_pfr1, in register_cp_regs_for_features() 8767 .resetvalue = cpu->isar.id_dfr0 }, in register_cp_regs_for_features() 8777 .resetvalue = cpu->isar.id_mmfr0 }, in register_cp_regs_for_features() 8782 .resetvalue = cpu->isar.id_mmfr1 }, in register_cp_regs_for_features() 8787 .resetvalue = cpu->isar.id_mmfr2 }, in register_cp_regs_for_features() [all …]
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H A D | ptw.c | 126 FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); in arm_pamax() 336 if (pps > FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE)) { in granule_protection_check() 1738 ps = FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE); in get_phys_addr_lpae()
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H A D | cpu-features.h | 1089 ({ ARMCPU *cpu_ = (cpu); isar_feature_##name(&cpu_->isar); })
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H A D | cpu.h | 1036 } isar; member
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/openbmc/qemu/hw/intc/ |
H A D | armv7m_nvic.c | 1266 return cpu->isar.id_pfr0; in nvic_readl() 1271 return cpu->isar.id_pfr1; in nvic_readl() 1276 return cpu->isar.id_dfr0; in nvic_readl() 1286 return cpu->isar.id_mmfr0; in nvic_readl() 1291 return cpu->isar.id_mmfr1; in nvic_readl() 1296 return cpu->isar.id_mmfr2; in nvic_readl() 1301 return cpu->isar.id_mmfr3; in nvic_readl() 1306 return cpu->isar.id_isar0; in nvic_readl() 1311 return cpu->isar.id_isar1; in nvic_readl() 1316 return cpu->isar.id_isar2; in nvic_readl() [all …]
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/openbmc/u-boot/drivers/i2c/ |
H A D | mv_i2c.c | 40 u32 isar; member 52 u32 isar; member 81 writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */ in i2c_reset()
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/openbmc/linux/drivers/i2c/busses/ |
H A D | i2c-pxa.c | 139 u32 isar; member 161 .isar = 0x20, 170 .isar = 0x10, 188 .isar = 0x20, 199 .isar = 0x10, 1478 i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar; in i2c_pxa_probe()
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/openbmc/qemu/target/arm/hvf/ |
H A D | hvf.c | 311 ARMISARegisters isar; member 900 ahcf->isar = host_isar; in hvf_arm_get_host_cpu_features() 961 cpu->isar = arm_host_cpu_features.isar; in hvf_arm_set_cpu_features_from_host() 1053 &arm_cpu->isar.id_aa64mmfr0); in hvf_arch_init_vcpu() 1056 clamp_id_aa64mmfr0_parange_to_ipa_size(&arm_cpu->isar.id_aa64mmfr0); in hvf_arch_init_vcpu() 1058 arm_cpu->isar.id_aa64mmfr0); in hvf_arch_init_vcpu()
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/openbmc/linux/ |
H A D | opengrok1.0.log | [all...] |