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Searched refs:extract32 (Results 1 – 25 of 195) sorted by relevance

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/openbmc/qemu/target/riscv/
H A Dinstmap.h302 #define GET_B_IMM(inst) ((extract32(inst, 8, 4) << 1) \
303 | (extract32(inst, 25, 6) << 5) \
304 | (extract32(inst, 7, 1) << 11) \
307 #define GET_STORE_IMM(inst) ((extract32(inst, 7, 5)) \
310 #define GET_JAL_IMM(inst) ((extract32(inst, 21, 10) << 1) \
311 | (extract32(inst, 20, 1) << 11) \
312 | (extract32(inst, 12, 8) << 12) \
315 #define GET_FUNCT3(inst) extract32(inst, 12, 3)
316 #define GET_FUNCT7(inst) extract32(inst, 25, 7)
317 #define GET_RM(inst) extract32(inst, 12, 3)
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/openbmc/qemu/hw/arm/
H A Dsmmuv3-internal.h358 #define CMD_TYPE(x) extract32((x)->word[0], 0 , 8)
359 #define CMD_NUM(x) extract32((x)->word[0], 12 , 5)
360 #define CMD_SCALE(x) extract32((x)->word[0], 20 , 5)
361 #define CMD_SSEC(x) extract32((x)->word[0], 10, 1)
362 #define CMD_SSV(x) extract32((x)->word[0], 11, 1)
363 #define CMD_RESUME_AC(x) extract32((x)->word[0], 12, 1)
364 #define CMD_RESUME_AB(x) extract32((x)->word[0], 13, 1)
365 #define CMD_SYNC_CS(x) extract32((x)->word[0], 12, 2)
366 #define CMD_SSID(x) extract32((x)->word[0], 12, 20)
368 #define CMD_VMID(x) extract32((x)->word[1], 0 , 16)
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/openbmc/qemu/target/mips/tcg/
H A Dmxu_translate.c679 XRa = extract32(ctx->opcode, 6, 5); in gen_mxu_s32i2m()
680 Rb = extract32(ctx->opcode, 16, 5); in gen_mxu_s32i2m()
700 XRa = extract32(ctx->opcode, 6, 5); in gen_mxu_s32m2i()
701 Rb = extract32(ctx->opcode, 16, 5); in gen_mxu_s32m2i()
726 XRa = extract32(ctx->opcode, 6, 4); in gen_mxu_s8ldd()
727 s8 = extract32(ctx->opcode, 10, 8); in gen_mxu_s8ldd()
728 optn3 = extract32(ctx->opcode, 18, 3); in gen_mxu_s8ldd()
729 Rb = extract32(ctx->opcode, 21, 5); in gen_mxu_s8ldd()
806 XRa = extract32(ctx->opcode, 6, 4); in gen_mxu_s8std()
807 s8 = extract32(ctx->opcode, 10, 8); in gen_mxu_s8std()
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H A Dnanomips_translate.c.inc1233 switch (extract32(ctx->opcode, 2, 2)) {
1251 int rt = extract32(ctx->opcode, 21, 5);
1252 int rs = extract32(ctx->opcode, 16, 5);
1253 int rd = extract32(ctx->opcode, 11, 5);
1255 switch (extract32(ctx->opcode, 3, 7)) {
1257 switch (extract32(ctx->opcode, 10, 1)) {
1270 gen_rdhwr(ctx, rt, rs, extract32(ctx->opcode, 11, 3));
1305 switch (extract32(ctx->opcode, 10, 1)) {
1334 switch (extract32(ctx->opcode, 10, 1)) {
1405 gen_mfc0(ctx, cpu_gpr[rt], rs, extract32(ctx->opcode, 11, 3));
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/openbmc/qemu/hw/ssi/
H A Dnpcm7xx_fiu.c72 #define FIU_DRD_CFG_ADDSIZ(rv) extract32(rv, 16, 2)
75 #define FIU_DRD_CFG_DBW(rv) extract32(rv, 12, 2)
76 #define FIU_DRD_CFG_ACCTYPE(rv) extract32(rv, 8, 2)
77 #define FIU_DRD_CFG_RDCMD(rv) extract32(rv, 0, 8)
80 #define FIU_DWR_CFG_ADDSIZ(rv) extract32(rv, 16, 2)
81 #define FIU_DWR_CFG_WRCMD(rv) extract32(rv, 0, 8)
89 #define FIU_UMA_CFG_RDATSIZ(rv) extract32(rv, 24, 5)
90 #define FIU_UMA_CFG_DBSIZ(rv) extract32(rv, 21, 3)
91 #define FIU_UMA_CFG_WDATSIZ(rv) extract32(rv, 16, 5)
92 #define FIU_UMA_CFG_ADDSIZ(rv) extract32(rv, 11, 3)
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/openbmc/qemu/target/tricore/
H A Dfpu_helper.c214 S = extract32(arg1, 31, 1); in helper_qseed()
215 E = extract32(arg1, 23, 8); in helper_qseed()
216 M = extract32(arg1, 17, 6); in helper_qseed()
394 result = deposit32(result, 21, 2, extract32(f_arg, 8, 2)); in helper_hptof()
395 result = deposit32(result, 0, 8, extract32(f_arg, 0, 8)); in helper_hptof()
429 result = deposit32(result, 8, 2, extract32(arg, 21, 2)); in helper_ftohp()
430 result = deposit32(result, 0, 8, extract32(arg, 0, 8)); in helper_ftohp()
431 if (extract32(result, 0, 10) == 0) { in helper_ftohp()
572 env->FPU_FS = extract32(arg, 7, 1) & extract32(arg, 15, 1); in helper_updfl()
573 env->FPU_FI = (extract32(arg, 6, 1) & extract32(arg, 14, 1)) << 31; in helper_updfl()
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H A Dop_helper.c415 ret_hw0 = extract32(r1, 0, 16) + extract32(r2, 0, 16); in helper_add_h_suov()
416 ret_hw1 = extract32(r1, 16, 16) + extract32(r2, 16, 16); in helper_add_h_suov()
570 ret_hw0 = extract32(r1, 0, 16) - extract32(r2, 0, 16); in helper_sub_h_suov()
571 ret_hw1 = extract32(r1, 16, 16) - extract32(r2, 16, 16); in helper_sub_h_suov()
1580 if (extract32(r1, i * 8, 8) < extract32(r2, i * 8, 8)) { in helper_lt_bu()
1607 if (extract32(r1, 0, 16) < extract32(r2, 0, 16)) { in helper_lt_hu()
1611 if (extract32(r1, 16, 16) < extract32(r2, 16, 16)) { in helper_lt_hu()
1640 extr_r1 = extract32(r1, i * 8, 8); \
1641 extr_r2 = extract32(r2, i * 8, 8); \
1671 extr_r1 = extract32(r1, 0, 16); \
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/openbmc/qemu/tcg/
H A Dtci.c76 *r0 = extract32(insn, 8, 4); in tci_args_r()
82 *n0 = extract32(insn, 8, 4); in tci_args_nl()
89 *r0 = extract32(insn, 8, 4); in tci_args_rl()
95 *r0 = extract32(insn, 8, 4); in tci_args_rr()
96 *r1 = extract32(insn, 12, 4); in tci_args_rr()
101 *r0 = extract32(insn, 8, 4); in tci_args_ri()
108 *r0 = extract32(insn, 8, 4); in tci_args_rrm()
109 *r1 = extract32(insn, 12, 4); in tci_args_rrm()
110 *m2 = extract32(insn, 16, 16); in tci_args_rrm()
115 *r0 = extract32(insn, 8, 4); in tci_args_rrr()
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/openbmc/qemu/target/s390x/tcg/
H A Dvec_string_helper.c140 const bool in = extract32(simd_data(desc), 3, 1); \
141 const bool rt = extract32(simd_data(desc), 2, 1); \
142 const bool zs = extract32(simd_data(desc), 1, 1); \
154 const bool in = extract32(simd_data(desc), 3, 1); \
155 const bool rt = extract32(simd_data(desc), 2, 1); \
156 const bool zs = extract32(simd_data(desc), 1, 1); \
201 const bool zs = extract32(simd_data(desc), 1, 1); \
213 const bool zs = extract32(simd_data(desc), 1, 1); \
266 const bool zs = extract32(simd_data(desc), 1, 1); \
278 const bool zs = extract32(simd_data(desc), 1, 1); \
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H A Dvec_fpu_helper.c230 const uint8_t erm = extract32(simd_data(desc), 4, 4); \
231 const bool se = extract32(simd_data(desc), 3, 1); \
232 const bool XxC = extract32(simd_data(desc), 2, 1); \
325 const bool se = extract32(simd_data(desc), 3, 1); \
505 const bool se = extract32(simd_data(desc), 3, 1); \
506 const bool sq = extract32(simd_data(desc), 2, 1); \
515 const bool se = extract32(simd_data(desc), 3, 1); \
516 const bool sq = extract32(simd_data(desc), 2, 1); \
534 const bool s = extract32(simd_data(desc), 3, 1); in DEF_GVEC_VFC()
571 const uint8_t erm = extract32(simd_data(desc), 4, 4); in HELPER()
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/openbmc/qemu/include/hw/net/
H A Dnpcm_gmac.h46 #define RX_DESC_RDES0_FRAME_LEN_MASK(word) extract32(word, 16, 14)
90 #define RX_DESC_RDES1_BFFR2_SZ_MASK(word) extract32(word, \
93 #define RX_DESC_RDES1_BFFR1_SZ_MASK(word) extract32(word, 0, 11)
130 #define TX_DESC_TDES0_COLL_CNT_MASK(word) extract32(word, 3, 4)
145 #define TX_DESC_TDES1_CHKSM_INS_CTRL_MASK(word) extract32(word, 27, 2)
153 #define TX_DESC_TDES1_BFFR2_SZ_MASK(word) extract32(word, 11, 11)
155 #define TX_DESC_TDES1_BFFR1_SZ_MASK(word) extract32(word, 0, 11)
329 #define NPCM_GMAC_FRAME_FILTER_PCF_MASK BIT(word) extract32((word), 6, 2)
H A Dnpcm7xx_emc.h153 #define REG_DMARFC_RXMS(word) extract32((word), 0, 16)
212 #define TX_DESC_PKT_LEN(word) extract32((word), 0, 16)
238 #define RX_DESC_PKT_LEN(word) extract32((word), 0, 16)
/openbmc/qemu/hw/gpio/
H A Dsifive_gpio.c47 prev_ival = extract32(s->value, i, 1); in update_state()
48 in = extract32(s->in, i, 1); in update_state()
49 in_mask = extract32(s->in_mask, i, 1); in update_state()
50 port = extract32(s->port, i, 1); in update_state()
51 out_xor = extract32(s->out_xor, i, 1); in update_state()
52 pull = extract32(s->pue, i, 1); in update_state()
53 output_en = extract32(s->output_en, i, 1); in update_state()
54 input_en = extract32(s->input_en, i, 1); in update_state()
55 rise_ip = extract32(s->rise_ip, i, 1); in update_state()
56 fall_ip = extract32(s->fall_ip, i, 1); in update_state()
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H A Dnrf51_gpio.c29 uint32_t drive_config = extract32(config, 8, 3); in is_connected()
50 int pull = extract32(config, 2, 2); in pull_value()
63 bool old_connected = extract32(s->old_out_connected, i, 1); in update_output_irq()
64 bool old_level = extract32(s->old_out, i, 1); in update_output_irq()
84 dir = extract32(s->cnf[i], 0, 1); in update_state()
85 connected_in = extract32(s->in_mask, i, 1); in update_state()
86 out = extract32(s->out, i, 1); in update_state()
87 in = extract32(s->in, i, 1); in update_state()
88 input = !extract32(s->cnf[i], 1, 1); in update_state()
103 uint32_t detect_config = extract32(s->cnf[i], 16, 2); in update_state()
H A Dimx_gpio.c82 if (!extract32(s->gdir, line, 1)) { in imx_gpio_set_int_line()
87 if (extract32(s->edge_sel, line, 1)) { in imx_gpio_set_int_line()
89 if (extract32(s->psr, line, 1) != level) { in imx_gpio_set_int_line()
95 if (extract32(s->psr, line, 1) != level) { in imx_gpio_set_int_line()
127 IMXGPIOLevel imx_level = extract32(s->psr, i, 1); in imx_gpio_set_all_int_lines()
143 if (extract32(s->gdir, i, 1) && s->output[i]) { in imx_gpio_set_all_output_lines()
144 qemu_set_irq(s->output[i], extract32(s->dr, i, 1)); in imx_gpio_set_all_output_lines()
H A Daspeed_gpio.c265 uint32_t int_trigger = extract32(regs->int_sens_0, gpio, 1) in aspeed_evaluate_irq()
266 | extract32(regs->int_sens_1, gpio, 1) << 1 in aspeed_evaluate_irq()
267 | extract32(regs->int_sens_2, gpio, 1) << 2; in aspeed_evaluate_irq()
268 uint32_t gpio_curr_high = extract32(regs->data_value, gpio, 1); in aspeed_evaluate_irq()
269 uint32_t gpio_int_enabled = extract32(regs->int_enable, gpio, 1); in aspeed_evaluate_irq()
409 cmd_source = extract32(regs->cmd_source_0, i, 1) in update_value_control_source()
410 | (extract32(regs->cmd_source_1, i, 1) << 1); in update_value_control_source()
741 pending = extract32(set->int_status, pin_idx, 1); in aspeed_gpio_write_index_mode()
1025 extract32(set->data_read, pin_idx, 1)); in aspeed_gpio_2700_read_control_reg()
1027 extract32(set->direction, pin_idx, 1)); in aspeed_gpio_2700_read_control_reg()
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/openbmc/qemu/hw/mips/
H A Dbootloader.c149 assert(extract32(imm20, 0, 20) == imm20); in bl_gen_lui_nm()
152 insn = deposit32(insn, 12, 9, extract32(imm20, 0, 9)); in bl_gen_lui_nm()
153 insn = deposit32(insn, 2, 10, extract32(imm20, 9, 10)); in bl_gen_lui_nm()
169 assert(extract32(imm12, 0, 12) == imm12); in bl_gen_ori_nm()
187 assert(extract32(ofs12, 0, 12) == ofs12); in bl_gen_sw_nm()
219 bl_gen_lui_nm(p, rt, extract32(imm, 12, 20)); in bl_gen_li()
220 bl_gen_ori_nm(p, rt, rt, extract32(imm, 0, 12)); in bl_gen_li()
222 bl_gen_lui(p, rt, extract32(imm, 16, 16)); in bl_gen_li()
223 bl_gen_ori(p, rt, rt, extract32(imm, 0, 16)); in bl_gen_li()
/openbmc/qemu/target/ppc/
H A Dcpu.c138 int mrd = extract32(dawrx, PPC_BIT_NR(48), 54 - 48); in ppc_update_daw0()
139 bool dw = extract32(dawrx, PPC_BIT_NR(57), 1); in ppc_update_daw0()
140 bool dr = extract32(dawrx, PPC_BIT_NR(58), 1); in ppc_update_daw0()
141 bool hv = extract32(dawrx, PPC_BIT_NR(61), 1); in ppc_update_daw0()
142 bool sv = extract32(dawrx, PPC_BIT_NR(62), 1); in ppc_update_daw0()
143 bool pr = extract32(dawrx, PPC_BIT_NR(62), 1); in ppc_update_daw0()
180 int hrammc = extract32(val, PPC_BIT_NR(56), 1); in ppc_store_dawrx0()
/openbmc/qemu/target/arm/
H A Dptw.c411 switch (extract32(entry, 0, 4)) { in granule_protection_check()
416 gpi = extract32(entry, 4, 4); in granule_protection_check()
439 switch (extract32(entry, 0, 4)) { in granule_protection_check()
450 if (extract32(entry, 8, 2) == 0) { in granule_protection_check()
453 gpi = extract32(entry, 4, 4); in granule_protection_check()
897 int maskshift = extract32(tcr, 0, 3); in get_level1_table_address()
1201 phys_addr |= (uint64_t)extract32(desc, 20, 4) << 32; in get_phys_addr_v6()
1202 phys_addr |= (uint64_t)extract32(desc, 5, 4) << 36; in get_phys_addr_v6()
1212 ns = extract32(desc, 19, 1); in get_phys_addr_v6()
1217 ns = extract32(desc, 3, 1); in get_phys_addr_v6()
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/openbmc/qemu/hw/pci/
H A Dpci_host.c132 trace_pci_cfg_write("empty", extract32(addr, 16, 8), in pci_data_write()
133 extract32(addr, 11, 5), extract32(addr, 8, 3), in pci_data_write()
148 trace_pci_cfg_read("empty", extract32(addr, 16, 8), in pci_data_read()
149 extract32(addr, 11, 5), extract32(addr, 8, 3), in pci_data_read()
/openbmc/qemu/hw/misc/
H A Dstm32l4x5_exti.c105 if (level == extract32(s->irq_levels[bank], irq, 1)) { in stm32l4x5_exti_set_irq()
112 if (!extract32(s->imr[bank], irq, 1)) { in stm32l4x5_exti_set_irq()
117 if (extract32(exti_romask[bank], irq, 1)) { in stm32l4x5_exti_set_irq()
123 if ((level && extract32(s->rtsr[bank], irq, 1)) || in stm32l4x5_exti_set_irq()
124 (!level && extract32(s->ftsr[bank], irq, 1))) { in stm32l4x5_exti_set_irq()
209 if (extract32(pend, i, 1)) { in stm32l4x5_exti_write()
H A Dstm32_rcc.c78 new_value = extract32(value, i, 1); in stm32_rcc_write()
79 if (extract32(prev_value, i, 1) && !new_value) { in stm32_rcc_write()
91 new_value = extract32(value, i, 1); in stm32_rcc_write()
92 if (!extract32(prev_value, i, 1) && new_value) { in stm32_rcc_write()
/openbmc/qemu/target/arm/tcg/
H A Dtranslate-a64.c61 unsigned scale = extract32(x, 0, 3); in uimm_scaled()
1396 int extsize = extract32(option, 0, 2); in ext_and_shift_reg()
1397 bool is_signed = extract32(option, 2, 1); in ext_and_shift_reg()
3435 if (extract32(a->opt, 1, 1) == 0) { in trans_LDR()
3453 if (extract32(a->opt, 1, 1) == 0) { in trans_STR()
3469 if (extract32(a->opt, 1, 1) == 0) { in trans_LDR_v()
3488 if (extract32(a->opt, 1, 1) == 0) { in trans_STR_v()
4257 bool wunpriv = extract32(a->options, 0, 1); in do_CPY()
4258 bool runpriv = extract32(a->options, 1, 1); in do_CPY()
4479 if (!logic_imm_decode_wmask(&imm, extract32(a->dbm, 12, 1), in gen_rri_log()
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H A Dmte_helper.c82 index = extract32(ptr, LOG2_TAG_GRANULE + 1, in allocation_tag_mem_probe()
203 uint16_t exclude = extract32(rm | env->cp15.gcr_el1, 0, 16); in HELPER()
204 int rrnd = extract32(env->cp15.gcr_el1, 16, 1); in HELPER()
205 int start = extract32(env->cp15.rgsr_el1, 0, 4); in HELPER()
206 int seed = extract32(env->cp15.rgsr_el1, 8, 16); in HELPER()
238 int top = (extract32(seed, 5, 1) ^ extract32(seed, 3, 1) ^ in HELPER()
239 extract32(seed, 2, 1) ^ extract32(seed, 0, 1)); in HELPER()
253 uint16_t exclude = extract32(env->cp15.gcr_el1, 0, 16); in HELPER()
261 int ofs = extract32(ptr, LOG2_TAG_GRANULE, 1) * 4; in load_tag1()
262 return extract32(*mem, ofs, 4); in load_tag1()
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/openbmc/qemu/tests/qtest/
H A Dnpcm7xx_pwm-test.c46 #define PLL_INDV(rv) extract32((rv), 0, 6)
47 #define PLL_FBDV(rv) extract32((rv), 16, 12)
48 #define PLL_OTDV1(rv) extract32((rv), 8, 3)
49 #define PLL_OTDV2(rv) extract32((rv), 13, 3)
50 #define APB4CKDIV(rv) extract32((rv), 30, 2)
51 #define APB3CKDIV(rv) extract32((rv), 28, 2)
52 #define CLK2CKDIV(rv) extract32((rv), 0, 1)
53 #define CLK4CKDIV(rv) extract32((rv), 26, 2)
54 #define CPUCKSEL(rv) extract32((rv), 0, 2)
398 return extract32(pwm_read(qts, td, PPR), ppr_base[pwm_index(td->pwm)], 8); in pwm_read_ppr()
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