72 #define FIU_DRD_CFG_ADDSIZ(rv) extract32(rv, 16, 2)
75 #define FIU_DRD_CFG_DBW(rv) extract32(rv, 12, 2)
76 #define FIU_DRD_CFG_ACCTYPE(rv) extract32(rv, 8, 2)
77 #define FIU_DRD_CFG_RDCMD(rv) extract32(rv, 0, 8)
80 #define FIU_DWR_CFG_ADDSIZ(rv) extract32(rv, 16, 2)
81 #define FIU_DWR_CFG_WRCMD(rv) extract32(rv, 0, 8)
89 #define FIU_UMA_CFG_RDATSIZ(rv) extract32(rv, 24, 5)
90 #define FIU_UMA_CFG_DBSIZ(rv) extract32(rv, 21, 3)
91 #define FIU_UMA_CFG_WDATSIZ(rv) extract32(rv, 16, 5)
92 #define FIU_UMA_CFG_ADDSIZ(rv) extract32(rv, 11, 3)
93 #define FIU_UMA_CFG_CMDSIZ(rv) extract32(rv, 10, 1)
94 #define FIU_UMA_CFG_DBPCK(rv) extract32(rv, 6, 2)
99 #define FIU_UMA_CTS_DEV_NUM(rv) extract32(rv, 8, 2)
169         ssi_transfer(fiu->spi, extract32(addr, 24, 8));  in npcm7xx_fiu_flash_read()
172         ssi_transfer(fiu->spi, extract32(addr, 16, 8));  in npcm7xx_fiu_flash_read()
173         ssi_transfer(fiu->spi, extract32(addr, 8, 8));  in npcm7xx_fiu_flash_read()
174         ssi_transfer(fiu->spi, extract32(addr, 0, 8));  in npcm7xx_fiu_flash_read()
228         ssi_transfer(fiu->spi, extract32(addr, 24, 8));  in npcm7xx_fiu_flash_write()
231         ssi_transfer(fiu->spi, extract32(addr, 16, 8));  in npcm7xx_fiu_flash_write()
232         ssi_transfer(fiu->spi, extract32(addr, 8, 8));  in npcm7xx_fiu_flash_write()
233         ssi_transfer(fiu->spi, extract32(addr, 0, 8));  in npcm7xx_fiu_flash_write()
287         ssi_transfer(spi, extract32(addr, 24, 8));  in send_address()
290         ssi_transfer(spi, extract32(addr, 16, 8));  in send_address()
293         ssi_transfer(spi, extract32(addr, 8, 8));  in send_address()
296         ssi_transfer(spi, extract32(addr, 0, 8));  in send_address()
315             ssi_transfer(spi, extract32(uma_cmd, field + j, bits_per_clock));  in send_dummy_bits()
336         ssi_transfer(s->spi, extract32(s->regs[NPCM7XX_FIU_UMA_CMD], 0, 8));  in npcm7xx_fiu_uma_transaction()
349         ssi_transfer(s->spi, extract32(s->regs[reg], field, 8));  in npcm7xx_fiu_uma_transaction()