| /openbmc/linux/drivers/crypto/hisilicon/sec2/ |
| H A D | sec_main.c | 570 reg = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_CORE_ENABLE_BITMAP, qm->cap_ver); in sec_engine_init()
642 SEC_OOO_SHUTDOWN_MASK_CAP, qm->cap_ver); in sec_master_ooo_ctrl()
664 ce = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_CE_MASK_CAP, qm->cap_ver); in sec_hw_error_enable()
665 nfe = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_NFE_MASK_CAP, qm->cap_ver); in sec_hw_error_enable()
1016 nfe_mask = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_NFE_MASK_CAP, qm->cap_ver); in sec_disable_error_report()
1055 err_info->ce = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_QM_CE_MASK_CAP, qm->cap_ver); in sec_err_info_init()
1056 err_info->nfe = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_QM_NFE_MASK_CAP, qm->cap_ver); in sec_err_info_init()
1059 SEC_QM_OOO_SHUTDOWN_MASK_CAP, qm->cap_ver); in sec_err_info_init()
1061 SEC_OOO_SHUTDOWN_MASK_CAP, qm->cap_ver); in sec_err_info_init()
1063 SEC_QM_RESET_MASK_CAP, qm->cap_ver); in sec_err_info_init()
[all …]
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| /openbmc/linux/drivers/crypto/hisilicon/hpre/ |
| H A D | hpre_main.c | 725 HPRE_OOO_SHUTDOWN_MASK_CAP, qm->cap_ver); in hpre_master_ooo_ctrl()
741 ce = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_CE_MASK_CAP, qm->cap_ver); in hpre_hw_error_disable()
742 nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver); in hpre_hw_error_disable()
754 ce = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_CE_MASK_CAP, qm->cap_ver); in hpre_hw_error_enable()
755 nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver); in hpre_hw_error_enable()
1119 hpre_pre_store_caps[i], qm->cap_ver); in hpre_pre_store_cap_reg()
1290 nfe_mask = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver); in hpre_disable_error_report()
1331 err_info->ce = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_QM_CE_MASK_CAP, qm->cap_ver); in hpre_err_info_init()
1332 err_info->nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_QM_NFE_MASK_CAP, qm->cap_ver); in hpre_err_info_init()
1335 HPRE_OOO_SHUTDOWN_MASK_CAP, qm->cap_ver); in hpre_err_info_init()
[all …]
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| /openbmc/linux/drivers/crypto/hisilicon/zip/ |
| H A D | zip_main.c | 612 ZIP_OOO_SHUTDOWN_MASK_CAP, qm->cap_ver); in hisi_zip_master_ooo_ctrl()
635 nfe = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_NFE_MASK_CAP, qm->cap_ver); in hisi_zip_hw_error_enable()
636 ce = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_CE_MASK_CAP, qm->cap_ver); in hisi_zip_hw_error_enable()
657 nfe = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_NFE_MASK_CAP, qm->cap_ver); in hisi_zip_hw_error_disable()
658 ce = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_CE_MASK_CAP, qm->cap_ver); in hisi_zip_hw_error_disable()
1078 nfe_mask = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_NFE_MASK_CAP, qm->cap_ver); in hisi_zip_disable_error_report()
1135 err_info->ce = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_QM_CE_MASK_CAP, qm->cap_ver); in hisi_zip_err_info_init()
1137 ZIP_QM_NFE_MASK_CAP, qm->cap_ver); in hisi_zip_err_info_init()
1140 ZIP_QM_OOO_SHUTDOWN_MASK_CAP, qm->cap_ver); in hisi_zip_err_info_init()
1142 ZIP_OOO_SHUTDOWN_MASK_CAP, qm->cap_ver); in hisi_zip_err_info_init()
[all …]
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| /openbmc/qemu/include/hw/pci/ |
| H A D | pcie_aer.h | 89 int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
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| H A D | pcie.h | 134 uint16_t cap_id, uint8_t cap_ver,
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| /openbmc/qemu/hw/xen/ |
| H A D | xen_pt_config_init.c | 864 uint8_t cap_ver = get_capability_version(s, real_offset - reg->offset); in xen_pt_linkctrl_reg_init() local
870 if ((dev_type == PCI_EXP_TYPE_RC_END) && (cap_ver == 1)) { in xen_pt_linkctrl_reg_init()
882 uint8_t cap_ver = get_capability_version(s, real_offset - reg->offset); in xen_pt_devctrl2_reg_init() local
885 if (cap_ver == 1) { in xen_pt_devctrl2_reg_init()
897 uint8_t cap_ver = get_capability_version(s, real_offset - reg->offset); in xen_pt_linkctrl2_reg_init() local
901 if (cap_ver == 1) { in xen_pt_linkctrl2_reg_init()
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| /openbmc/linux/drivers/pci/ |
| H A D | pci-acpi.c | 480 u8 cap_ver = hpx3_cap_id & 0xf; in hpx3_cap_ver_matches() local
482 if ((hpx3_cap_id & BIT(4)) && cap_ver >= pcie_cap_id) in hpx3_cap_ver_matches()
484 else if (cap_ver == pcie_cap_id) in hpx3_cap_ver_matches()
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| /openbmc/qemu/hw/pci/ |
| H A D | pcie_aer.c | 97 int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset, in pcie_aer_init() argument
100 pcie_add_capability(dev, PCI_EXT_CAP_ID_ERR, cap_ver, in pcie_aer_init()
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| H A D | pcie.c | 1059 uint16_t cap_id, uint8_t cap_ver, in pcie_add_capability() argument
1079 pci_set_long(dev->config + offset, PCI_EXT_CAP(cap_id, cap_ver, 0)); in pcie_add_capability()
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| /openbmc/linux/include/linux/ |
| H A D | hisi_acc_qm.h | 326 u32 cap_ver; member
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| /openbmc/linux/drivers/crypto/hisilicon/ |
| H A D | qm.c | 796 depth = hisi_qm_get_hw_info(qm, qm_basic_info, type, qm->cap_ver); in qm_get_xqc_depth()
838 return hisi_qm_get_hw_info(qm, qm_basic_info, QM_PF_IRQ_NUM_CAP, qm->cap_ver); in qm_get_irq_num()
840 return hisi_qm_get_hw_info(qm, qm_basic_info, QM_VF_IRQ_NUM_CAP, qm->cap_ver); in qm_get_irq_num()
5167 qm_pre_store_caps[i], qm->cap_ver); in qm_pre_store_irq_type_caps()
5190 qm->cap_ver = val & QM_CAPBILITY_VERSION; in qm_get_hw_caps()
5195 val = hisi_qm_get_hw_info(qm, qm_cap_info_comm, i, qm->cap_ver); in qm_get_hw_caps()
5202 val = hisi_qm_get_hw_info(qm, cap_info, i, qm->cap_ver); in qm_get_hw_caps()
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| /openbmc/qemu/hw/vfio/ |
| H A D | pci.c | 2296 uint8_t cap_ver; in vfio_add_ext_cap() local
2346 cap_ver = PCI_EXT_CAP_VER(header); in vfio_add_ext_cap()
2368 pcie_add_capability(pdev, cap_id, cap_ver, next, size); in vfio_add_ext_cap()
2372 pcie_add_capability(pdev, cap_id, cap_ver, next, size); in vfio_add_ext_cap()
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| /openbmc/qemu/docs/devel/migration/ |
| H A D | compatibility.rst | 416 @@ -112,10 +112,13 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver,
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