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Searched refs:TCG_COND_GE (Results 1 – 25 of 43) sorted by relevance

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/openbmc/qemu/include/tcg/
H A Dtcg-cond.h51 TCG_COND_GE = 0 | 0 | 2 | 1, enumerator
123 case TCG_COND_GE: in tcg_high_cond()
/openbmc/qemu/target/mips/tcg/
H A Dtx79_translate.c276 return trans_parallel_compare(ctx, a, TCG_COND_GE, 8); in trans_PCGTB()
288 return trans_parallel_compare(ctx, a, TCG_COND_GE, 16); in trans_PCGTH()
300 return trans_parallel_compare(ctx, a, TCG_COND_GE, 32); in trans_PCGTW()
H A Dmxu_translate.c2797 tcg_gen_brcondi_tl(TCG_COND_GE, mxu_gpr[XRc - 1], 0, l_not_less); in gen_mxu_S32CPS()
2841 tcg_gen_brcondi_tl(TCG_COND_GE, t0, 0, l_done_hi); in gen_mxu_D16CPS()
2848 tcg_gen_brcondi_tl(TCG_COND_GE, t0, 0, l_not_less_lo); in gen_mxu_D16CPS()
3665 tcg_gen_brcondi_tl(TCG_COND_GE, t2, bits5, l_xra_only); in gen_mxu_s32extr()
3717 tcg_gen_brcond_tl(TCG_COND_GE, t2, t4, l_xra_only); in gen_mxu_s32extrv()
4310 tcg_gen_brcondi_tl(TCG_COND_GE, t2, 5, l_exit); in gen_mxu_S32ALN()
H A Dtranslate.c2342 tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1); in gen_arith_imm()
2372 tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1); in gen_arith_imm()
2563 tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1); in gen_arith()
2596 tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1); in gen_arith()
2633 tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1); in gen_arith()
2664 tcg_gen_brcondi_tl(TCG_COND_GE, t1, 0, l1); in gen_arith()
3856 tcg_gen_brcondi_i64(TCG_COND_GE, t1, 0, lab); in gen_loongson_multimedia()
3876 tcg_gen_brcondi_i64(TCG_COND_GE, t1, 0, lab); in gen_loongson_multimedia()
4316 tcg_gen_brcond_tl(TCG_COND_GE, t0, t1, l1); in gen_trap()
4534 tcg_gen_setcondi_tl(TCG_COND_GE, bcond, t0, 0); in gen_compute_branch()
[all …]
H A Dnanomips_translate.c.inc1204 tcg_gen_setcondi_tl(TCG_COND_GE, bcond, t0, 0);
1209 tcg_gen_setcondi_tl(TCG_COND_GE, bcond, t0, 32);
2343 cond = TCG_COND_GE;
2487 tcg_gen_brcondi_tl(tcg_invert_cond(TCG_COND_GE), t1, 0, fs);
2511 tcg_gen_brcondi_tl(tcg_invert_cond(TCG_COND_GE), t1, 0, fs);
2514 tcg_gen_brcond_tl(tcg_invert_cond(TCG_COND_GE), t0, t1, fs);
/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_branch.c.inc78 TRANS(bge, ALL, gen_rr_bc, TCG_COND_GE)
/openbmc/qemu/target/hexagon/
H A Dgen_tcg.h971 fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_GE, LSB, RsV, 0))
973 fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_GE, LSB, RsV, 0))
1037 gen_cmp_jumpnv(ctx, TCG_COND_GE, NsN, RtV, riV)
1039 gen_cmp_jumpnv(ctx, TCG_COND_GE, NsN, RtV, riV)
H A Dgenptr.c1051 tcg_gen_brcondi_tl(TCG_COND_GE, shift_amt, 0, positive); in gen_asr_r_r_sat()
1073 tcg_gen_brcondi_tl(TCG_COND_GE, shift_amt, 0, positive); in gen_asl_r_r_sat()
1115 tcg_gen_brcondi_tl(TCG_COND_GE, offset, 0, label); in gen_insert_rp()
/openbmc/qemu/target/alpha/
H A Dtranslate.c512 case TCG_COND_GE: in gen_fold_mzero()
1712 tcg_gen_movcond_i64(TCG_COND_GE, vc, va, load_zero(ctx), in translate_one()
2261 gen_fcmov(ctx, TCG_COND_GE, ra, rb, rc); in translate_one()
2811 ret = gen_fbcond(ctx, TCG_COND_GE, ra, disp21); in translate_one()
2843 ret = gen_bcond(ctx, TCG_COND_GE, ra, disp21); in translate_one()
/openbmc/qemu/tcg/
H A Dtci.c211 case TCG_COND_GE: in tci_compare32()
259 case TCG_COND_GE: in tci_compare64()
1050 [TCG_COND_GE] = "ge", in str_c()
H A Doptimize.c621 case TCG_COND_GE: in do_constant_folding_cond_32()
655 case TCG_COND_GE: in do_constant_folding_cond_64()
689 case TCG_COND_GE: in do_constant_folding_cond_eq()
1373 case TCG_COND_GE: in fold_brcond2()
2352 case TCG_COND_GE: in fold_setcond2()
/openbmc/qemu/target/sh4/
H A Dtranslate.c730 tcg_gen_setcond_i32(TCG_COND_GE, cpu_sr_t, REG(B11_8), REG(B7_4)); in _decode_opc()
894 tcg_gen_movcond_i32(TCG_COND_GE, REG(B11_8), REG(B7_4), t0, t1, t2); in _decode_opc()
916 tcg_gen_movcond_i32(TCG_COND_GE, REG(B11_8), REG(B7_4), t0, t1, t2); in _decode_opc()
1353 tcg_gen_setcondi_i32(TCG_COND_GE, cpu_sr_t, REG(B11_8), 0); in _decode_opc()
/openbmc/qemu/target/tricore/
H A Dtranslate.c2969 gen_branch_condi(ctx, TCG_COND_GE, cpu_gpr_d[r1], 0, offset); in gen_compute_branch()
3032 gen_branch_condi(ctx, TCG_COND_GE, cpu_gpr_d[r1], constant, offset); in gen_compute_branch()
3096 gen_branch_cond(ctx, TCG_COND_GE, cpu_gpr_d[r1], cpu_gpr_d[r2], in gen_compute_branch()
5067 gen_accumulating_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5098 tcg_gen_setcondi_tl(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5139 gen_accumulating_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5176 gen_sh_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], const9); in decode_rc_accumulator()
5197 gen_accumulating_condi(TCG_COND_GE, cpu_gpr_d[r2], cpu_gpr_d[r1], in decode_rc_accumulator()
5658 gen_accumulating_cond(TCG_COND_GE, cpu_gpr_d[r3], cpu_gpr_d[r1], in decode_rr_accumulator()
5698 tcg_gen_setcond_tl(TCG_COND_GE, cpu_gpr_d[r3], cpu_gpr_d[r1], in decode_rr_accumulator()
[all …]
/openbmc/qemu/target/arm/tcg/
H A Dtranslate-vfp.c367 tcg_gen_movcond_i64(TCG_COND_GE, dest, tmp, zero, frn, frm); in trans_VSEL()
373 tcg_gen_movcond_i64(TCG_COND_GE, dest, tmp, zero, dest, frm); in trans_VSEL()
398 tcg_gen_movcond_i32(TCG_COND_GE, dest, tmp, zero, frn, frm); in trans_VSEL()
404 tcg_gen_movcond_i32(TCG_COND_GE, dest, tmp, zero, dest, frm); in trans_VSEL()
H A Dgengvec.c85 GEN_CMP0(gen_gvec_cge0, TCG_COND_GE) in GEN_CMP0()
1095 tcg_gen_cmpsel_vec(TCG_COND_GE, vece, lval, lsh, max, zero, lval); in gen_ushl_vec()
1096 tcg_gen_cmpsel_vec(TCG_COND_GE, vece, rval, rsh, max, zero, rval); in gen_ushl_vec()
/openbmc/qemu/target/ppc/translate/
H A Dspe-impl.c.inc167 tcg_gen_brcondi_i32(TCG_COND_GE, t0, 32, l1);
183 tcg_gen_brcondi_i32(TCG_COND_GE, t0, 32, l1);
199 tcg_gen_brcondi_i32(TCG_COND_GE, t0, 32, l1);
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.c.inc312 case TCG_COND_GE:
729 [TCG_COND_GE] = BC | BI(0, CR_LT) | BO_COND_FALSE,
745 [TCG_COND_GE] = ISEL | BC_(0, CR_LT) | 1,
1822 case TCG_COND_GE:
1970 case TCG_COND_GE:
2050 case TCG_COND_GE:
2182 [TCG_COND_GE ] = { CR_GT, CR_LT },
2231 case TCG_COND_GE:
3789 case TCG_COND_GE:
/openbmc/qemu/target/hexagon/idef-parser/
H A Didef-parser.y652 $$ = gen_bin_cmp(c, &@1, TCG_COND_GE, &$1, &$3);
/openbmc/qemu/target/rx/
H A Dtranslate.c278 dc->cond = TCG_COND_GE; in psw_cond()
288 dc->cond = (cond == 8) ? TCG_COND_GE : TCG_COND_LT; in psw_cond()
304 dc->cond = TCG_COND_GE; in psw_cond()
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc364 [TCG_COND_GE] = COND_GE,
1455 case TCG_COND_GE:
2522 [TCG_COND_GE] = I3616_CMGE,
2529 [TCG_COND_GE] = I3611_CMGE,
2536 [TCG_COND_GE] = I3617_CMGE0,
2543 [TCG_COND_GE] = I3612_CMGE0,
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.c.inc353 [TCG_COND_GE] = { OPC_VMSLE_VV, true },
373 [TCG_COND_GE] = { OPC_VMSGT_VI, -15, 16, true },
1191 [TCG_COND_GE] = { OPC_BGE, false },
1228 case TCG_COND_GE: /* -> LT */
1350 case TCG_COND_GE:
/openbmc/qemu/tcg/s390x/
H A Dtcg-target.c.inc424 [TCG_COND_GE] = S390_CC_GE,
442 [TCG_COND_GE] = S390_CC_GE,
588 case TCG_COND_GE:
1323 case TCG_COND_GE:
1386 case TCG_COND_GE:
2876 case TCG_COND_GE:
/openbmc/qemu/target/xtensa/
H A Dtranslate.c2838 .par = (const uint32_t[]){TCG_COND_GE},
2845 .par = (const uint32_t[]){TCG_COND_GE},
2866 .par = (const uint32_t[]){TCG_COND_GE},
3272 .par = (const uint32_t[]){TCG_COND_GE},
6695 .par = (const uint32_t[]){TCG_COND_GE},
7368 .par = (const uint32_t[]){TCG_COND_GE},
7373 .par = (const uint32_t[]){TCG_COND_GE},
/openbmc/qemu/target/openrisc/
H A Dtranslate.c988 tcg_gen_setcond_tl(TCG_COND_GE, cpu_sr_f, in trans_l_sfges()
1051 tcg_gen_setcondi_tl(TCG_COND_GE, cpu_sr_f, cpu_R(dc, a->a), a->i); in trans_l_sfgesi()
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc163 case TCG_COND_GE:
271 return gen_branch(ctx, a, TCG_COND_GE);

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