Searched refs:PADR (Results 1 – 15 of 15) sorted by relevance
35 #define PADR 0xa9 /* Port A Data Register */ macro57 outb(PADR, CSCIR); in dnp_dio_insn_bits()68 outb(PADR, CSCIR); in dnp_dio_insn_bits()
82 outb((inb(PADR) & ~0x02) | 0x02, PADR); in board_init()
15 #define PADR 0xA4050120 macro
18 #define PADR 0xA4050120 macro
160 #define PADR 0xA4050120 macro
182 #define PADR 0xA4050120 macro
185 #define PADR (PORT_BASE + 0x40) macro
411 #define PADR 0xFFEA0020 macro
1232 #define PADR 0xA4050120 macro
369 volatile u_char PADR; /* Port A Data Register */ member
96 #define PADR 0x160 /* Physical address register */ macro
480 writeb(dev->dev_addr[i], mmio + PADR + i); in amd8111e_restart()1506 writeb(dev->dev_addr[i], lp->mmio + PADR + i); in amd8111e_set_mac_address()1812 addr[i] = readb(lp->mmio + PADR + i); in amd8111e_probe_one()
89 # define PADR 0xA4050120 macro