/openbmc/u-boot/board/boundary/nitrogen6x/ |
H A D | 800mhz_4x256mx16.cfg | 37 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E
|
H A D | 800mhz_4x128mx16.cfg | 37 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00270039
|
H A D | 800mhz_2x256mx16.cfg | 37 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E
|
H A D | 1066mhz_4x128mx16.cfg | 37 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00070018
|
H A D | 1066mhz_4x256mx16.cfg | 37 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x000f0029
|
H A D | 800mhz_2x128mx16.cfg | 37 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0032003E
|
/openbmc/u-boot/board/toradex/apalis_imx6/ |
H A D | 1066mhz_4x256mx16.cfg | 42 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0006000E
|
H A D | 1066mhz_4x128mx16.cfg | 42 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0006000E
|
H A D | apalis_imx6.c | 1019 MX6_MMDC_P1_MPWLDECTRL1, 0x0006000E, 1138 MX6_MMDC_P1_MPWLDECTRL1, 0x0006000E,
|
/openbmc/u-boot/board/toradex/colibri_imx6/ |
H A D | 800mhz_2x64mx16.cfg | 53 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0012002D
|
H A D | 800mhz_4x64mx16.cfg | 53 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0012002D
|
H A D | colibri_imx6.c | 884 MX6_MMDC_P1_MPWLDECTRL1, 0x0012002D, 1017 MX6_MMDC_P1_MPWLDECTRL1, 0x0012002D,
|
/openbmc/u-boot/board/advantech/dms-ba16/ |
H A D | samsung-2g.cfg | 8 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
|
H A D | micron-1g.cfg | 8 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
|
/openbmc/u-boot/board/aristainetos/ |
H A D | nt5cc256m16cp.cfg | 10 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
|
H A D | mt41j128M.cfg | 11 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
|
/openbmc/u-boot/board/tqc/tqma6/ |
H A D | tqma6dl.cfg | 80 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x002B0043
|
H A D | tqma6q.cfg | 80 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0012001C
|
H A D | tqma6s.cfg | 80 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00000000
|
/openbmc/u-boot/board/ge/bx50v3/ |
H A D | bx50v3.cfg | 69 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
|
/openbmc/u-boot/board/tbs/tbs2910/ |
H A D | tbs2910.cfg | 62 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001f001f
|
/openbmc/u-boot/board/seco/mx6quq7/ |
H A D | mx6quq7-2g.cfg | 93 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
|
/openbmc/u-boot/board/barco/titanium/ |
H A D | imximage.cfg | 147 DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00440044
|
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/ |
H A D | mx6-ddr.h | 517 #define MX6_MMDC_P1_MPWLDECTRL1 0x021b4810 macro
|