1*83d290c5STom Rini/* SPDX-License-Identifier: GPL-2.0+ */ 2468fb1e4SMarkus Niebel/* 3468fb1e4SMarkus Niebel * Copyright (C) 2014 - 2015 Markus Niebel <Markus.Niebel@tq-group.com> 4468fb1e4SMarkus Niebel * 5468fb1e4SMarkus Niebel * Refer doc/README.imximage for more details about how-to configure 6468fb1e4SMarkus Niebel * and create imximage boot image 7468fb1e4SMarkus Niebel * 8468fb1e4SMarkus Niebel * The syntax is taken as close as possible with the kwbimage 9468fb1e4SMarkus Niebel */ 10468fb1e4SMarkus Niebel 11468fb1e4SMarkus Niebel/* image version */ 12468fb1e4SMarkus NiebelIMAGE_VERSION 2 13468fb1e4SMarkus Niebel 14468fb1e4SMarkus Niebel#define __ASSEMBLY__ 15468fb1e4SMarkus Niebel#include <config.h> 16468fb1e4SMarkus Niebel 17468fb1e4SMarkus Niebel/* 18468fb1e4SMarkus Niebel * Boot Device : one of 19468fb1e4SMarkus Niebel * spi, sd (the board has no nand neither onenand) 20468fb1e4SMarkus Niebel */ 21468fb1e4SMarkus Niebel#if defined(CONFIG_TQMA6X_MMC_BOOT) 22468fb1e4SMarkus NiebelBOOT_FROM sd 23468fb1e4SMarkus Niebel#elif defined(CONFIG_TQMA6X_SPI_BOOT) 24468fb1e4SMarkus NiebelBOOT_FROM spi 25468fb1e4SMarkus Niebel#endif 26468fb1e4SMarkus Niebel 27468fb1e4SMarkus Niebel#include "asm/arch/mx6-ddr.h" 28468fb1e4SMarkus Niebel#include "asm/arch/iomux.h" 29468fb1e4SMarkus Niebel#include "asm/arch/crm_regs.h" 30468fb1e4SMarkus Niebel 31468fb1e4SMarkus Niebel/* TQMa6DL DDR config Rev. 0100E */ 32468fb1e4SMarkus Niebel/* IOMUX configuration */ 33468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 34468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 35468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00008030 36468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00008030 37468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_CAS, 0x00008030 38468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_RAS, 0x00008030 39468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 40468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_RESET, 0x000C3030 41468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 42468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDCKE1, 0x00000000 43468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 44468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 45468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 46468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 47468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 48468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 49468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 50468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 51468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 52468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 53468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 54468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 55468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 56468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 57468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_B0DS, 0x00000030 58468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_B1DS, 0x00000030 59468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_B2DS, 0x00000030 60468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_B3DS, 0x00000030 61468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_B4DS, 0x00000030 62468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_B5DS, 0x00000030 63468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_B6DS, 0x00000030 64468fb1e4SMarkus NiebelDATA 4, MX6_IOM_GRP_B7DS, 0x00000030 65468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_DQM0, 0x00000030 66468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_DQM1, 0x00000030 67468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_DQM2, 0x00000030 68468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_DQM3, 0x00000030 69468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_DQM4, 0x00000030 70468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_DQM5, 0x00000030 71468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_DQM6, 0x00000030 72468fb1e4SMarkus NiebelDATA 4, MX6_IOM_DRAM_DQM7, 0x00000030 73468fb1e4SMarkus Niebel 74468fb1e4SMarkus Niebel/* memory interface calibration values */ 75468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 76468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 77468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00440048 78468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x003D003F 79468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0029002D 80468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x002B0043 81468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x424C0250 82468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x02300234 83468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4234023C 84468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x0224022C 85468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x48484C4C 86468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4C4E4E4C 87468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x36382C36 88468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x34343630 89468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 90468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 91468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 92468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 93468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 94468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 95468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 96468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 97468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 98468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 99468fb1e4SMarkus Niebel 100468fb1e4SMarkus Niebel/* configure memory interface */ 101468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D 102468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDOTC, 0x00333030 103468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDCFG0, 0x3F435333 104468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDCFG1, 0xB68E8B63 105468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB 106468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDMISC, 0x00001740 107468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 108468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 109468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDOR, 0x00431023 110468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDASP, 0x00000027 111468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000 112468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDSCR, 0x00408032 113468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 114468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 115468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDSCR, 0x05208030 116468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 117468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDREF, 0x00007800 118468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022222 119468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022222 120468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDPDC, 0x0002552D 121468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MAPSR, 0x00001006 122468fb1e4SMarkus NiebelDATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 123468fb1e4SMarkus Niebel 124468fb1e4SMarkus Niebel#include "clocks.cfg" 125