Searched refs:MX6_IOM_DRAM_SDQS5 (Results 1 – 17 of 17) sorted by relevance
| /openbmc/u-boot/arch/arm/include/asm/arch-mx6/ |
| H A D | mx6dl-ddr.h | 39 #define MX6_IOM_DRAM_SDQS5 0x020e04d0 macro
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| H A D | mx6q-ddr.h | 37 #define MX6_IOM_DRAM_SDQS5 0x020e050c macro
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| /openbmc/u-boot/board/advantech/dms-ba16/ |
| H A D | ddr-setup.cfg | 20 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
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| /openbmc/u-boot/board/aristainetos/ |
| H A D | ddr-setup2.cfg | 39 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000028
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| H A D | ddr-setup.cfg | 41 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
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| /openbmc/u-boot/board/boundary/nitrogen6x/ |
| H A D | ddr-setup.cfg | 30 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
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| /openbmc/u-boot/board/toradex/apalis_imx6/ |
| H A D | ddr-setup.cfg | 31 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
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| H A D | apalis_imx6.c | 915 MX6_IOM_DRAM_SDQS5, 0x00000030,
1034 MX6_IOM_DRAM_SDQS5, 0x00000030,
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| /openbmc/u-boot/board/toradex/colibri_imx6/ |
| H A D | ddr-setup.cfg | 31 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
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| H A D | colibri_imx6.c | 767 MX6_IOM_DRAM_SDQS5, 0x00000030,
900 MX6_IOM_DRAM_SDQS5, 0x00000030,
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| /openbmc/u-boot/board/tqc/tqma6/ |
| H A D | tqma6dl.cfg | 53 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
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| H A D | tqma6q.cfg | 53 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
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| H A D | tqma6s.cfg | 53 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000000
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| /openbmc/u-boot/board/ge/bx50v3/ |
| H A D | bx50v3.cfg | 41 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
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| /openbmc/u-boot/board/tbs/tbs2910/ |
| H A D | tbs2910.cfg | 47 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
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| /openbmc/u-boot/board/seco/mx6quq7/ |
| H A D | mx6quq7-2g.cfg | 37 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000028
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| /openbmc/u-boot/board/barco/titanium/ |
| H A D | imximage.cfg | 48 DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030
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