1*83d290c5STom Rini/* SPDX-License-Identifier: GPL-2.0+ */ 2d67b0d97SEric Nelson/* 3d67b0d97SEric Nelson * Copyright (C) 2013 Boundary Devices 4d67b0d97SEric Nelson * 5d67b0d97SEric Nelson * Device Configuration Data (DCD) 6d67b0d97SEric Nelson * 7d67b0d97SEric Nelson * Each entry must have the format: 8d67b0d97SEric Nelson * Addr-type Address Value 9d67b0d97SEric Nelson * 10d67b0d97SEric Nelson * where: 11d67b0d97SEric Nelson * Addr-type register length (1,2 or 4 bytes) 12d67b0d97SEric Nelson * Address absolute address of the register 13d67b0d97SEric Nelson * value value to be stored in the register 14d67b0d97SEric Nelson */ 15d67b0d97SEric Nelson 16d67b0d97SEric Nelson/* 17d67b0d97SEric Nelson * DDR3 settings 18d67b0d97SEric Nelson * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), 19d67b0d97SEric Nelson * memory bus width: 64 bits x16/x32/x64 20d67b0d97SEric Nelson * MX6DL ddr is limited to 800 MHz(400 MHz clock) 21d67b0d97SEric Nelson * memory bus width: 64 bits x16/x32/x64 22d67b0d97SEric Nelson * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) 23d67b0d97SEric Nelson * memory bus width: 32 bits x16/x32 24d67b0d97SEric Nelson */ 25d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 26d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 27d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 28d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 29d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 30d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 31d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 32d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 33d67b0d97SEric Nelson 34d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_B0DS, 0x00000030 35d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_B1DS, 0x00000030 36d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_B2DS, 0x00000030 37d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_B3DS, 0x00000030 38d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_B4DS, 0x00000030 39d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_B5DS, 0x00000030 40d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_B6DS, 0x00000030 41d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_B7DS, 0x00000030 42d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 43d67b0d97SEric Nelson/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ 44d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 45d67b0d97SEric Nelson 46d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 47d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 48d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 49d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 50d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 51d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 52d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 53d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 54d67b0d97SEric Nelson 55d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_CAS, 0x00020030 56d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_RAS, 0x00020030 57d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 58d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 59d67b0d97SEric Nelson 60fdf86c20STroy KiskyDATA 4, MX6_IOM_DRAM_RESET, 0x00020030 61d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 62d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 63d67b0d97SEric Nelson 64d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 65d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 66d67b0d97SEric Nelson 67d67b0d97SEric Nelson/* (differential input) */ 68d67b0d97SEric NelsonDATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 69d67b0d97SEric Nelson/* (differential input) */ 70d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 71d67b0d97SEric Nelson/* disable ddr pullups */ 72d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 73d67b0d97SEric NelsonDATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 74d67b0d97SEric Nelson/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ 75d67b0d97SEric NelsonDATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 76d67b0d97SEric Nelson 77d67b0d97SEric Nelson/* Read data DQ Byte0-3 delay */ 78d67b0d97SEric NelsonDATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 79d67b0d97SEric NelsonDATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 80d67b0d97SEric NelsonDATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 81d67b0d97SEric NelsonDATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 82d67b0d97SEric NelsonDATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 83d67b0d97SEric NelsonDATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 84d67b0d97SEric NelsonDATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 85d67b0d97SEric NelsonDATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 86d67b0d97SEric Nelson 87d67b0d97SEric Nelson/* 88d67b0d97SEric Nelson * MDMISC mirroring interleaved (row/bank/col) 89d67b0d97SEric Nelson */ 90d67b0d97SEric NelsonDATA 4, MX6_MMDC_P0_MDMISC, 0x00081740 91d67b0d97SEric Nelson 92d67b0d97SEric Nelson/* 93d67b0d97SEric Nelson * MDSCR con_req 94d67b0d97SEric Nelson */ 95d67b0d97SEric NelsonDATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 96