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Searched refs:GCC_SDCC1_BCR (Results 1 – 25 of 40) sorted by relevance

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/openbmc/linux/include/dt-bindings/reset/
H A Dqcom,gcc-msm8974.h21 #define GCC_SDCC1_BCR 12 macro
H A Dqcom,gcc-msm8916.h45 #define GCC_SDCC1_BCR 36 macro
H A Dqcom,gcc-apq8084.h21 #define GCC_SDCC1_BCR 12 macro
H A Dqcom,gcc-msm8939.h45 #define GCC_SDCC1_BCR 36 macro
H A Dqcom,gcc-ipq5018.h89 #define GCC_SDCC1_BCR 80 macro
H A Dqcom,gcc-ipq6018.h54 #define GCC_SDCC1_BCR 45 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sdx65.h110 #define GCC_SDCC1_BCR 17 macro
H A Dqcom,gcc-sm6350.h161 #define GCC_SDCC1_BCR 2 macro
H A Dqcom,gcc-ipq4019.h138 #define GCC_SDCC1_BCR 42 macro
H A Dqcom,gcc-qcm2290.h167 #define GCC_SDCC1_BCR 7 macro
H A Dqcom,gcc-sm6115.h179 #define GCC_SDCC1_BCR 2 macro
H A Dqcom,gcc-msm8909.h200 #define GCC_SDCC1_BCR 34 macro
H A Dqcom,gcc-sc7280.h215 #define GCC_SDCC1_BCR 6 macro
H A Dqcom,sm6375-gcc.h212 #define GCC_SDCC1_BCR 11 macro
H A Dqcom,sa8775p-gcc.h284 #define GCC_SDCC1_BCR 22 macro
H A Dqcom,gcc-msm8996.h252 #define GCC_SDCC1_BCR 12 macro
H A Dqcom,gcc-ipq8074.h287 #define GCC_SDCC1_BCR 49 macro
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-sdx65.c1533 [GCC_SDCC1_BCR] = { 0x1a000 },
H A Dgcc-ipq4019.c1659 [GCC_SDCC1_BCR] = {0x18000, 0},
H A Dgcc-sm6350.c2497 [GCC_SDCC1_BCR] = { 0x4b000 },
H A Dgcc-msm8909.c2668 [GCC_SDCC1_BCR] = { 0x42000 },
H A Dgcc-qcm2290.c2923 [GCC_SDCC1_BCR] = { 0x38000 },
H A Dgcc-msm8974.c2752 [GCC_SDCC1_BCR] = { 0x04c0 },
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dipq8074.dtsi432 resets = <&gcc GCC_SDCC1_BCR>;
H A Dqcm2290.dtsi762 resets = <&gcc GCC_SDCC1_BCR>;

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