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Searched refs:GCC_BLSP1_UART3_BCR (Results 1 – 20 of 20) sorted by relevance

/openbmc/linux/include/dt-bindings/reset/
H A Dqcom,gcc-msm8974.h31 #define GCC_BLSP1_UART3_BCR 22 macro
H A Dqcom,gcc-apq8084.h31 #define GCC_BLSP1_UART3_BCR 22 macro
H A Dqcom,gcc-msm8939.h99 #define GCC_BLSP1_UART3_BCR 90 macro
H A Dqcom,gcc-ipq6018.h15 #define GCC_BLSP1_UART3_BCR 6 macro
H A Dqcom,ipq9574-gcc.h20 #define GCC_BLSP1_UART3_BCR 11 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sdx65.h99 #define GCC_BLSP1_UART3_BCR 6 macro
H A Dqcom,gcc-msm8998.h231 #define GCC_BLSP1_UART3_BCR 30 macro
H A Dqcom,gcc-msm8996.h262 #define GCC_BLSP1_UART3_BCR 22 macro
H A Dqcom,ipq5332-gcc.h207 #define GCC_BLSP1_UART3_BCR 24 macro
H A Dqcom,gcc-ipq8074.h244 #define GCC_BLSP1_UART3_BCR 6 macro
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-sdx65.c1522 [GCC_BLSP1_UART3_BCR] = { 0x21000 },
H A Dgcc-msm8998.c3177 [GCC_BLSP1_UART3_BCR] = { 0x1e000 },
H A Dgcc-msm8974.c2762 [GCC_BLSP1_UART3_BCR] = { 0x0780 },
H A Dgcc-msm8996.c3499 [GCC_BLSP1_UART3_BCR] = { 0x1e000 },
H A Dgcc-ipq5332.c3481 [GCC_BLSP1_UART3_BCR] = { 0x4028 },
H A Dgcc-apq8084.c3528 [GCC_BLSP1_UART3_BCR] = { 0x0780 },
H A Dgcc-msm8939.c3876 [GCC_BLSP1_UART3_BCR] = { 0x04038 },
H A Dgcc-ipq9574.c4164 [GCC_BLSP1_UART3_BCR] = { 0x04028, 0 },
H A Dgcc-ipq6018.c4415 [GCC_BLSP1_UART3_BCR] = { 0x04028, 0 },
H A Dgcc-ipq8074.c4543 [GCC_BLSP1_UART3_BCR] = { 0x04028, 0 },